diff for duplicates of <1483050455-10683-3-git-send-email-steve_longerbeam@mentor.com> diff --git a/a/1.txt b/N1/1.txt index 8cfe20a..68dacc8 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -41,14 +41,14 @@ index 1ade195..0a1718c 100644 }; +&gpr { -+ ipu1_csi0_mux: ipu1_csi0_mux@34 { ++ ipu1_csi0_mux: ipu1_csi0_mux at 34 { + compatible = "imx-video-mux"; + reg = <0x34 0x07>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + -+ port@0 { ++ port at 0 { + reg = <0>; + + ipu1_csi0_mux_from_mipi_vc0: endpoint { @@ -56,7 +56,7 @@ index 1ade195..0a1718c 100644 + }; + }; + -+ port@1 { ++ port at 1 { + reg = <1>; + + ipu1_csi0_mux_from_mipi_vc1: endpoint { @@ -64,7 +64,7 @@ index 1ade195..0a1718c 100644 + }; + }; + -+ port@2 { ++ port at 2 { + reg = <2>; + + ipu1_csi0_mux_from_mipi_vc2: endpoint { @@ -72,7 +72,7 @@ index 1ade195..0a1718c 100644 + }; + }; + -+ port@3 { ++ port at 3 { + reg = <3>; + + ipu1_csi0_mux_from_mipi_vc3: endpoint { @@ -80,14 +80,14 @@ index 1ade195..0a1718c 100644 + }; + }; + -+ port@4 { ++ port at 4 { + reg = <4>; + + ipu1_csi0_mux_from_parallel_sensor: endpoint { + }; + }; + -+ port@5 { ++ port at 5 { + reg = <5>; + + ipu1_csi0_mux_to_ipu1_csi0: endpoint { @@ -96,14 +96,14 @@ index 1ade195..0a1718c 100644 + }; + }; + -+ ipu1_csi1_mux: ipu1_csi1_mux@34 { ++ ipu1_csi1_mux: ipu1_csi1_mux at 34 { + compatible = "imx-video-mux"; + reg = <0x34 0x38>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + -+ port@0 { ++ port at 0 { + reg = <0>; + + ipu1_csi1_mux_from_mipi_vc0: endpoint { @@ -111,7 +111,7 @@ index 1ade195..0a1718c 100644 + }; + }; + -+ port@1 { ++ port at 1 { + reg = <1>; + + ipu1_csi1_mux_from_mipi_vc1: endpoint { @@ -119,7 +119,7 @@ index 1ade195..0a1718c 100644 + }; + }; + -+ port@2 { ++ port at 2 { + reg = <2>; + + ipu1_csi1_mux_from_mipi_vc2: endpoint { @@ -127,7 +127,7 @@ index 1ade195..0a1718c 100644 + }; + }; + -+ port@3 { ++ port at 3 { + reg = <3>; + + ipu1_csi1_mux_from_mipi_vc3: endpoint { @@ -135,14 +135,14 @@ index 1ade195..0a1718c 100644 + }; + }; + -+ port@4 { ++ port at 4 { + reg = <4>; + + ipu1_csi1_mux_from_parallel_sensor: endpoint { + }; + }; + -+ port@5 { ++ port at 5 { + reg = <5>; + + ipu1_csi1_mux_to_ipu1_csi1: endpoint { @@ -159,65 +159,65 @@ index 1ade195..0a1718c 100644 +}; + +&mipi_csi { -+ port@0 { ++ port at 0 { + reg = <0>; + + mipi_csi_from_mipi_sensor: endpoint { + }; + }; + -+ port@1 { ++ port at 1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + -+ mipi_vc0_to_ipu1_csi0_mux: endpoint@0 { ++ mipi_vc0_to_ipu1_csi0_mux: endpoint at 0 { + remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc0>; + }; + -+ mipi_vc0_to_ipu1_csi1_mux: endpoint@1 { ++ mipi_vc0_to_ipu1_csi1_mux: endpoint at 1 { + remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc0>; + }; + }; + -+ port@2 { ++ port at 2 { + reg = <2>; + #address-cells = <1>; + #size-cells = <0>; + -+ mipi_vc1_to_ipu1_csi0_mux: endpoint@0 { ++ mipi_vc1_to_ipu1_csi0_mux: endpoint at 0 { + remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc1>; + }; + -+ mipi_vc1_to_ipu1_csi1_mux: endpoint@1 { ++ mipi_vc1_to_ipu1_csi1_mux: endpoint at 1 { + remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc1>; + }; + }; + -+ port@3 { ++ port at 3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + -+ mipi_vc2_to_ipu1_csi0_mux: endpoint@0 { ++ mipi_vc2_to_ipu1_csi0_mux: endpoint at 0 { + remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc2>; + }; + -+ mipi_vc2_to_ipu1_csi1_mux: endpoint@1 { ++ mipi_vc2_to_ipu1_csi1_mux: endpoint at 1 { + remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc2>; + }; + }; + -+ port@4 { ++ port at 4 { + reg = <4>; + #address-cells = <1>; + #size-cells = <0>; + -+ mipi_vc3_to_ipu1_csi0_mux: endpoint@0 { ++ mipi_vc3_to_ipu1_csi0_mux: endpoint at 0 { + remote-endpoint = <&ipu1_csi0_mux_from_mipi_vc3>; + }; + -+ mipi_vc3_to_ipu1_csi1_mux: endpoint@1 { ++ mipi_vc3_to_ipu1_csi1_mux: endpoint at 1 { + remote-endpoint = <&ipu1_csi1_mux_from_mipi_vc3>; + }; + }; @@ -232,7 +232,7 @@ index e9a5d0b..56a314f 100644 +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -143,10 +143,18 @@ - ipu2_csi0: port@0 { + ipu2_csi0: port at 0 { reg = <0>; + + ipu2_csi0_from_mipi_vc2: endpoint { @@ -240,7 +240,7 @@ index e9a5d0b..56a314f 100644 + }; }; - ipu2_csi1: port@1 { + ipu2_csi1: port at 1 { reg = <1>; + + ipu2_csi1_from_ipu2_csi1_mux: endpoint { @@ -248,20 +248,20 @@ index e9a5d0b..56a314f 100644 + }; }; - ipu2_di0: port@2 { + ipu2_di0: port at 2 { @@ -266,6 +274,76 @@ }; }; +&gpr { -+ ipu1_csi0_mux: ipu1_csi0_mux@4 { ++ ipu1_csi0_mux: ipu1_csi0_mux at 4 { + compatible = "imx-video-mux"; + reg = <0x04 0x80000>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + -+ port@0 { ++ port at 0 { + reg = <0>; + + ipu1_csi0_mux_from_mipi_vc0: endpoint { @@ -269,14 +269,14 @@ index e9a5d0b..56a314f 100644 + }; + }; + -+ port@1 { ++ port at 1 { + reg = <1>; + + ipu1_csi0_mux_from_parallel_sensor: endpoint { + }; + }; + -+ port@2 { ++ port at 2 { + reg = <2>; + + ipu1_csi0_mux_to_ipu1_csi0: endpoint { @@ -285,14 +285,14 @@ index e9a5d0b..56a314f 100644 + }; + }; + -+ ipu2_csi1_mux: ipu2_csi1_mux@4 { ++ ipu2_csi1_mux: ipu2_csi1_mux at 4 { + compatible = "imx-video-mux"; + reg = <0x04 0x100000>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + -+ port@0 { ++ port at 0 { + reg = <0>; + + ipu2_csi1_mux_from_mipi_vc3: endpoint { @@ -300,14 +300,14 @@ index e9a5d0b..56a314f 100644 + }; + }; + -+ port@1 { ++ port at 1 { + reg = <1>; + + ipu2_csi1_mux_from_parallel_sensor: endpoint { + }; + }; + -+ port@2 { ++ port at 2 { + reg = <2>; + + ipu2_csi1_mux_to_ipu2_csi1: endpoint { @@ -331,14 +331,14 @@ index e9a5d0b..56a314f 100644 }; +&mipi_csi { -+ port@0 { ++ port at 0 { + reg = <0>; + + mipi_csi_from_mipi_sensor: endpoint { + }; + }; + -+ port@1 { ++ port at 1 { + reg = <1>; + + mipi_vc0_to_ipu1_csi0_mux: endpoint { @@ -346,7 +346,7 @@ index e9a5d0b..56a314f 100644 + }; + }; + -+ port@2 { ++ port at 2 { + reg = <2>; + + mipi_vc1_to_ipu1_csi1: endpoint { @@ -354,7 +354,7 @@ index e9a5d0b..56a314f 100644 + }; + }; + -+ port@3 { ++ port at 3 { + reg = <3>; + + mipi_vc2_to_ipu2_csi0: endpoint { @@ -362,7 +362,7 @@ index e9a5d0b..56a314f 100644 + }; + }; + -+ port@4 { ++ port at 4 { + reg = <4>; + + mipi_vc3_to_ipu2_csi1_mux: endpoint { @@ -373,7 +373,7 @@ index e9a5d0b..56a314f 100644 + &mipi_dsi { ports { - port@2 { + port at 2 { diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index 7b546e3..89218a4 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi @@ -381,7 +381,7 @@ index 7b546e3..89218a4 100644 @@ -799,8 +799,10 @@ }; - gpr: iomuxc-gpr@020e0000 { + gpr: iomuxc-gpr at 020e0000 { - compatible = "fsl,imx6q-iomuxc-gpr", "syscon"; + compatible = "fsl,imx6q-iomuxc-gpr", "syscon", "simple-mfd"; reg = <0x020e0000 0x38>; @@ -389,9 +389,9 @@ index 7b546e3..89218a4 100644 + #size-cells = <0>; }; - iomuxc: iomuxc@020e0000 { + iomuxc: iomuxc at 020e0000 { @@ -1127,6 +1129,8 @@ - mipi_csi: mipi@021dc000 { + mipi_csi: mipi at 021dc000 { compatible = "fsl,imx-mipi-csi2"; reg = <0x021dc000 0x4000>; + #address-cells = <1>; @@ -401,7 +401,7 @@ index 7b546e3..89218a4 100644 <&clks IMX6QDL_CLK_VIDEO_27M>, @@ -1232,6 +1236,10 @@ - ipu1_csi0: port@0 { + ipu1_csi0: port at 0 { reg = <0>; + + ipu1_csi0_from_ipu1_csi0_mux: endpoint { @@ -409,6 +409,6 @@ index 7b546e3..89218a4 100644 + }; }; - ipu1_csi1: port@1 { + ipu1_csi1: port at 1 { -- 2.7.4 diff --git a/a/content_digest b/N1/content_digest index 1bee058..16cc751 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,25 +1,8 @@ "ref\01483050455-10683-1-git-send-email-steve_longerbeam@mentor.com\0" - "From\0Steve Longerbeam <slongerbeam@gmail.com>\0" + "From\0slongerbeam@gmail.com (Steve Longerbeam)\0" "Subject\0[PATCH 02/20] ARM: dts: imx6qdl: Add mipi_ipu1/2 multiplexers, mipi_csi, and their connections\0" "Date\0Thu, 29 Dec 2016 14:27:17 -0800\0" - "To\0shawnguo@kernel.org" - kernel@pengutronix.de - fabio.estevam@nxp.com - robh+dt@kernel.org - mark.rutland@arm.com - linux@armlinux.org.uk - linus.walleij@linaro.org - gnurou@gmail.com - mchehab@kernel.org - gregkh@linuxfoundation.org - " p.zabel@pengutronix.de\0" - "Cc\0devel@driverdev.osuosl.org" - devicetree@vger.kernel.org - Steve Longerbeam <steve_longerbeam@mentor.com> - linux-kernel@vger.kernel.org - linux-gpio@vger.kernel.org - linux-arm-kernel@lists.infradead.org - " linux-media@vger.kernel.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "From: Philipp Zabel <p.zabel@pengutronix.de>\n" @@ -65,14 +48,14 @@ " };\n" " \n" "+&gpr {\n" - "+\tipu1_csi0_mux: ipu1_csi0_mux@34 {\n" + "+\tipu1_csi0_mux: ipu1_csi0_mux at 34 {\n" "+\t\tcompatible = \"imx-video-mux\";\n" "+\t\treg = <0x34 0x07>;\n" "+\t\t#address-cells = <1>;\n" "+\t\t#size-cells = <0>;\n" "+\t\tstatus = \"okay\";\n" "+\n" - "+\t\tport@0 {\n" + "+\t\tport at 0 {\n" "+\t\t\treg = <0>;\n" "+\n" "+\t\t\tipu1_csi0_mux_from_mipi_vc0: endpoint {\n" @@ -80,7 +63,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tport@1 {\n" + "+\t\tport at 1 {\n" "+\t\t\treg = <1>;\n" "+\n" "+\t\t\tipu1_csi0_mux_from_mipi_vc1: endpoint {\n" @@ -88,7 +71,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tport@2 {\n" + "+\t\tport at 2 {\n" "+\t\t\treg = <2>;\n" "+\n" "+\t\t\tipu1_csi0_mux_from_mipi_vc2: endpoint {\n" @@ -96,7 +79,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tport@3 {\n" + "+\t\tport at 3 {\n" "+\t\t\treg = <3>;\n" "+\n" "+\t\t\tipu1_csi0_mux_from_mipi_vc3: endpoint {\n" @@ -104,14 +87,14 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tport@4 {\n" + "+\t\tport at 4 {\n" "+\t\t\treg = <4>;\n" "+\n" "+\t\t\tipu1_csi0_mux_from_parallel_sensor: endpoint {\n" "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tport@5 {\n" + "+\t\tport at 5 {\n" "+\t\t\treg = <5>;\n" "+\n" "+\t\t\tipu1_csi0_mux_to_ipu1_csi0: endpoint {\n" @@ -120,14 +103,14 @@ "+\t\t};\n" "+\t};\n" "+\n" - "+\tipu1_csi1_mux: ipu1_csi1_mux@34 {\n" + "+\tipu1_csi1_mux: ipu1_csi1_mux at 34 {\n" "+\t\tcompatible = \"imx-video-mux\";\n" "+\t\treg = <0x34 0x38>;\n" "+\t\t#address-cells = <1>;\n" "+\t\t#size-cells = <0>;\n" "+\t\tstatus = \"okay\";\n" "+\n" - "+\t\tport@0 {\n" + "+\t\tport at 0 {\n" "+\t\t\treg = <0>;\n" "+\n" "+\t\t\tipu1_csi1_mux_from_mipi_vc0: endpoint {\n" @@ -135,7 +118,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tport@1 {\n" + "+\t\tport at 1 {\n" "+\t\t\treg = <1>;\n" "+\n" "+\t\t\tipu1_csi1_mux_from_mipi_vc1: endpoint {\n" @@ -143,7 +126,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tport@2 {\n" + "+\t\tport at 2 {\n" "+\t\t\treg = <2>;\n" "+\n" "+\t\t\tipu1_csi1_mux_from_mipi_vc2: endpoint {\n" @@ -151,7 +134,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tport@3 {\n" + "+\t\tport at 3 {\n" "+\t\t\treg = <3>;\n" "+\n" "+\t\t\tipu1_csi1_mux_from_mipi_vc3: endpoint {\n" @@ -159,14 +142,14 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tport@4 {\n" + "+\t\tport at 4 {\n" "+\t\t\treg = <4>;\n" "+\n" "+\t\t\tipu1_csi1_mux_from_parallel_sensor: endpoint {\n" "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tport@5 {\n" + "+\t\tport at 5 {\n" "+\t\t\treg = <5>;\n" "+\n" "+\t\t\tipu1_csi1_mux_to_ipu1_csi1: endpoint {\n" @@ -183,65 +166,65 @@ "+};\n" "+\n" "+&mipi_csi {\n" - "+\tport@0 {\n" + "+\tport at 0 {\n" "+\t\treg = <0>;\n" "+\n" "+\t\tmipi_csi_from_mipi_sensor: endpoint {\n" "+\t\t};\n" "+\t};\n" "+\n" - "+\tport@1 {\n" + "+\tport at 1 {\n" "+\t\treg = <1>;\n" "+\t\t#address-cells = <1>;\n" "+\t\t#size-cells = <0>;\n" "+\n" - "+\t\tmipi_vc0_to_ipu1_csi0_mux: endpoint@0 {\n" + "+\t\tmipi_vc0_to_ipu1_csi0_mux: endpoint at 0 {\n" "+\t\t\tremote-endpoint = <&ipu1_csi0_mux_from_mipi_vc0>;\n" "+\t\t};\n" "+\n" - "+\t\tmipi_vc0_to_ipu1_csi1_mux: endpoint@1 {\n" + "+\t\tmipi_vc0_to_ipu1_csi1_mux: endpoint at 1 {\n" "+\t\t\tremote-endpoint = <&ipu1_csi1_mux_from_mipi_vc0>;\n" "+\t\t};\n" "+\t};\n" "+\n" - "+\tport@2 {\n" + "+\tport at 2 {\n" "+\t\treg = <2>;\n" "+\t\t#address-cells = <1>;\n" "+\t\t#size-cells = <0>;\n" "+\n" - "+\t\tmipi_vc1_to_ipu1_csi0_mux: endpoint@0 {\n" + "+\t\tmipi_vc1_to_ipu1_csi0_mux: endpoint at 0 {\n" "+\t\t\tremote-endpoint = <&ipu1_csi0_mux_from_mipi_vc1>;\n" "+\t\t};\n" "+\n" - "+\t\tmipi_vc1_to_ipu1_csi1_mux: endpoint@1 {\n" + "+\t\tmipi_vc1_to_ipu1_csi1_mux: endpoint at 1 {\n" "+\t\t\tremote-endpoint = <&ipu1_csi1_mux_from_mipi_vc1>;\n" "+\t\t};\n" "+\t};\n" "+\n" - "+\tport@3 {\n" + "+\tport at 3 {\n" "+\t\treg = <3>;\n" "+\t\t#address-cells = <1>;\n" "+\t\t#size-cells = <0>;\n" "+\n" - "+\t\tmipi_vc2_to_ipu1_csi0_mux: endpoint@0 {\n" + "+\t\tmipi_vc2_to_ipu1_csi0_mux: endpoint at 0 {\n" "+\t\t\tremote-endpoint = <&ipu1_csi0_mux_from_mipi_vc2>;\n" "+\t\t};\n" "+\n" - "+\t\tmipi_vc2_to_ipu1_csi1_mux: endpoint@1 {\n" + "+\t\tmipi_vc2_to_ipu1_csi1_mux: endpoint at 1 {\n" "+\t\t\tremote-endpoint = <&ipu1_csi1_mux_from_mipi_vc2>;\n" "+\t\t};\n" "+\t};\n" "+\n" - "+\tport@4 {\n" + "+\tport at 4 {\n" "+\t\treg = <4>;\n" "+\t\t#address-cells = <1>;\n" "+\t\t#size-cells = <0>;\n" "+\n" - "+\t\tmipi_vc3_to_ipu1_csi0_mux: endpoint@0 {\n" + "+\t\tmipi_vc3_to_ipu1_csi0_mux: endpoint at 0 {\n" "+\t\t\tremote-endpoint = <&ipu1_csi0_mux_from_mipi_vc3>;\n" "+\t\t};\n" "+\n" - "+\t\tmipi_vc3_to_ipu1_csi1_mux: endpoint@1 {\n" + "+\t\tmipi_vc3_to_ipu1_csi1_mux: endpoint at 1 {\n" "+\t\t\tremote-endpoint = <&ipu1_csi1_mux_from_mipi_vc3>;\n" "+\t\t};\n" "+\t};\n" @@ -256,7 +239,7 @@ "+++ b/arch/arm/boot/dts/imx6q.dtsi\n" "@@ -143,10 +143,18 @@\n" " \n" - " \t\t\tipu2_csi0: port@0 {\n" + " \t\t\tipu2_csi0: port at 0 {\n" " \t\t\t\treg = <0>;\n" "+\n" "+\t\t\t\tipu2_csi0_from_mipi_vc2: endpoint {\n" @@ -264,7 +247,7 @@ "+\t\t\t\t};\n" " \t\t\t};\n" " \n" - " \t\t\tipu2_csi1: port@1 {\n" + " \t\t\tipu2_csi1: port at 1 {\n" " \t\t\t\treg = <1>;\n" "+\n" "+\t\t\t\tipu2_csi1_from_ipu2_csi1_mux: endpoint {\n" @@ -272,20 +255,20 @@ "+\t\t\t\t};\n" " \t\t\t};\n" " \n" - " \t\t\tipu2_di0: port@2 {\n" + " \t\t\tipu2_di0: port at 2 {\n" "@@ -266,6 +274,76 @@\n" " \t};\n" " };\n" " \n" "+&gpr {\n" - "+\tipu1_csi0_mux: ipu1_csi0_mux@4 {\n" + "+\tipu1_csi0_mux: ipu1_csi0_mux at 4 {\n" "+\t\tcompatible = \"imx-video-mux\";\n" "+\t\treg = <0x04 0x80000>;\n" "+\t\t#address-cells = <1>;\n" "+\t\t#size-cells = <0>;\n" "+\t\tstatus = \"okay\";\n" "+\n" - "+\t\tport@0 {\n" + "+\t\tport at 0 {\n" "+\t\t\treg = <0>;\n" "+\n" "+\t\t\tipu1_csi0_mux_from_mipi_vc0: endpoint {\n" @@ -293,14 +276,14 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tport@1 {\n" + "+\t\tport at 1 {\n" "+\t\t\treg = <1>;\n" "+\n" "+\t\t\tipu1_csi0_mux_from_parallel_sensor: endpoint {\n" "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tport@2 {\n" + "+\t\tport at 2 {\n" "+\t\t\treg = <2>;\n" "+\n" "+\t\t\tipu1_csi0_mux_to_ipu1_csi0: endpoint {\n" @@ -309,14 +292,14 @@ "+\t\t};\n" "+\t};\n" "+\n" - "+\tipu2_csi1_mux: ipu2_csi1_mux@4 {\n" + "+\tipu2_csi1_mux: ipu2_csi1_mux at 4 {\n" "+\t\tcompatible = \"imx-video-mux\";\n" "+\t\treg = <0x04 0x100000>;\n" "+\t\t#address-cells = <1>;\n" "+\t\t#size-cells = <0>;\n" "+\t\tstatus = \"okay\";\n" "+\n" - "+\t\tport@0 {\n" + "+\t\tport at 0 {\n" "+\t\t\treg = <0>;\n" "+\n" "+\t\t\tipu2_csi1_mux_from_mipi_vc3: endpoint {\n" @@ -324,14 +307,14 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tport@1 {\n" + "+\t\tport at 1 {\n" "+\t\t\treg = <1>;\n" "+\n" "+\t\t\tipu2_csi1_mux_from_parallel_sensor: endpoint {\n" "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tport@2 {\n" + "+\t\tport at 2 {\n" "+\t\t\treg = <2>;\n" "+\n" "+\t\t\tipu2_csi1_mux_to_ipu2_csi1: endpoint {\n" @@ -355,14 +338,14 @@ " };\n" " \n" "+&mipi_csi {\n" - "+\tport@0 {\n" + "+\tport at 0 {\n" "+\t\treg = <0>;\n" "+\n" "+\t\tmipi_csi_from_mipi_sensor: endpoint {\n" "+\t\t};\n" "+\t};\n" "+\n" - "+\tport@1 {\n" + "+\tport at 1 {\n" "+\t\treg = <1>;\n" "+\n" "+\t\tmipi_vc0_to_ipu1_csi0_mux: endpoint {\n" @@ -370,7 +353,7 @@ "+\t\t};\n" "+\t};\n" "+\n" - "+\tport@2 {\n" + "+\tport at 2 {\n" "+\t\treg = <2>;\n" "+\n" "+\t\tmipi_vc1_to_ipu1_csi1: endpoint {\n" @@ -378,7 +361,7 @@ "+\t\t};\n" "+\t};\n" "+\n" - "+\tport@3 {\n" + "+\tport at 3 {\n" "+\t\treg = <3>;\n" "+\n" "+\t\tmipi_vc2_to_ipu2_csi0: endpoint {\n" @@ -386,7 +369,7 @@ "+\t\t};\n" "+\t};\n" "+\n" - "+\tport@4 {\n" + "+\tport at 4 {\n" "+\t\treg = <4>;\n" "+\n" "+\t\tmipi_vc3_to_ipu2_csi1_mux: endpoint {\n" @@ -397,7 +380,7 @@ "+\n" " &mipi_dsi {\n" " \tports {\n" - " \t\tport@2 {\n" + " \t\tport at 2 {\n" "diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi\n" "index 7b546e3..89218a4 100644\n" "--- a/arch/arm/boot/dts/imx6qdl.dtsi\n" @@ -405,7 +388,7 @@ "@@ -799,8 +799,10 @@\n" " \t\t\t};\n" " \n" - " \t\t\tgpr: iomuxc-gpr@020e0000 {\n" + " \t\t\tgpr: iomuxc-gpr at 020e0000 {\n" "-\t\t\t\tcompatible = \"fsl,imx6q-iomuxc-gpr\", \"syscon\";\n" "+\t\t\t\tcompatible = \"fsl,imx6q-iomuxc-gpr\", \"syscon\", \"simple-mfd\";\n" " \t\t\t\treg = <0x020e0000 0x38>;\n" @@ -413,9 +396,9 @@ "+\t\t\t\t#size-cells = <0>;\n" " \t\t\t};\n" " \n" - " \t\t\tiomuxc: iomuxc@020e0000 {\n" + " \t\t\tiomuxc: iomuxc at 020e0000 {\n" "@@ -1127,6 +1129,8 @@\n" - " \t\t\tmipi_csi: mipi@021dc000 {\n" + " \t\t\tmipi_csi: mipi at 021dc000 {\n" " \t\t\t\tcompatible = \"fsl,imx-mipi-csi2\";\n" " \t\t\t\treg = <0x021dc000 0x4000>;\n" "+\t\t\t\t#address-cells = <1>;\n" @@ -425,7 +408,7 @@ " \t\t\t\t\t <&clks IMX6QDL_CLK_VIDEO_27M>,\n" "@@ -1232,6 +1236,10 @@\n" " \n" - " \t\t\tipu1_csi0: port@0 {\n" + " \t\t\tipu1_csi0: port at 0 {\n" " \t\t\t\treg = <0>;\n" "+\n" "+\t\t\t\tipu1_csi0_from_ipu1_csi0_mux: endpoint {\n" @@ -433,8 +416,8 @@ "+\t\t\t\t};\n" " \t\t\t};\n" " \n" - " \t\t\tipu1_csi1: port@1 {\n" + " \t\t\tipu1_csi1: port at 1 {\n" "-- \n" 2.7.4 -4f2e7e00c64b0543bbb09a9e869e7864fd30d651f576511c66b3cadaba947acb +ee807500f33e0c476b4b8c48f97aa24d38f08e3ad123dd8c78a987ca526f523c
diff --git a/a/content_digest b/N2/content_digest index 1bee058..52197df 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -13,13 +13,13 @@ mchehab@kernel.org gregkh@linuxfoundation.org " p.zabel@pengutronix.de\0" - "Cc\0devel@driverdev.osuosl.org" + "Cc\0linux-arm-kernel@lists.infradead.org" devicetree@vger.kernel.org - Steve Longerbeam <steve_longerbeam@mentor.com> linux-kernel@vger.kernel.org linux-gpio@vger.kernel.org - linux-arm-kernel@lists.infradead.org - " linux-media@vger.kernel.org\0" + linux-media@vger.kernel.org + devel@driverdev.osuosl.org + " Steve Longerbeam <steve_longerbeam@mentor.com>\0" "\00:1\0" "b\0" "From: Philipp Zabel <p.zabel@pengutronix.de>\n" @@ -437,4 +437,4 @@ "-- \n" 2.7.4 -4f2e7e00c64b0543bbb09a9e869e7864fd30d651f576511c66b3cadaba947acb +69ddd7750601e0415697338463574fb73f48b1b1c09fb7b7f0235d49d9448f4e
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