From: <gregkh@linuxfoundation.org>
To: ssundark@amd.com, Nehal-bakulchandra.Shah@amd.com,
Nitesh-kumar.Agrawal@amd.com, Pankaj.Sen@amd.com,
Shyam-sundar.S-k@amd.com, gregkh@linuxfoundation.org,
linus.walleij@linaro.org
Cc: <stable@vger.kernel.org>, <stable-commits@vger.kernel.org>
Subject: Patch "pinctrl/amd: Set the level based on ACPI tables" has been added to the 4.9-stable tree
Date: Mon, 09 Jan 2017 10:33:33 +0100 [thread overview]
Message-ID: <1483954413161116@kroah.com> (raw)
This is a note to let you know that I've just added the patch titled
pinctrl/amd: Set the level based on ACPI tables
to the 4.9-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
pinctrl-amd-set-the-level-based-on-acpi-tables.patch
and it can be found in the queue-4.9 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.
>From 2983f296f2327bc517e3b29344fce82271160197 Mon Sep 17 00:00:00 2001
From: Shyam Sundar S K <ssundark@amd.com>
Date: Thu, 8 Dec 2016 17:31:14 +0530
Subject: pinctrl/amd: Set the level based on ACPI tables
From: Shyam Sundar S K <ssundark@amd.com>
commit 2983f296f2327bc517e3b29344fce82271160197 upstream.
In the function amd_gpio_irq_set_type, read the values from
the ACPI table to set the level and drop the settings passed
by the client.
Reviewed-by: Pankaj Sen <Pankaj.Sen@amd.com>
Reviewed-by: Nitesh Kumar Agrawal <Nitesh-kumar.Agrawal@amd.com>
Reviewed-by: Shah, Nehal-bakulchandra <Nehal-bakulchandra.Shah@amd.com>
Signed-off-by: Shyam-sundar S-k <Shyam-sundar.S-k@amd.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
drivers/pinctrl/pinctrl-amd.c | 19 +++++++------------
1 file changed, 7 insertions(+), 12 deletions(-)
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -382,26 +382,21 @@ static int amd_gpio_irq_set_type(struct
{
int ret = 0;
u32 pin_reg;
- unsigned long flags;
- bool level_trig;
- u32 active_level;
+ unsigned long flags, irq_flags;
struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
struct amd_gpio *gpio_dev = gpiochip_get_data(gc);
spin_lock_irqsave(&gpio_dev->lock, flags);
pin_reg = readl(gpio_dev->base + (d->hwirq)*4);
- /*
- * When level_trig is set EDGE and active_level is set HIGH in BIOS
- * default settings, ignore incoming settings from client and use
- * BIOS settings to configure GPIO register.
+ /* Ignore the settings coming from the client and
+ * read the values from the ACPI tables
+ * while setting the trigger type
*/
- level_trig = !(pin_reg & (LEVEL_TRIGGER << LEVEL_TRIG_OFF));
- active_level = pin_reg & (ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF);
- if(level_trig &&
- ((active_level >> ACTIVE_LEVEL_OFF) == ACTIVE_HIGH))
- type = IRQ_TYPE_EDGE_FALLING;
+ irq_flags = irq_get_trigger_type(d->irq);
+ if (irq_flags != IRQ_TYPE_NONE)
+ type = irq_flags;
switch (type & IRQ_TYPE_SENSE_MASK) {
case IRQ_TYPE_EDGE_RISING:
Patches currently in stable-queue which might be from ssundark@amd.com are
queue-4.9/pinctrl-amd-set-the-level-based-on-acpi-tables.patch
reply other threads:[~2017-01-09 9:33 UTC|newest]
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