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From: Ritesh Harjani <riteshh@codeaurora.org>
To: adrian.hunter@intel.com, ulf.hansson@linaro.org
Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
	shawn.lin@rock-chips.com, linux-arm-msm@vger.kernel.org,
	georgi.djakov@linaro.org, asutoshd@codeaurora.org,
	stummala@codeaurora.org, venkatg@codeaurora.org,
	pramod.gurav@linaro.org, jeremymc@redhat.com, git@kchr.de,
	Subhash Jadavani <subhashj@codeaurora.org>,
	Ritesh Harjani <riteshh@codeaurora.org>
Subject: [RESEND PATCHv1 5/8] mmc: sdhci-msm: configure CORE_CSR_CDC_DELAY_CFG to recommended value
Date: Tue, 10 Jan 2017 12:30:49 +0530	[thread overview]
Message-ID: <1484031652-12059-6-git-send-email-riteshh@codeaurora.org> (raw)
In-Reply-To: <1484031652-12059-1-git-send-email-riteshh@codeaurora.org>

From: Subhash Jadavani <subhashj@codeaurora.org>

Program CORE_CSR_CDC_DELAY_CFG for hardware recommended 1.25ns delay.
We may see data CRC errors if it's programmed for any other delay
value.

Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
---
 drivers/mmc/host/sdhci-msm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index a028568..84d29dd 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -679,7 +679,7 @@ static int sdhci_msm_cdclp533_calibration(struct sdhci_host *host)
 	writel_relaxed(0x4, host->ioaddr + CORE_CSR_CDC_CAL_TIMER_CFG1);
 	writel_relaxed(0xCB732020, host->ioaddr + CORE_CSR_CDC_REFCOUNT_CFG);
 	writel_relaxed(0xB19, host->ioaddr + CORE_CSR_CDC_COARSE_CAL_CFG);
-	writel_relaxed(0x3AC, host->ioaddr + CORE_CSR_CDC_DELAY_CFG);
+	writel_relaxed(0x4E2, host->ioaddr + CORE_CSR_CDC_DELAY_CFG);
 	writel_relaxed(0x0, host->ioaddr + CORE_CDC_OFFSET_CFG);
 	writel_relaxed(0x16334, host->ioaddr + CORE_CDC_SLAVE_DDA_CFG);
 
-- 
The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, 
a Linux Foundation Collaborative Project.

  parent reply	other threads:[~2017-01-10  7:00 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-10  7:00 [RESEND PATCHv1 0/8] mmc: sdhci-msm: Provide support for enhanced strobe Ritesh Harjani
2017-01-10  7:00 ` [RESEND PATCHv1 1/8] mmc: sdhci-msm: Factor out sdhci_msm_hc_select_mode Ritesh Harjani
2017-01-19 10:04   ` Adrian Hunter
2017-01-10  7:00 ` [RESEND PATCHv1 2/8] mmc: sdhci-msm: Factor out function to set/get msm clock rate Ritesh Harjani
2017-01-19 10:04   ` Adrian Hunter
2017-01-10  7:00 ` [RESEND PATCHv1 3/8] mmc: sdhci-msm: Factor out sdhci_msm_hs400 Ritesh Harjani
2017-01-19 10:04   ` Adrian Hunter
2017-01-10  7:00 ` [RESEND PATCHv1 4/8] mmc: sdhci-msm: Reset vendor specific func register on probe Ritesh Harjani
2017-01-19 10:05   ` Adrian Hunter
2017-01-10  7:00 ` Ritesh Harjani [this message]
2017-01-19 10:05   ` [RESEND PATCHv1 5/8] mmc: sdhci-msm: configure CORE_CSR_CDC_DELAY_CFG to recommended value Adrian Hunter
2017-01-20 17:42   ` Stephen Boyd
2017-01-24  8:59     ` Ritesh Harjani
2017-01-10  7:00 ` [RESEND PATCHv1 6/8] mmc: sdhci: Clear SDHCI_HS400_TUNING flag after platform_execute_tuning Ritesh Harjani
2017-01-19 10:10   ` Adrian Hunter
2017-01-19 11:37     ` Ritesh Harjani
2017-01-10  7:00 ` [RESEND PATCHv1 7/8] mmc: sdhci-msm: Make HS400 tuning follow as per recommeneded HW sequence Ritesh Harjani
2017-01-19 10:15   ` Adrian Hunter
2017-01-10  7:00 ` [RESEND PATCHv1 8/8] mmc: sdhci-msm: Provide enhanced_strobe mode feature support Ritesh Harjani
2017-01-19 10:21   ` Adrian Hunter
2017-01-17  1:07 ` [RESEND PATCHv1 0/8] mmc: sdhci-msm: Provide support for enhanced strobe Jeremy McNicoll
2017-01-18  7:54   ` Ritesh Harjani
2017-01-19 20:53 ` Ulf Hansson
2017-01-20  5:18   ` Ritesh Harjani

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