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diff for duplicates of <1486489207-446-1-git-send-email-lis8215@gmail.com>

diff --git a/a/1.txt b/N1/1.txt
index 8f3aa13..cce00bb 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,4 +1,4 @@
-From: Siarhei Volkau <lis8215-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+From: Siarhei Volkau <lis8215@gmail.com>
 
 A31 SoC have a different map of PWM registers than others Allwinner
 SoCs, so the operation of access to the registers reworked for all
@@ -8,7 +8,7 @@ Tested on Onda V972 (a31) and Marsboard A20, but only PWM
 channel 0, because other channels pins are not routed or
 have another function on these boards.
 
-Signed-off-by: Siarhei Volkau <lis8215-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
 ---
  arch/arm/boot/dts/sun6i-a31.dtsi |   8 ++
  drivers/pwm/pwm-sun4i.c          | 195 +++++++++++++++++++++++++++++++++------
@@ -22,7 +22,7 @@ index ee1eb6d..fcba129 100644
  			status = "disabled";
  		};
  
-+		pwm: pwm@01c21400 {
++		pwm: pwm at 01c21400 {
 +			compatible = "allwinner,sun6i-a31-pwm";
 +			reg = <0x01c21400 0x400>;
 +			clocks = <&osc24M>;
@@ -30,7 +30,7 @@ index ee1eb6d..fcba129 100644
 +			status = "disabled";
 +		};
 +
- 		lradc: lradc@01c22800 {
+ 		lradc: lradc at 01c22800 {
  			compatible = "allwinner,sun4i-a10-lradc-keys";
  			reg = <0x01c22800 0x100>;
 diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
diff --git a/a/content_digest b/N1/content_digest
index a7c9bba..cf074ae 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,20 +1,10 @@
- "From\0lis8215-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0"
+ "From\0lis8215@gmail.com (lis8215 at gmail.com)\0"
  "Subject\0[PATCH] Add the Allwinner A31/A31s PWM driver.\0"
  "Date\0Tue,  7 Feb 2017 20:40:07 +0300\0"
- "To\0linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org\0"
- "Cc\0thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org"
-  robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
-  mark.rutland-5wv7dgnIgG8@public.gmane.org
-  maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org
-  wens-jdAy2FN1RRM@public.gmane.org
-  linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
- " Siarhei Volkau <lis8215-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
- "From: Siarhei Volkau <lis8215-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n"
+ "From: Siarhei Volkau <lis8215@gmail.com>\n"
  "\n"
  "A31 SoC have a different map of PWM registers than others Allwinner\n"
  "SoCs, so the operation of access to the registers reworked for all\n"
@@ -24,7 +14,7 @@
  "channel 0, because other channels pins are not routed or\n"
  "have another function on these boards.\n"
  "\n"
- "Signed-off-by: Siarhei Volkau <lis8215-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n"
+ "Signed-off-by: Siarhei Volkau <lis8215@gmail.com>\n"
  "---\n"
  " arch/arm/boot/dts/sun6i-a31.dtsi |   8 ++\n"
  " drivers/pwm/pwm-sun4i.c          | 195 +++++++++++++++++++++++++++++++++------\n"
@@ -38,7 +28,7 @@
  " \t\t\tstatus = \"disabled\";\n"
  " \t\t};\n"
  " \n"
- "+\t\tpwm: pwm@01c21400 {\n"
+ "+\t\tpwm: pwm at 01c21400 {\n"
  "+\t\t\tcompatible = \"allwinner,sun6i-a31-pwm\";\n"
  "+\t\t\treg = <0x01c21400 0x400>;\n"
  "+\t\t\tclocks = <&osc24M>;\n"
@@ -46,7 +36,7 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  "+\n"
- " \t\tlradc: lradc@01c22800 {\n"
+ " \t\tlradc: lradc at 01c22800 {\n"
  " \t\t\tcompatible = \"allwinner,sun4i-a10-lradc-keys\";\n"
  " \t\t\treg = <0x01c22800 0x100>;\n"
  "diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c\n"
@@ -424,4 +414,4 @@
  "-- \n"
  2.4.11
 
-d204bcd671e8aa8920e2db9708a561b2c3a6e5f98654fc331a43562d4ec45431
+2086db836917de2229230df6caf76d1bdef8f2d6ebcac4e45f3b2545bf01680f

diff --git a/a/1.txt b/N2/1.txt
index 8f3aa13..01ef5b6 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -1,4 +1,4 @@
-From: Siarhei Volkau <lis8215-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+From: Siarhei Volkau <lis8215@gmail.com>
 
 A31 SoC have a different map of PWM registers than others Allwinner
 SoCs, so the operation of access to the registers reworked for all
@@ -8,7 +8,7 @@ Tested on Onda V972 (a31) and Marsboard A20, but only PWM
 channel 0, because other channels pins are not routed or
 have another function on these boards.
 
-Signed-off-by: Siarhei Volkau <lis8215-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
+Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
 ---
  arch/arm/boot/dts/sun6i-a31.dtsi |   8 ++
  drivers/pwm/pwm-sun4i.c          | 195 +++++++++++++++++++++++++++++++++------
diff --git a/a/content_digest b/N2/content_digest
index a7c9bba..96bc6cf 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,20 +1,20 @@
- "From\0lis8215-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0"
+ "From\0lis8215@gmail.com\0"
  "Subject\0[PATCH] Add the Allwinner A31/A31s PWM driver.\0"
  "Date\0Tue,  7 Feb 2017 20:40:07 +0300\0"
- "To\0linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org\0"
- "Cc\0thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org"
-  robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
-  mark.rutland-5wv7dgnIgG8@public.gmane.org
-  maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org
-  wens-jdAy2FN1RRM@public.gmane.org
-  linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
-  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
-  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
- " Siarhei Volkau <lis8215-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0"
+ "To\0linux-sunxi@googlegroups.com\0"
+ "Cc\0thierry.reding@gmail.com"
+  robh+dt@kernel.org
+  mark.rutland@arm.com
+  maxime.ripard@free-electrons.com
+  wens@csie.org
+  linux-pwm@vger.kernel.org
+  devicetree@vger.kernel.org
+  linux-arm-kernel@lists.infradead.org
+  linux-kernel@vger.kernel.org
+ " Siarhei Volkau <lis8215@gmail.com>\0"
  "\00:1\0"
  "b\0"
- "From: Siarhei Volkau <lis8215-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n"
+ "From: Siarhei Volkau <lis8215@gmail.com>\n"
  "\n"
  "A31 SoC have a different map of PWM registers than others Allwinner\n"
  "SoCs, so the operation of access to the registers reworked for all\n"
@@ -24,7 +24,7 @@
  "channel 0, because other channels pins are not routed or\n"
  "have another function on these boards.\n"
  "\n"
- "Signed-off-by: Siarhei Volkau <lis8215-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n"
+ "Signed-off-by: Siarhei Volkau <lis8215@gmail.com>\n"
  "---\n"
  " arch/arm/boot/dts/sun6i-a31.dtsi |   8 ++\n"
  " drivers/pwm/pwm-sun4i.c          | 195 +++++++++++++++++++++++++++++++++------\n"
@@ -424,4 +424,4 @@
  "-- \n"
  2.4.11
 
-d204bcd671e8aa8920e2db9708a561b2c3a6e5f98654fc331a43562d4ec45431
+b4ac866942cdf1feeb1321f3553aba6ca109ec94c97271e6d2255037002f8348

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