Re: [PATCH 3/3] powerpc/mm/radix: Skip ptesync in pte update helpers

[Michael Neuling <mikey@neuling.org>]

On Thu, 2017-02-09 at 08:28 +0530, Aneesh Kumar K.V wrote:
> We do them at the start of tlb flush, and we are sure a pte update will b=
e
> followed by a tlbflush. Hence we can skip the ptesync in pte update helpe=
rs.
>=20
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>

Tested-by: Michael Neuling <mikey@neuling.org>

> ---
> =C2=A0arch/powerpc/include/asm/book3s/64/radix.h | 3 ---
> =C2=A01 file changed, 3 deletions(-)
>=20
> diff --git a/arch/powerpc/include/asm/book3s/64/radix.h
> b/arch/powerpc/include/asm/book3s/64/radix.h
> index fcf822d6c204..77e590c77299 100644
> --- a/arch/powerpc/include/asm/book3s/64/radix.h
> +++ b/arch/powerpc/include/asm/book3s/64/radix.h
> @@ -144,13 +144,11 @@ static inline unsigned long radix__pte_update(struc=
t
> mm_struct *mm,
> =C2=A0		=C2=A0* new value of pte
> =C2=A0		=C2=A0*/
> =C2=A0		new_pte =3D (old_pte | set) & ~clr;
> -		asm volatile("ptesync" : : : "memory");
> =C2=A0		radix__flush_tlb_pte_p9_dd1(old_pte, mm, addr);
> =C2=A0		if (new_pte)
> =C2=A0			__radix_pte_update(ptep, 0, new_pte);
> =C2=A0	} else
> =C2=A0		old_pte =3D __radix_pte_update(ptep, clr, set);
> -	asm volatile("ptesync" : : : "memory");
> =C2=A0	if (!huge)
> =C2=A0		assert_pte_locked(mm, addr);
> =C2=A0
> @@ -195,7 +193,6 @@ static inline void radix__ptep_set_access_flags(struc=
t
> mm_struct *mm,
> =C2=A0		unsigned long old_pte, new_pte;
> =C2=A0
> =C2=A0		old_pte =3D __radix_pte_update(ptep, ~0, 0);
> -		asm volatile("ptesync" : : : "memory");
> =C2=A0		/*
> =C2=A0		=C2=A0* new value of pte
> =C2=A0		=C2=A0*/