From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-lf0-f51.google.com ([209.85.215.51]:35801 "EHLO mail-lf0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751536AbcF3XNV (ORCPT ); Thu, 30 Jun 2016 19:13:21 -0400 Received: by mail-lf0-f51.google.com with SMTP id l188so65920651lfe.2 for ; Thu, 30 Jun 2016 16:13:20 -0700 (PDT) From: Sergei Shtylyov To: horms@verge.net.au, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, magnus.damm@gmail.com, linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/3] ARM: dts: blanche: add SCIF0/3 pins Date: Fri, 01 Jul 2016 02:08:12 +0300 Message-ID: <1489490.F0Oqgkmovy@wasted.cogentembedded.com> In-Reply-To: <2144803.0K8qXzjIFq@wasted.cogentembedded.com> References: <2144803.0K8qXzjIFq@wasted.cogentembedded.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-renesas-soc-owner@vger.kernel.org List-ID: Add the (previously omitted) SCIF0/3 pin data to the Blanche board's device tree. Signed-off-by: Sergei Shtylyov --- arch/arm/boot/dts/r8a7792-blanche.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) Index: renesas/arch/arm/boot/dts/r8a7792-blanche.dts =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7792-blanche.dts +++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts @@ -57,10 +57,28 @@ clock-frequency = <20000000>; }; +&pfc { + scif0_pins: scif0 { + groups = "scif0_data"; + function = "scif0"; + }; + + scif3_pins: scif3 { + groups = "scif3_data"; + function = "scif3"; + }; +}; + &scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + status = "okay"; }; &scif3 { + pinctrl-0 = <&scif3_pins>; + pinctrl-names = "default"; + status = "okay"; }; From mboxrd@z Thu Jan 1 00:00:00 1970 From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov) Date: Fri, 01 Jul 2016 02:08:12 +0300 Subject: [PATCH 2/3] ARM: dts: blanche: add SCIF0/3 pins In-Reply-To: <2144803.0K8qXzjIFq@wasted.cogentembedded.com> References: <2144803.0K8qXzjIFq@wasted.cogentembedded.com> Message-ID: <1489490.F0Oqgkmovy@wasted.cogentembedded.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Add the (previously omitted) SCIF0/3 pin data to the Blanche board's device tree. Signed-off-by: Sergei Shtylyov --- arch/arm/boot/dts/r8a7792-blanche.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) Index: renesas/arch/arm/boot/dts/r8a7792-blanche.dts =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7792-blanche.dts +++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts @@ -57,10 +57,28 @@ clock-frequency = <20000000>; }; +&pfc { + scif0_pins: scif0 { + groups = "scif0_data"; + function = "scif0"; + }; + + scif3_pins: scif3 { + groups = "scif3_data"; + function = "scif3"; + }; +}; + &scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + status = "okay"; }; &scif3 { + pinctrl-0 = <&scif3_pins>; + pinctrl-names = "default"; + status = "okay"; }; From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sergei Shtylyov Subject: [PATCH 2/3] ARM: dts: blanche: add SCIF0/3 pins Date: Fri, 01 Jul 2016 02:08:12 +0300 Message-ID: <1489490.F0Oqgkmovy@wasted.cogentembedded.com> References: <2144803.0K8qXzjIFq@wasted.cogentembedded.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <2144803.0K8qXzjIFq@wasted.cogentembedded.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: horms@verge.net.au, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org Cc: linux-renesas-soc@vger.kernel.org, linux@arm.linux.org.uk, magnus.damm@gmail.com, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org Add the (previously omitted) SCIF0/3 pin data to the Blanche board's device tree. Signed-off-by: Sergei Shtylyov --- arch/arm/boot/dts/r8a7792-blanche.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) Index: renesas/arch/arm/boot/dts/r8a7792-blanche.dts =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7792-blanche.dts +++ renesas/arch/arm/boot/dts/r8a7792-blanche.dts @@ -57,10 +57,28 @@ clock-frequency = <20000000>; }; +&pfc { + scif0_pins: scif0 { + groups = "scif0_data"; + function = "scif0"; + }; + + scif3_pins: scif3 { + groups = "scif3_data"; + function = "scif3"; + }; +}; + &scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + status = "okay"; }; &scif3 { + pinctrl-0 = <&scif3_pins>; + pinctrl-names = "default"; + status = "okay"; };