From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: "# v4 . 11-rc1+" <drm-intel-fixes@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915: Align "unfenced" tiled access on gen2, early gen3
Date: Mon, 27 Mar 2017 13:22:57 +0300 [thread overview]
Message-ID: <1490610177.3166.11.camel@linux.intel.com> (raw)
In-Reply-To: <20170325113243.16438-1-chris@chris-wilson.co.uk>
On la, 2017-03-25 at 11:32 +0000, Chris Wilson wrote:
> Old devices have quite severe restrictions for using fences, and unlike
> more recent device (anything from Pineview onwards) we need to enforce
> those restrictions even for unfenced tiled access from the render
> pipeline.
>
> Fixes: 944397f04f24 ("drm/i915: Store required fence size/alignment for GGTT vma")
> Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.11-rc1+
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Could use some T-bs.
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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next prev parent reply other threads:[~2017-03-27 10:22 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-25 11:32 [PATCH] drm/i915: Align "unfenced" tiled access on gen2, early gen3 Chris Wilson
2017-03-25 11:55 ` ✗ Fi.CI.BAT: failure for " Patchwork
2017-03-27 12:24 ` Chris Wilson
2017-03-27 7:10 ` [PATCH] " Daniel Vetter
2017-03-27 10:22 ` Joonas Lahtinen [this message]
2017-03-27 10:36 ` Ville Syrjälä
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