diff for duplicates of <1491344360.4166.68.camel@kernel.crashing.org>

diff --git a/a/1.txt b/N1/1.txt
index dc9c12c..3280098 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,15 +1,15 @@
 On Tue, 2017-04-04 at 12:32 -0500, Christopher Bostic wrote:
-> Agreed that there is room for improvement.?? I intend to look further?
-> into your suggestions from here and our private conversation on the?
-> matter and make changes as appropriate.? I have an open issue to track?
-> this.? As it exists in this patch reads/writes from master to slave?
-> fundamentally work.??
+> Agreed that there is room for improvement.   I intend to look further 
+> into your suggestions from here and our private conversation on the 
+> matter and make changes as appropriate.  I have an open issue to track 
+> this.  As it exists in this patch reads/writes from master to slave 
+> fundamentally work.  
 
 My understanding is they "seem to work if you get lucky with the timing
 and fall apart under load". Or did I hear wrong ?
 
->  Given the pervasiveness and time to fully evaluate?
-> and test any protocol updates I intend address this in the near future?
+>  Given the pervasiveness and time to fully evaluate 
+> and test any protocol updates I intend address this in the near future 
 > with a separate follow on patch.
 
 Please try the simple change I proposed in my email. It's a 4 or 5
@@ -18,7 +18,7 @@ send and receive. It should be trivial to check if things still "seem
 to work" to begin with.
 
 Do you have some kind of test mechanism that hammers the FSI
-continuously ? Such as doing a series of?putmemproc/getmemproc &
+continuously ? Such as doing a series of putmemproc/getmemproc &
 checking the values ?
 
 Then you can run that while hammering the LPC bus and generally putting
@@ -26,3 +26,9 @@ the BMC under load and you'll quickly see if it's reliable or not.
 
 Cheers,
 Ben.
+
+
+_______________________________________________
+linux-arm-kernel mailing list
+linux-arm-kernel@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/a/content_digest b/N1/content_digest
index 09633a2..d1e6b00 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -4,24 +4,38 @@
  "ref\00e1bcf3a-e8d7-9f50-bdf7-2a1e7466665b@linux.vnet.ibm.com\0"
  "ref\01490907014.3177.207.camel@kernel.crashing.org\0"
  "ref\093b21624-11fc-b71b-aa78-6cb4371c87ae@linux.vnet.ibm.com\0"
- "From\0benh@kernel.crashing.org (Benjamin Herrenschmidt)\0"
- "Subject\0[PATCH v4 19/23] drivers/fsi: Add GPIO based FSI master\0"
+ "From\0Benjamin Herrenschmidt <benh@kernel.crashing.org>\0"
+ "Subject\0Re: [PATCH v4 19/23] drivers/fsi: Add GPIO based FSI master\0"
  "Date\0Wed, 05 Apr 2017 08:19:20 +1000\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Christopher Bostic <cbostic@linux.vnet.ibm.com>"
+ " Joel Stanley <joel@jms.id.au>\0"
+ "Cc\0Mark Rutland <mark.rutland@arm.com>"
+  devicetree@vger.kernel.org
+  Andrew Jeffery <andrew@aj.id.au>
+  Greg KH <gregkh@linuxfoundation.org>
+  Russell King <linux@armlinux.org.uk>
+  rostedt@goodmis.org
+  Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
+  Rob Herring <robh+dt@kernel.org>
+  Jeremy Kerr <jk@ozlabs.org>
+  Edward A . James <eajames@us.ibm.com>
+  Alistair Popple <alistair@popple.id.au>
+  mingo@redhat.com
+ " linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On Tue, 2017-04-04 at 12:32 -0500, Christopher Bostic wrote:\n"
- "> Agreed that there is room for improvement.?? I intend to look further?\n"
- "> into your suggestions from here and our private conversation on the?\n"
- "> matter and make changes as appropriate.? I have an open issue to track?\n"
- "> this.? As it exists in this patch reads/writes from master to slave?\n"
- "> fundamentally work.??\n"
+ "> Agreed that there is room for improvement.\302\240\302\240 I intend to look further\302\240\n"
+ "> into your suggestions from here and our private conversation on the\302\240\n"
+ "> matter and make changes as appropriate.\302\240 I have an open issue to track\302\240\n"
+ "> this.\302\240 As it exists in this patch reads/writes from master to slave\302\240\n"
+ "> fundamentally work.\302\240\302\240\n"
  "\n"
  "My understanding is they \"seem to work if you get lucky with the timing\n"
  "and fall apart under load\". Or did I hear wrong ?\n"
  "\n"
- ">  Given the pervasiveness and time to fully evaluate?\n"
- "> and test any protocol updates I intend address this in the near future?\n"
+ ">  Given the pervasiveness and time to fully evaluate\302\240\n"
+ "> and test any protocol updates I intend address this in the near future\302\240\n"
  "> with a separate follow on patch.\n"
  "\n"
  "Please try the simple change I proposed in my email. It's a 4 or 5\n"
@@ -30,13 +44,19 @@
  "to work\" to begin with.\n"
  "\n"
  "Do you have some kind of test mechanism that hammers the FSI\n"
- "continuously ? Such as doing a series of?putmemproc/getmemproc &\n"
+ "continuously ? Such as doing a series of\302\240putmemproc/getmemproc &\n"
  "checking the values ?\n"
  "\n"
  "Then you can run that while hammering the LPC bus and generally putting\n"
  "the BMC under load and you'll quickly see if it's reliable or not.\n"
  "\n"
  "Cheers,\n"
- Ben.
+ "Ben.\n"
+ "\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-arm-kernel mailing list\n"
+ "linux-arm-kernel@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
 
-1d83f3024c158955d110c8b9750e88a49d771bc7976c782a5a15cdb71c71511c
+5c8edfdc6f43163f15bf7ecfbe366fa8de06b3eb9d4d069f140056cfdf435a3b
