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From: <gregkh@linuxfoundation.org>
To: len.brown@intel.com, andre@tomt.net, gregkh@linuxfoundation.org
Cc: <stable@vger.kernel.org>, <stable-commits@vger.kernel.org>
Subject: Patch "x86 msr-index.h: Define Atom specific core ratio MSR locations" has been added to the 4.9-stable tree
Date: Tue, 11 Apr 2017 06:55:47 +0200	[thread overview]
Message-ID: <1491886547233227@kroah.com> (raw)


This is a note to let you know that I've just added the patch titled

    x86 msr-index.h: Define Atom specific core ratio MSR locations

to the 4.9-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     x86-msr-index.h-define-atom-specific-core-ratio-msr-locations.patch
and it can be found in the queue-4.9 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


>From 8a34fd0226eaae64d61ff9a113d276e28acb6b5c Mon Sep 17 00:00:00 2001
From: Len Brown <len.brown@intel.com>
Date: Thu, 12 Jan 2017 23:22:28 -0500
Subject: x86 msr-index.h: Define Atom specific core ratio MSR locations

From: Len Brown <len.brown@intel.com>

commit 8a34fd0226eaae64d61ff9a113d276e28acb6b5c upstream.

These MSRs are currently used by the intel_pstate driver,
using a local definition.

Cc: x86@kernel.org
Signed-off-by: Len Brown <len.brown@intel.com>
Cc: Andre Tomt <andre@tomt.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/x86/include/asm/msr-index.h |    6 ++++++
 1 file changed, 6 insertions(+)

--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -203,6 +203,12 @@
 #define MSR_CC6_DEMOTION_POLICY_CONFIG	0x00000668
 #define MSR_MC6_DEMOTION_POLICY_CONFIG	0x00000669
 
+#define MSR_ATOM_CORE_RATIOS		0x0000066a
+#define MSR_ATOM_CORE_VIDS		0x0000066b
+#define MSR_ATOM_CORE_TURBO_RATIOS	0x0000066c
+#define MSR_ATOM_CORE_TURBO_VIDS	0x0000066d
+
+
 #define MSR_CORE_PERF_LIMIT_REASONS	0x00000690
 #define MSR_GFX_PERF_LIMIT_REASONS	0x000006B0
 #define MSR_RING_PERF_LIMIT_REASONS	0x000006B1


Patches currently in stable-queue which might be from len.brown@intel.com are

queue-4.9/tools-power-turbostat-dump-atom-p-states-correctly.patch
queue-4.9/x86-intel_idle-add-cpu-model-0x4a-atom-z34xx-series.patch
queue-4.9/x86-msr-index.h-define-atom-specific-core-ratio-msr-locations.patch
queue-4.9/tools-power-turbostat-decode-baytrail-cc6-and-mc6-demotion-configuration.patch

                 reply	other threads:[~2017-04-11  4:55 UTC|newest]

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