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diff for duplicates of <1492064854.4624.48.camel@neuling.org>

diff --git a/a/1.txt b/N1/1.txt
index 03735ea..0a4e429 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,8 +1,8 @@
 On Thu, 2017-04-13 at 14:12 +1000, Benjamin Herrenschmidt wrote:
 > On Thu, 2017-04-13 at 09:28 +0530, Aneesh Kumar K.V wrote:
-> > > =C2=A0 #endif
-> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0mtctr=C2=A0=C2=A0=C2=A0r12
-> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0bctrl
+> > >   #endif
+> > >        mtctr   r12
+> > >        bctrl
 > > > +/*
 > > > + * cur_cpu_spec->cpu_restore would restore LPCR to a
 > > > + * sane value that is set at early boot time,
@@ -11,18 +11,16 @@ On Thu, 2017-04-13 at 14:12 +1000, Benjamin Herrenschmidt wrote:
 > > > + * Set it here if that be the case.
 > > > + */
 > > > +BEGIN_MMU_FTR_SECTION
-> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0mfspr=C2=A0=C2=A0=C2=A0r3, SPRN_LPCR
-> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0LOAD_REG_IMMEDIATE(r4, LPCR_UPRT)
-> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0or=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
-r3, r3, r4
-> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0mtspr=C2=A0=C2=A0=C2=A0SPRN_LPCR, r3
+> > > +     mfspr   r3, SPRN_LPCR
+> > > +     LOAD_REG_IMMEDIATE(r4, LPCR_UPRT)
+> > > +     or      r3, r3, r4
+> > > +     mtspr   SPRN_LPCR, r3
 > > > +END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_RADIX)
->=20
+> 
 > We are probably better off saving the value somewhere during boot
 > and just "blasting" it whole back.
 
-We seem to touch LPCR in a bunch of places these days.  Not sure when "some=
-times
+We seem to touch LPCR in a bunch of places these days.  Not sure when "sometimes
  during boot" should actually be.
 
 Mikey
diff --git a/a/content_digest b/N1/content_digest
index 3a00f69..ac416bd 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -23,9 +23,9 @@
  "b\0"
  "On Thu, 2017-04-13 at 14:12 +1000, Benjamin Herrenschmidt wrote:\n"
  "> On Thu, 2017-04-13 at 09:28 +0530, Aneesh Kumar K.V wrote:\n"
- "> > > =C2=A0 #endif\n"
- "> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0mtctr=C2=A0=C2=A0=C2=A0r12\n"
- "> > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0bctrl\n"
+ "> > > \302\240 #endif\n"
+ "> > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240mtctr\302\240\302\240\302\240r12\n"
+ "> > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240bctrl\n"
  "> > > +/*\n"
  "> > > + * cur_cpu_spec->cpu_restore would restore LPCR to a\n"
  "> > > + * sane value that is set at early boot time,\n"
@@ -34,20 +34,18 @@
  "> > > + * Set it here if that be the case.\n"
  "> > > + */\n"
  "> > > +BEGIN_MMU_FTR_SECTION\n"
- "> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0mfspr=C2=A0=C2=A0=C2=A0r3, SPRN_LPCR\n"
- "> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0LOAD_REG_IMMEDIATE(r4, LPCR_UPRT)\n"
- "> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0or=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n"
- "r3, r3, r4\n"
- "> > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0mtspr=C2=A0=C2=A0=C2=A0SPRN_LPCR, r3\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240mfspr\302\240\302\240\302\240r3, SPRN_LPCR\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240LOAD_REG_IMMEDIATE(r4, LPCR_UPRT)\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240or\302\240\302\240\302\240\302\240\302\240\302\240r3, r3, r4\n"
+ "> > > +\302\240\302\240\302\240\302\240\302\240mtspr\302\240\302\240\302\240SPRN_LPCR, r3\n"
  "> > > +END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_RADIX)\n"
- ">=20\n"
+ "> \n"
  "> We are probably better off saving the value somewhere during boot\n"
  "> and just \"blasting\" it whole back.\n"
  "\n"
- "We seem to touch LPCR in a bunch of places these days.  Not sure when \"some=\n"
- "times\n"
+ "We seem to touch LPCR in a bunch of places these days.  Not sure when \"sometimes\n"
  " during boot\" should actually be.\n"
  "\n"
  Mikey
 
-4ab2742b9c997ef32df0d878cdfd98d95912129092ca1f48211d366e677c35c3
+637afe97e1aa72349e9d63f8045117113d6d2ec2aa546dec84e150bf139e7f72

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