diff for duplicates of <1493834298.11226.40.camel@nxp.com> diff --git a/a/1.txt b/N1/1.txt index afbb832..25c24ab 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,10 +2,10 @@ On Wed, 2017-05-03 at 17:59 +0200, Marek Vasut wrote: > On 05/03/2017 04:58 PM, Leonard Crestez wrote: > > On Wed, 2017-05-03 at 16:26 +0200, Marek Vasut wrote: > > > 2) It actually fixes a problem with the voltage rails such that the DVFS -> > > works without leaving the system in unstable or dead state. You do -> > > need the second part of my patch if you drop the OPP hackery, without -> > > it the power framework cannot correctly configure the core voltages, -> > > so the patch from Leonard makes things worse. +> > > ???works without leaving the system in unstable or dead state. You do +> > > ???need the second part of my patch if you drop the OPP hackery, without +> > > ???it the power framework cannot correctly configure the core voltages, +> > > ???so the patch from Leonard makes things worse. > > No, I think there is a misunderstanding here. The second part of your > > patch will cause cpufreq poking at LDOs to indirectly adjust the input > > from the PMIC to the minimum required (this is LDO target + @@ -35,6 +35,6 @@ However the boot issues happen on REV C but apparently not REV B of the board. I don't have a good explanation for this so maybe I am missing something. --- +--? Regards, Leonard diff --git a/a/content_digest b/N1/content_digest index 292a8f4..3d086e7 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -7,32 +7,20 @@ "ref\076e22a7e-590f-00ee-04f8-87604303eaad@denx.de\0" "ref\01493823533.11226.28.camel@nxp.com\0" "ref\0e46a57c2-4a28-a8b6-445e-299dd9d8659c@denx.de\0" - "From\0Leonard Crestez <leonard.crestez@nxp.com>\0" - "Subject\0Re: [PATCH] ARM: dts: imx6sx-sdb: Remove cpufreq OPP override\0" + "From\0leonard.crestez@nxp.com (Leonard Crestez)\0" + "Subject\0[PATCH] ARM: dts: imx6sx-sdb: Remove cpufreq OPP override\0" "Date\0Wed, 3 May 2017 20:58:18 +0300\0" - "To\0Marek Vasut <marex@denx.de>\0" - "Cc\0Fabio Estevam <festevam@gmail.com>" - Sascha Hauer <kernel@pengutronix.de> - Peter Chen <Peter.Chen@nxp.com> - Anson Huang <Anson.Huang@nxp.com> - linux-pm@vger.kernel.org <linux-pm@vger.kernel.org> - Viresh Kumar <viresh.kumar@linaro.org> - Rafael J. Wysocki <rjw@rjwysocki.net> - linux-kernel <linux-kernel@vger.kernel.org> - Fabio Estevam <fabio.estevam@nxp.com> - linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org> - Christoph Fritz <chf.fritz@googlemail.com> - " Shawn Guo <shawnguo@kernel.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Wed, 2017-05-03 at 17:59 +0200, Marek Vasut wrote:\n" "> On 05/03/2017 04:58 PM, Leonard Crestez wrote:\n" "> > On Wed, 2017-05-03 at 16:26 +0200, Marek Vasut wrote:\n" "> > > 2) It actually fixes a problem with the voltage rails such that the DVFS\n" - "> > > \302\240\302\240\302\240works without leaving the system in unstable or dead state. You do\n" - "> > > \302\240\302\240\302\240need the second part of my patch if you drop the OPP hackery, without\n" - "> > > \302\240\302\240\302\240it the power framework cannot correctly configure the core voltages,\n" - "> > > \302\240\302\240\302\240so the patch from Leonard makes things worse.\n" + "> > > ???works without leaving the system in unstable or dead state. You do\n" + "> > > ???need the second part of my patch if you drop the OPP hackery, without\n" + "> > > ???it the power framework cannot correctly configure the core voltages,\n" + "> > > ???so the patch from Leonard makes things worse.\n" "> > No, I think there is a misunderstanding here. The second part of your\n" "> > patch will cause cpufreq poking at LDOs to indirectly adjust the input\n" "> > from the PMIC to the minimum required (this is LDO target +\n" @@ -62,8 +50,8 @@ "board. I don't have a good explanation for this so maybe I am missing\n" "something.\n" "\n" - "--\302\240\n" + "--?\n" "Regards,\n" Leonard -4eee0339e405ed3403b7b555c850f7fd5420be687a9b84c4527a870c529932a7 +e984e1ecadee1232174e225f52490edc8504724d862ebdb20eb08bb720b01565
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