From mboxrd@z Thu Jan 1 00:00:00 1970 From: Duyck, Alexander H Date: Mon, 15 May 2017 16:57:43 +0000 Subject: [Intel-wired-lan] [PATCH net v2] i40e/i40evf: proper update of the page_offset field In-Reply-To: <20170515045200.27789-1-bjorn.topel@gmail.com> References: <20170515045200.27789-1-bjorn.topel@gmail.com> Message-ID: <1494867458.20114.168.camel@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: intel-wired-lan@osuosl.org List-ID: On Mon, 2017-05-15 at 06:52 +0200, Bj?rn T?pel wrote: > From: Bj?rn T?pel > > In f8b45b74cc62 ("i40e/i40evf: Use build_skb to build frames") > i40e_build_skb updates the page_offset field with an incorrect offset, > which can lead to data corruption. This patch updates page_offset > correctly, by properly setting truesize. > > Note that the bug only appears on architectures where PAGE_SIZE is > 8192 or larger. > > Fixes: f8b45b74cc62 ("i40e/i40evf: Use build_skb to build frames") > Signed-off-by: Bj?rn T?pel Acked-by: Alexander Duyck > --- > drivers/net/ethernet/intel/i40e/i40e_txrx.c | 3 ++- > drivers/net/ethernet/intel/i40evf/i40e_txrx.c | 3 ++- > 2 files changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c > index 29321a6167a6..cd894f4023b1 100644 > --- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c > +++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c > @@ -1854,7 +1854,8 @@ static struct sk_buff *i40e_build_skb(struct i40e_ring *rx_ring, > #if (PAGE_SIZE < 8192) > unsigned int truesize = i40e_rx_pg_size(rx_ring) / 2; > #else > - unsigned int truesize = SKB_DATA_ALIGN(size); > + unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + > + SKB_DATA_ALIGN(I40E_SKB_PAD + size); > #endif > struct sk_buff *skb; > > diff --git a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c > index dfe241a12ad0..12b02e530503 100644 > --- a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c > +++ b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c > @@ -1190,7 +1190,8 @@ static struct sk_buff *i40e_build_skb(struct i40e_ring *rx_ring, > #if (PAGE_SIZE < 8192) > unsigned int truesize = i40e_rx_pg_size(rx_ring) / 2; > #else > - unsigned int truesize = SKB_DATA_ALIGN(size); > + unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + > + SKB_DATA_ALIGN(I40E_SKB_PAD + size); > #endif > struct sk_buff *skb; > From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Duyck, Alexander H" Subject: Re: [PATCH net v2] i40e/i40evf: proper update of the page_offset field Date: Mon, 15 May 2017 16:57:43 +0000 Message-ID: <1494867458.20114.168.camel@intel.com> References: <20170515045200.27789-1-bjorn.topel@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Cc: "Topel, Bjorn" , "Kirsher, Jeffrey T" , "alexander.duyck@gmail.com" To: "netdev@vger.kernel.org" , "intel-wired-lan@lists.osuosl.org" , "bjorn.topel@gmail.com" Return-path: Received: from mga03.intel.com ([134.134.136.65]:49008 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932514AbdEOQ5p (ORCPT ); Mon, 15 May 2017 12:57:45 -0400 In-Reply-To: <20170515045200.27789-1-bjorn.topel@gmail.com> Content-Language: en-US Content-ID: <7FF0103C9BC51E4DB5AEA3131DA335E1@intel.com> Sender: netdev-owner@vger.kernel.org List-ID: T24gTW9uLCAyMDE3LTA1LTE1IGF0IDA2OjUyICswMjAwLCBCasO2cm4gVMO2cGVsIHdyb3RlOg0K PiBGcm9tOiBCasO2cm4gVMO2cGVsIDxiam9ybi50b3BlbEBpbnRlbC5jb20+DQo+IA0KPiBJbiBm OGI0NWI3NGNjNjIgKCJpNDBlL2k0MGV2ZjogVXNlIGJ1aWxkX3NrYiB0byBidWlsZCBmcmFtZXMi KQ0KPiBpNDBlX2J1aWxkX3NrYiB1cGRhdGVzIHRoZSBwYWdlX29mZnNldCBmaWVsZCB3aXRoIGFu IGluY29ycmVjdCBvZmZzZXQsDQo+IHdoaWNoIGNhbiBsZWFkIHRvIGRhdGEgY29ycnVwdGlvbi4g VGhpcyBwYXRjaCB1cGRhdGVzIHBhZ2Vfb2Zmc2V0DQo+IGNvcnJlY3RseSwgYnkgcHJvcGVybHkg c2V0dGluZyB0cnVlc2l6ZS4NCj4gDQo+IE5vdGUgdGhhdCB0aGUgYnVnIG9ubHkgYXBwZWFycyBv biBhcmNoaXRlY3R1cmVzIHdoZXJlIFBBR0VfU0laRSBpcw0KPiA4MTkyIG9yIGxhcmdlci4NCj4g DQo+IEZpeGVzOiBmOGI0NWI3NGNjNjIgKCJpNDBlL2k0MGV2ZjogVXNlIGJ1aWxkX3NrYiB0byBi dWlsZCBmcmFtZXMiKQ0KPiBTaWduZWQtb2ZmLWJ5OiBCasO2cm4gVMO2cGVsIDxiam9ybi50b3Bl bEBpbnRlbC5jb20+DQoNCkFja2VkLWJ5OiBBbGV4YW5kZXIgRHV5Y2sgPGFsZXhhbmRlci5oLmR1 eWNrQGludGVsLmNvbT4NCg0KPiAtLS0NCj4gIGRyaXZlcnMvbmV0L2V0aGVybmV0L2ludGVsL2k0 MGUvaTQwZV90eHJ4LmMgICB8IDMgKystDQo+ICBkcml2ZXJzL25ldC9ldGhlcm5ldC9pbnRlbC9p NDBldmYvaTQwZV90eHJ4LmMgfCAzICsrLQ0KPiAgMiBmaWxlcyBjaGFuZ2VkLCA0IGluc2VydGlv bnMoKyksIDIgZGVsZXRpb25zKC0pDQo+IA0KPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9uZXQvZXRo ZXJuZXQvaW50ZWwvaTQwZS9pNDBlX3R4cnguYyBiL2RyaXZlcnMvbmV0L2V0aGVybmV0L2ludGVs L2k0MGUvaTQwZV90eHJ4LmMNCj4gaW5kZXggMjkzMjFhNjE2N2E2Li5jZDg5NGY0MDIzYjEgMTAw NjQ0DQo+IC0tLSBhL2RyaXZlcnMvbmV0L2V0aGVybmV0L2ludGVsL2k0MGUvaTQwZV90eHJ4LmMN Cj4gKysrIGIvZHJpdmVycy9uZXQvZXRoZXJuZXQvaW50ZWwvaTQwZS9pNDBlX3R4cnguYw0KPiBA QCAtMTg1NCw3ICsxODU0LDggQEAgc3RhdGljIHN0cnVjdCBza19idWZmICppNDBlX2J1aWxkX3Nr YihzdHJ1Y3QgaTQwZV9yaW5nICpyeF9yaW5nLA0KPiAgI2lmIChQQUdFX1NJWkUgPCA4MTkyKQ0K PiAgCXVuc2lnbmVkIGludCB0cnVlc2l6ZSA9IGk0MGVfcnhfcGdfc2l6ZShyeF9yaW5nKSAvIDI7 DQo+ICAjZWxzZQ0KPiAtCXVuc2lnbmVkIGludCB0cnVlc2l6ZSA9IFNLQl9EQVRBX0FMSUdOKHNp emUpOw0KPiArCXVuc2lnbmVkIGludCB0cnVlc2l6ZSA9IFNLQl9EQVRBX0FMSUdOKHNpemVvZihz dHJ1Y3Qgc2tiX3NoYXJlZF9pbmZvKSkgKw0KPiArCQkJCVNLQl9EQVRBX0FMSUdOKEk0MEVfU0tC X1BBRCArIHNpemUpOw0KPiAgI2VuZGlmDQo+ICAJc3RydWN0IHNrX2J1ZmYgKnNrYjsNCj4gIA0K PiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9uZXQvZXRoZXJuZXQvaW50ZWwvaTQwZXZmL2k0MGVfdHhy eC5jIGIvZHJpdmVycy9uZXQvZXRoZXJuZXQvaW50ZWwvaTQwZXZmL2k0MGVfdHhyeC5jDQo+IGlu ZGV4IGRmZTI0MWExMmFkMC4uMTJiMDJlNTMwNTAzIDEwMDY0NA0KPiAtLS0gYS9kcml2ZXJzL25l dC9ldGhlcm5ldC9pbnRlbC9pNDBldmYvaTQwZV90eHJ4LmMNCj4gKysrIGIvZHJpdmVycy9uZXQv ZXRoZXJuZXQvaW50ZWwvaTQwZXZmL2k0MGVfdHhyeC5jDQo+IEBAIC0xMTkwLDcgKzExOTAsOCBA QCBzdGF0aWMgc3RydWN0IHNrX2J1ZmYgKmk0MGVfYnVpbGRfc2tiKHN0cnVjdCBpNDBlX3Jpbmcg KnJ4X3JpbmcsDQo+ICAjaWYgKFBBR0VfU0laRSA8IDgxOTIpDQo+ICAJdW5zaWduZWQgaW50IHRy dWVzaXplID0gaTQwZV9yeF9wZ19zaXplKHJ4X3JpbmcpIC8gMjsNCj4gICNlbHNlDQo+IC0JdW5z aWduZWQgaW50IHRydWVzaXplID0gU0tCX0RBVEFfQUxJR04oc2l6ZSk7DQo+ICsJdW5zaWduZWQg aW50IHRydWVzaXplID0gU0tCX0RBVEFfQUxJR04oc2l6ZW9mKHN0cnVjdCBza2Jfc2hhcmVkX2lu Zm8pKSArDQo+ICsJCQkJU0tCX0RBVEFfQUxJR04oSTQwRV9TS0JfUEFEICsgc2l6ZSk7DQo+ICAj ZW5kaWYNCj4gIAlzdHJ1Y3Qgc2tfYnVmZiAqc2tiOw0KPiAgDQo=