From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Nicholas Piggin <npiggin@gmail.com>, linuxppc-dev@lists.ozlabs.org
Cc: benh@ozlabs.au.ibm.com, tuliom@linux.vnet.ibm.com,
Steve Munroe <sjmunroe@us.ibm.com>,
Bill Schmidt <wschmidt@us.ibm.com>,
Peter Bergner <bergner@us.ibm.com>,
Michael Neuling <michael.neuling@au1.ibm.com>
Subject: Re: [PATCH] powerpc: add PPC_FEATURE userspace bits for SCV and DARN instructions
Date: Mon, 22 May 2017 08:14:41 +1000 [thread overview]
Message-ID: <1495404881.3092.141.camel@kernel.crashing.org> (raw)
In-Reply-To: <20170520042949.29359-1-npiggin@gmail.com>
On Sat, 2017-05-20 at 14:29 +1000, Nicholas Piggin wrote:
> Providing "scv" support to userspace requires kernel support, so it
> must be advertised as independently to the base ISA 3 instruction set.
>
> The darn instruction relies on firmware enablement, so it has been
> decided to split this out from the core ISA 3 feature as well.
>
> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> ---
> These uapi changes have been agreed by powerpc toolchain and firmware
> teams. I believe this completes our anticipated requirements for user
> feature advertisement for ISA v3.0B.
>
> arch/powerpc/include/uapi/asm/cputable.h | 2 ++
> arch/powerpc/kernel/cputable.c | 3 ++-
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/arch/powerpc/include/uapi/asm/cputable.h b/arch/powerpc/include/uapi/asm/cputable.h
> index 3e7ce86d5c13..4d877144f377 100644
> --- a/arch/powerpc/include/uapi/asm/cputable.h
> +++ b/arch/powerpc/include/uapi/asm/cputable.h
> @@ -46,6 +46,8 @@
> #define PPC_FEATURE2_HTM_NOSC 0x01000000
> #define PPC_FEATURE2_ARCH_3_00 0x00800000 /* ISA 3.00 */
> #define PPC_FEATURE2_HAS_IEEE128 0x00400000 /* VSX IEEE Binary Float 128-bit */
> +#define PPC_FEATURE2_DARN 0x00200000 /* darn random number insn */
> +#define PPC_FEATURE2_SCV 0x00100000 /* scv syscall */
>
> /*
> * IMPORTANT!
> diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
> index 9b3e88b1a9c8..6f849832a669 100644
> --- a/arch/powerpc/kernel/cputable.c
> +++ b/arch/powerpc/kernel/cputable.c
> @@ -124,7 +124,8 @@ extern void __restore_cpu_e6500(void);
> #define COMMON_USER_POWER9 COMMON_USER_POWER8
> #define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \
> PPC_FEATURE2_ARCH_3_00 | \
> - PPC_FEATURE2_HAS_IEEE128)
> + PPC_FEATURE2_HAS_IEEE128 | \
> + PPC_FEATURE2_DARN )
>
> #ifdef CONFIG_PPC_BOOK3E_64
> #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
next prev parent reply other threads:[~2017-05-21 22:15 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-20 4:29 [PATCH] powerpc: add PPC_FEATURE userspace bits for SCV and DARN instructions Nicholas Piggin
2017-05-21 22:14 ` Benjamin Herrenschmidt [this message]
2017-05-25 13:22 ` Michael Ellerman
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1495404881.3092.141.camel@kernel.crashing.org \
--to=benh@kernel.crashing.org \
--cc=benh@ozlabs.au.ibm.com \
--cc=bergner@us.ibm.com \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=michael.neuling@au1.ibm.com \
--cc=npiggin@gmail.com \
--cc=sjmunroe@us.ibm.com \
--cc=tuliom@linux.vnet.ibm.com \
--cc=wschmidt@us.ibm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.