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From: Chee, Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v5 3/5] arm: socfpga: Enable FPGA driver on SPL
Date: Wed, 24 May 2017 01:52:55 +0000	[thread overview]
Message-ID: <1495590775.23728.3.camel@intel.com> (raw)
In-Reply-To: <2ff5f3cf-b7ea-30c0-f28c-77be7c58ba6a@kernel.org>

On Sel, 2017-05-23 at 09:11 -0500, Dinh Nguyen wrote:
> 
> On 05/23/2017 01:25 AM, tien.fong.chee at intel.com wrote:
> > 
> > From: Tien Fong Chee <tien.fong.chee@intel.com>
> > 
> > Enable FPGA driver build for SPL. FPGA driver is needed for SPL
> > to configure and getting DDR up before loading U-boot into DDR and
> > booting from there.
> > 
> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> > ---
> >  drivers/Makefile                 | 1 +
> >  include/configs/socfpga_common.h | 1 +
> >  2 files changed, 2 insertions(+)
> > 
> > diff --git a/drivers/Makefile b/drivers/Makefile
> > index 4a4b237..bb35c9a 100644
> > --- a/drivers/Makefile
> > +++ b/drivers/Makefile
> > @@ -47,6 +47,7 @@ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/
> >  obj-$(CONFIG_SPL_SATA_SUPPORT) += block/
> >  obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/
> >  obj-$(CONFIG_SPL_MMC_SUPPORT) += block/
> > +obj-$(CONFIG_SPL_FPGA_SUPPORT) += fpga/
> >  endif
> >  
> >  ifdef CONFIG_TPL_BUILD
> > diff --git a/include/configs/socfpga_common.h
> > b/include/configs/socfpga_common.h
> > index da7e4ad..e74e7eb 100644
> > --- a/include/configs/socfpga_common.h
> > +++ b/include/configs/socfpga_common.h
> > @@ -110,6 +110,7 @@
> >  #define CONFIG_FPGA
> >  #define CONFIG_FPGA_ALTERA
> >  #define CONFIG_FPGA_SOCFPGA
> > +#define CONFIG_SPL_FPGA_SUPPORT
> This change should be in a separate patch.
> 
> Dinh

Okay

  reply	other threads:[~2017-05-24  1:52 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-23  6:24 [U-Boot] [PATCH v5 0/5] Add Intel Arria 10 SoC FPGA driver tien.fong.chee at intel.com
2017-05-23  6:24 ` [U-Boot] [PATCH v5 1/5] arm: socfpga: Remove unused passing parameter of socfpga_bridges_reset tien.fong.chee at intel.com
2017-05-23  6:25 ` [U-Boot] [PATCH v5 2/5] arm: socfpga: Restructure FPGA driver in the preparation to support A10 tien.fong.chee at intel.com
2017-05-23  6:25 ` [U-Boot] [PATCH v5 3/5] arm: socfpga: Enable FPGA driver on SPL tien.fong.chee at intel.com
2017-05-23 14:11   ` Dinh Nguyen
2017-05-24  1:52     ` Chee, Tien Fong [this message]
2017-05-23  6:25 ` [U-Boot] [PATCH v5 4/5] arm: socfpga: Move FPGA manager driver to FPGA driver tien.fong.chee at intel.com
2017-05-23  6:25 ` [U-Boot] [PATCH v5 5/5] arm: socfpga: Add FPGA driver support for Arria 10 tien.fong.chee at intel.com
  -- strict thread matches above, loose matches on Subject: below --
2017-05-23  5:23 [U-Boot] [PATCH v5 0/5] Add Intel Arria 10 SoC FPGA driver tien.fong.chee at intel.com
2017-05-23  5:23 ` [U-Boot] [PATCH v5 3/5] arm: socfpga: Enable FPGA driver on SPL tien.fong.chee at intel.com

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