diff for duplicates of <1495710058.5393.23.camel@synopsys.com> diff --git a/a/1.txt b/N1/1.txt index 0ea5951..b5bbbbe 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,41 +1,41 @@ Hi Noam, -On Thu, 2017-05-25@05:34 +0300, Noam Camus wrote: -> From: Noam Camus <noamca at mellanox.com> +On Thu, 2017-05-25 at 05:34 +0300, Noam Camus wrote: +> From: Noam Camus <noamca@mellanox.com> > > Due to a HW bug in NPS400 we get from time to time false TLB miss. > Workaround this by validating each miss. > -> Signed-off-by: Noam Camus <noamca at mellanox.com> +> Signed-off-by: Noam Camus <noamca@mellanox.com> > --- -> ?arch/arc/mm/tlbex.S |???10 ++++++++++ -> ?1 files changed, 10 insertions(+), 0 deletions(-) +> arch/arc/mm/tlbex.S | 10 ++++++++++ +> 1 files changed, 10 insertions(+), 0 deletions(-) > > diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S > index b30e4e3..1d48723 100644 > --- a/arch/arc/mm/tlbex.S > +++ b/arch/arc/mm/tlbex.S > @@ -274,6 +274,13 @@ ex_saved_reg1: -> ?.macro COMMIT_ENTRY_TO_MMU -> ?#if (CONFIG_ARC_MMU_VER < 4) -> ? +> .macro COMMIT_ENTRY_TO_MMU +> #if (CONFIG_ARC_MMU_VER < 4) +> > +#ifdef CONFIG_EZNPS_MTM_EXT > + /* verify if entry for this vaddr+ASID already exists */ -> + sr????TLBProbe, [ARC_REG_TLBCOMMAND] -> + lr????r0, [ARC_REG_TLBINDEX] +> + sr TLBProbe, [ARC_REG_TLBCOMMAND] +> + lr r0, [ARC_REG_TLBINDEX] > + bbit0 r0, 31, 88f > +#endif That's funny. I think we used to have something like that in the past. -> ? /* Get free TLB slot: Set = computed from vaddr, way = random */ -> ? sr??TLBGetIndex, [ARC_REG_TLBCOMMAND] -> ? +> /* Get free TLB slot: Set = computed from vaddr, way = random */ +> sr TLBGetIndex, [ARC_REG_TLBCOMMAND] +> > @@ -287,6 +294,9 @@ ex_saved_reg1: -> ?#else -> ? sr TLBInsertEntry, [ARC_REG_TLBCOMMAND] -> ?#endif +> #else +> sr TLBInsertEntry, [ARC_REG_TLBCOMMAND] +> #endif > +#ifdef CONFIG_EZNPS_MTM_EXT > +88: > +#endif diff --git a/a/content_digest b/N1/content_digest index 3563901..ea20512 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,49 +1,51 @@ "ref\01495679660-9598-1-git-send-email-noamca@mellanox.com\0" "ref\01495679660-9598-7-git-send-email-noamca@mellanox.com\0" - "From\0Alexey.Brodkin@synopsys.com (Alexey Brodkin)\0" - "Subject\0[PATCH 06/10] ARC: [plat-eznps] Fix TLB Errata\0" + "From\0Alexey Brodkin <Alexey.Brodkin@synopsys.com>\0" + "Subject\0Re: [PATCH 06/10] ARC: [plat-eznps] Fix TLB Errata\0" "Date\0Thu, 25 May 2017 11:00:59 +0000\0" - "To\0linux-snps-arc@lists.infradead.org\0" + "To\0noamca@mellanox.com <noamca@mellanox.com>\0" + "Cc\0linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>" + " linux-snps-arc@lists.infradead.org <linux-snps-arc@lists.infradead.org>\0" "\00:1\0" "b\0" "Hi Noam,\n" "\n" - "On Thu, 2017-05-25@05:34 +0300, Noam Camus wrote:\n" - "> From: Noam Camus <noamca at mellanox.com>\n" + "On Thu, 2017-05-25 at 05:34 +0300, Noam Camus wrote:\n" + "> From: Noam Camus <noamca@mellanox.com>\n" "> \n" "> Due to a HW bug in NPS400 we get from time to time false TLB miss.\n" "> Workaround this by validating each miss.\n" "> \n" - "> Signed-off-by: Noam Camus <noamca at mellanox.com>\n" + "> Signed-off-by: Noam Camus <noamca@mellanox.com>\n" "> ---\n" - "> ?arch/arc/mm/tlbex.S |???10 ++++++++++\n" - "> ?1 files changed, 10 insertions(+), 0 deletions(-)\n" + "> \302\240arch/arc/mm/tlbex.S |\302\240\302\240\302\24010 ++++++++++\n" + "> \302\2401 files changed, 10 insertions(+), 0 deletions(-)\n" "> \n" "> diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S\n" "> index b30e4e3..1d48723 100644\n" "> --- a/arch/arc/mm/tlbex.S\n" "> +++ b/arch/arc/mm/tlbex.S\n" "> @@ -274,6 +274,13 @@ ex_saved_reg1:\n" - "> ?.macro COMMIT_ENTRY_TO_MMU\n" - "> ?#if (CONFIG_ARC_MMU_VER < 4)\n" - "> ?\n" + "> \302\240.macro COMMIT_ENTRY_TO_MMU\n" + "> \302\240#if (CONFIG_ARC_MMU_VER < 4)\n" + "> \302\240\n" "> +#ifdef CONFIG_EZNPS_MTM_EXT\n" "> +\t/* verify if entry for this vaddr+ASID already exists */\n" - "> +\tsr????TLBProbe, [ARC_REG_TLBCOMMAND]\n" - "> +\tlr????r0, [ARC_REG_TLBINDEX]\n" + "> +\tsr\302\240\302\240\302\240\302\240TLBProbe, [ARC_REG_TLBCOMMAND]\n" + "> +\tlr\302\240\302\240\302\240\302\240r0, [ARC_REG_TLBINDEX]\n" "> +\tbbit0 r0, 31, 88f\n" "> +#endif\n" "\n" "That's funny. I think we used to have something like that in the past.\n" "\n" "\n" - "> ?\t/* Get free TLB slot: Set = computed from vaddr, way = random */\n" - "> ?\tsr??TLBGetIndex, [ARC_REG_TLBCOMMAND]\n" - "> ?\n" + "> \302\240\t/* Get free TLB slot: Set = computed from vaddr, way = random */\n" + "> \302\240\tsr\302\240\302\240TLBGetIndex, [ARC_REG_TLBCOMMAND]\n" + "> \302\240\n" "> @@ -287,6 +294,9 @@ ex_saved_reg1:\n" - "> ?#else\n" - "> ?\tsr TLBInsertEntry, [ARC_REG_TLBCOMMAND]\n" - "> ?#endif\n" + "> \302\240#else\n" + "> \302\240\tsr TLBInsertEntry, [ARC_REG_TLBCOMMAND]\n" + "> \302\240#endif\n" "> +#ifdef CONFIG_EZNPS_MTM_EXT\n" "> +88:\n" "> +#endif\n" @@ -53,4 +55,4 @@ "\n" -Alexey -bb9b5651620a882d68b3180e9e8bb4acd8f49ee9a37f6eadb7931f84abf8b782 +907bb198fe76ca6c006a9f37643408092181cad0ea4caa01a111ef3173833fb2
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