diff for duplicates of <1495710896.5393.32.camel@synopsys.com> diff --git a/a/1.txt b/N1/1.txt index 3a2f9be..26464e6 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,7 +1,7 @@ Hi Noam, -On Thu, 2017-05-25@05:34 +0300, Noam Camus wrote: -> From: Noam Camus <noamca at mellanox.com> +On Thu, 2017-05-25 at 05:34 +0300, Noam Camus wrote: +> From: Noam Camus <noamca@mellanox.com> > > This commit adds the configuration CONFIG_EZNPS_MEM_ERROR. > If set, it will cause the kernel to handle user memory error @@ -9,29 +9,29 @@ On Thu, 2017-05-25@05:34 +0300, Noam Camus wrote: > It is required in order to align the NPS simulator memory > error handling to the one of the NPS400 real chip behavior. > -> Signed-off-by: Elad Kanfi <eladkan at mellanox.com> -> Signed-off-by: Noam Camus <noamca at mellanox.com> +> Signed-off-by: Elad Kanfi <eladkan@mellanox.com> +> Signed-off-by: Noam Camus <noamca@mellanox.com> > --- -> ?arch/arc/kernel/entry-compact.S |???11 +++++++++++ -> ?arch/arc/plat-eznps/Kconfig?????|???11 +++++++++++ -> ?2 files changed, 22 insertions(+), 0 deletions(-) +> arch/arc/kernel/entry-compact.S | 11 +++++++++++ +> arch/arc/plat-eznps/Kconfig | 11 +++++++++++ +> 2 files changed, 22 insertions(+), 0 deletions(-) > > diff --git a/arch/arc/kernel/entry-compact.S b/arch/arc/kernel/entry-compact.S > index f285dbb..d152d36 100644 > --- a/arch/arc/kernel/entry-compact.S > +++ b/arch/arc/kernel/entry-compact.S > @@ -203,6 +203,17 @@ END(handle_interrupt_level2) -> ?; --------------------------------------------- -> ?ENTRY(mem_service) -> ? +> ; --------------------------------------------- +> ENTRY(mem_service) +> > +#if defined(CONFIG_EZNPS_MEM_ERROR) -> +????????; SW workaround to cover up on a difference between -> +????????; NPS real chip and simulator behaviors. -> +????????; NPS real chip will activate a machine check exception -> +????????; in case of memory error, while the simulator will -> +????????; trigger a level 2 interrupt. Therefor this code section -> +????????; should be reached only in simulation mode. -> +????????; DEAD END: display Regs and HALT +> + ; SW workaround to cover up on a difference between +> + ; NPS real chip and simulator behaviors. +> + ; NPS real chip will activate a machine check exception +> + ; in case of memory error, while the simulator will +> + ; trigger a level 2 interrupt. Therefor this code section +> + ; should be reached only in simulation mode. +> + ; DEAD END: display Regs and HALT I'm not really buying that. diff --git a/a/content_digest b/N1/content_digest index b465252..5c8eb9b 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,15 +1,18 @@ "ref\01495679660-9598-1-git-send-email-noamca@mellanox.com\0" "ref\01495679660-9598-11-git-send-email-noamca@mellanox.com\0" - "From\0Alexey.Brodkin@synopsys.com (Alexey Brodkin)\0" - "Subject\0[PATCH 10/10] ARC: [plat-eznps] Handle memory error as an exception\0" + "From\0Alexey Brodkin <Alexey.Brodkin@synopsys.com>\0" + "Subject\0Re: [PATCH 10/10] ARC: [plat-eznps] Handle memory error as an exception\0" "Date\0Thu, 25 May 2017 11:14:59 +0000\0" - "To\0linux-snps-arc@lists.infradead.org\0" + "To\0noamca@mellanox.com <noamca@mellanox.com>\0" + "Cc\0linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>" + eladkan@mellanox.com <eladkan@mellanox.com> + " linux-snps-arc@lists.infradead.org <linux-snps-arc@lists.infradead.org>\0" "\00:1\0" "b\0" "Hi Noam,\n" "\n" - "On Thu, 2017-05-25@05:34 +0300, Noam Camus wrote:\n" - "> From: Noam Camus <noamca at mellanox.com>\n" + "On Thu, 2017-05-25 at 05:34 +0300, Noam Camus wrote:\n" + "> From: Noam Camus <noamca@mellanox.com>\n" "> \n" "> This commit adds the configuration CONFIG_EZNPS_MEM_ERROR.\n" "> If set, it will cause the kernel to handle user memory error\n" @@ -17,29 +20,29 @@ "> It is required in order to align the NPS simulator memory\n" "> error handling to the one of the NPS400 real chip behavior.\n" "> \n" - "> Signed-off-by: Elad Kanfi <eladkan at mellanox.com>\n" - "> Signed-off-by: Noam Camus <noamca at mellanox.com>\n" + "> Signed-off-by: Elad Kanfi <eladkan@mellanox.com>\n" + "> Signed-off-by: Noam Camus <noamca@mellanox.com>\n" "> ---\n" - "> ?arch/arc/kernel/entry-compact.S |???11 +++++++++++\n" - "> ?arch/arc/plat-eznps/Kconfig?????|???11 +++++++++++\n" - "> ?2 files changed, 22 insertions(+), 0 deletions(-)\n" + "> \302\240arch/arc/kernel/entry-compact.S |\302\240\302\240\302\24011 +++++++++++\n" + "> \302\240arch/arc/plat-eznps/Kconfig\302\240\302\240\302\240\302\240\302\240|\302\240\302\240\302\24011 +++++++++++\n" + "> \302\2402 files changed, 22 insertions(+), 0 deletions(-)\n" "> \n" "> diff --git a/arch/arc/kernel/entry-compact.S b/arch/arc/kernel/entry-compact.S\n" "> index f285dbb..d152d36 100644\n" "> --- a/arch/arc/kernel/entry-compact.S\n" "> +++ b/arch/arc/kernel/entry-compact.S\n" "> @@ -203,6 +203,17 @@ END(handle_interrupt_level2)\n" - "> ?; ---------------------------------------------\n" - "> ?ENTRY(mem_service)\n" - "> ?\n" + "> \302\240; ---------------------------------------------\n" + "> \302\240ENTRY(mem_service)\n" + "> \302\240\n" "> +#if defined(CONFIG_EZNPS_MEM_ERROR)\n" - "> +????????; SW workaround to cover up on a difference between\n" - "> +????????; NPS real chip and simulator behaviors.\n" - "> +????????; NPS real chip will activate a machine check exception\n" - "> +????????; in case of memory error, while the simulator will\n" - "> +????????; trigger a level 2 interrupt. Therefor this code section\n" - "> +????????; should be reached only in simulation mode.\n" - "> +????????; DEAD END: display Regs and HALT\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240; SW workaround to cover up on a difference between\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240; NPS real chip and simulator behaviors.\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240; NPS real chip will activate a machine check exception\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240; in case of memory error, while the simulator will\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240; trigger a level 2 interrupt. Therefor this code section\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240; should be reached only in simulation mode.\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240; DEAD END: display Regs and HALT\n" "\n" "I'm not really buying that.\n" "\n" @@ -50,4 +53,4 @@ "\n" -Alexey -ba7e3aa6c91c85a64bc0b6bfd20564be7cb900055eb0224c0075d178d26a77d6 +cbee8e742aade41aac579de03c4d06f8ea58ae72fcb479d40b542da9e5fea087
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