diff for duplicates of <1496606325.3552.16.camel@baylibre.com> diff --git a/a/1.txt b/N1/1.txt index df4b4ef..b83ac25 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -14,12 +14,12 @@ On Sun, 2017-06-04 at 20:33 +0200, Martin Blumenstingl wrote: > all commented out code). > The difference between the Meson8 and Meson8b clock gates seem to be: > - Meson8 has AIU_PCLK, HDMI_RX, VCLK2_ENCT, VCLK2_ENCL, UART3, -> ? CSI_DIG_CLKIN gates which don't seem to be available on Meson8b +> CSI_DIG_CLKIN gates which don't seem to be available on Meson8b > - the gate on Meson8 for bit 7 seems to be named "_1200XXX" instead -> ? of "PERIPHS_TOP" (on Meson8b) +> of "PERIPHS_TOP" (on Meson8b) > - Meson8b has a SANA gate which doesn't seem to exist on Meson8 (or -> ? on Meson8 the same bit is used by the UART3 gate in Amlogic's GPL -> ? kernel sources) +> on Meson8 the same bit is used by the UART3 gate in Amlogic's GPL +> kernel sources) > None of these gates is added for now, since it's unclear whether these > definitions are actually correct (the VCLK2_ENCT gate for example is > defined, but only used in some commented block). @@ -35,14 +35,14 @@ On Sun, 2017-06-04 at 20:33 +0200, Martin Blumenstingl wrote: > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- -> ?.../devicetree/bindings/clock/amlogic,meson8b-clkc.txt????????| 11 +++++++--- +> .../devicetree/bindings/clock/amlogic,meson8b-clkc.txt | 11 +++++++--- I think you should split the binding documentation and clk changes into separate patches. > - -> ?drivers/clk/meson/Kconfig?????????????????????????????????????|??6 +++--- -> ?drivers/clk/meson/meson8b.c???????????????????????????????????|??5 ++++- +> drivers/clk/meson/Kconfig | 6 +++--- +> drivers/clk/meson/meson8b.c | 5 ++++- The change being more platform than clock related, I'd prefer if Kevin or Carlo ack it before we apply it. @@ -55,7 +55,7 @@ people to help you. Cheers Jerome -> ?3 files changed, 14 insertions(+), 8 deletions(-) +> 3 files changed, 14 insertions(+), 8 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt > b/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt @@ -65,59 +65,59 @@ Jerome > @@ -1,11 +1,14 @@ > -* Amlogic Meson8b Clock and Reset Unit > +* Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Unit -> ? +> > -The Amlogic Meson8b clock controller generates and supplies clock to various > -controllers within the SoC. > +The Amlogic Meson8 / Meson8b / Meson8m2 clock controller generates and > +supplies clock to various controllers within the SoC. -> ? -> ?Required Properties: -> ? +> +> Required Properties: +> > -- compatible: should be "amlogic,meson8b-clkc" > +- compatible: must be one of: > + - "amlogic,meson8-clkc" for Meson8 (S802) SoCs > + - "amlogic,meson8b-clkc" for Meson8 (S805) SoCs > + - "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs -> ?- reg: it must be composed by two tuples: -> ? 0) physical base address of the xtal register and length of memory -> ? ???mapped region. +> - reg: it must be composed by two tuples: +> 0) physical base address of the xtal register and length of memory +> mapped region. > diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig > index 19480bcc7046..4a806203b73c 100644 > --- a/drivers/clk/meson/Kconfig > +++ b/drivers/clk/meson/Kconfig > @@ -7,9 +7,9 @@ config COMMON_CLK_MESON8B -> ? bool -> ? depends on COMMON_CLK_AMLOGIC -> ? help -> - ??Support for the clock controller on AmLogic S805 devices, aka -> - ??meson8b. Say Y if you want peripherals and CPU frequency scaling to -> - ??work. -> + ??Support for the clock controller on AmLogic S802 (Meson8), -> + ??S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you -> + ??want peripherals and CPU frequency scaling to work. -> ? -> ?config COMMON_CLK_GXBB -> ? bool +> bool +> depends on COMMON_CLK_AMLOGIC +> help +> - Support for the clock controller on AmLogic S805 devices, aka +> - meson8b. Say Y if you want peripherals and CPU frequency scaling to +> - work. +> + Support for the clock controller on AmLogic S802 (Meson8), +> + S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you +> + want peripherals and CPU frequency scaling to work. +> +> config COMMON_CLK_GXBB +> bool > diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c > index bfd1690724de..94c55e79cdde 100644 > --- a/drivers/clk/meson/meson8b.c > +++ b/drivers/clk/meson/meson8b.c > @@ -1,5 +1,6 @@ -> ?/* +> /* > - * AmLogic S805 / Meson8b Clock Controller Driver > + * AmLogic S802 (Meson8) / S805 (Meson8b) / S812 (Meson8m2) Clock Controller > + * Driver -> ? * -> ? * Copyright (c) 2015 Endless Mobile, Inc. -> ? * Author: Carlo Caione <carlo@endlessm.com> +> * +> * Copyright (c) 2015 Endless Mobile, Inc. +> * Author: Carlo Caione <carlo@endlessm.com> > @@ -777,7 +778,9 @@ static int meson8b_clkc_probe(struct platform_device > *pdev) -> ?} -> ? -> ?static const struct of_device_id meson8b_clkc_match_table[] = { +> } +> +> static const struct of_device_id meson8b_clkc_match_table[] = { > + { .compatible = "amlogic,meson8-clkc" }, -> ? { .compatible = "amlogic,meson8b-clkc" }, +> { .compatible = "amlogic,meson8b-clkc" }, > + { .compatible = "amlogic,meson8m2-clkc" }, -> ? { } -> ?}; -> ? +> { } +> }; +> diff --git a/a/content_digest b/N1/content_digest index c78f5f1..41e2a9e 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,9 +1,21 @@ "ref\020170604183341.21417-1-martin.blumenstingl@googlemail.com\0" "ref\020170604183341.21417-2-martin.blumenstingl@googlemail.com\0" - "From\0jbrunet@baylibre.com (Jerome Brunet)\0" - "Subject\0[PATCH 1/3] clk: meson: meson8b: add compatibles for Meson8 and Meson8m2\0" + "From\0Jerome Brunet <jbrunet@baylibre.com>\0" + "Subject\0Re: [PATCH 1/3] clk: meson: meson8b: add compatibles for Meson8 and Meson8m2\0" "Date\0Sun, 04 Jun 2017 21:58:45 +0200\0" - "To\0linus-amlogic@lists.infradead.org\0" + "To\0Martin Blumenstingl <martin.blumenstingl@googlemail.com>" + narmstrong@baylibre.com + linux-amlogic@lists.infradead.org + " linux-clk@vger.kernel.org\0" + "Cc\0mturquette@baylibre.com" + sboyd@codeaurora.org + robh+dt@kernel.org + mark.rutland@arm.com + carlo@caione.org + khilman@baylibre.com + linux@armlinux.org.uk + devicetree@vger.kernel.org + " linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Sun, 2017-06-04 at 20:33 +0200, Martin Blumenstingl wrote:\n" @@ -22,12 +34,12 @@ "> all commented out code).\n" "> The difference between the Meson8 and Meson8b clock gates seem to be:\n" "> - Meson8 has AIU_PCLK, HDMI_RX, VCLK2_ENCT, VCLK2_ENCL, UART3,\n" - "> ? CSI_DIG_CLKIN gates which don't seem to be available on Meson8b\n" + "> \302\240 CSI_DIG_CLKIN gates which don't seem to be available on Meson8b\n" "> - the gate on Meson8 for bit 7 seems to be named \"_1200XXX\" instead\n" - "> ? of \"PERIPHS_TOP\" (on Meson8b)\n" + "> \302\240 of \"PERIPHS_TOP\" (on Meson8b)\n" "> - Meson8b has a SANA gate which doesn't seem to exist on Meson8 (or\n" - "> ? on Meson8 the same bit is used by the UART3 gate in Amlogic's GPL\n" - "> ? kernel sources)\n" + "> \302\240 on Meson8 the same bit is used by the UART3 gate in Amlogic's GPL\n" + "> \302\240 kernel sources)\n" "> None of these gates is added for now, since it's unclear whether these\n" "> definitions are actually correct (the VCLK2_ENCT gate for example is\n" "> defined, but only used in some commented block).\n" @@ -43,14 +55,14 @@ "> \n" "> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>\n" "> ---\n" - "> ?.../devicetree/bindings/clock/amlogic,meson8b-clkc.txt????????| 11 +++++++---\n" + "> \302\240.../devicetree/bindings/clock/amlogic,meson8b-clkc.txt\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240| 11 +++++++---\n" "\n" "I think you should split the binding documentation and clk changes into separate\n" "patches.\n" "\n" "> -\n" - "> ?drivers/clk/meson/Kconfig?????????????????????????????????????|??6 +++---\n" - "> ?drivers/clk/meson/meson8b.c???????????????????????????????????|??5 ++++-\n" + "> \302\240drivers/clk/meson/Kconfig\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2406 +++---\n" + "> \302\240drivers/clk/meson/meson8b.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2405 ++++-\n" "\n" "The change being more platform than clock related, I'd prefer if Kevin or Carlo\n" "ack it before we apply it.\n" @@ -63,7 +75,7 @@ "Cheers\n" "Jerome\n" "\n" - "> ?3 files changed, 14 insertions(+), 8 deletions(-)\n" + "> \302\2403 files changed, 14 insertions(+), 8 deletions(-)\n" "> \n" "> diff --git a/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt\n" "> b/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt\n" @@ -73,61 +85,61 @@ "> @@ -1,11 +1,14 @@\n" "> -* Amlogic Meson8b Clock and Reset Unit\n" "> +* Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Unit\n" - "> ?\n" + "> \302\240\n" "> -The Amlogic Meson8b clock controller generates and supplies clock to various\n" "> -controllers within the SoC.\n" "> +The Amlogic Meson8 / Meson8b / Meson8m2 clock controller generates and\n" "> +supplies clock to various controllers within the SoC.\n" - "> ?\n" - "> ?Required Properties:\n" - "> ?\n" + "> \302\240\n" + "> \302\240Required Properties:\n" + "> \302\240\n" "> -- compatible: should be \"amlogic,meson8b-clkc\"\n" "> +- compatible: must be one of:\n" "> +\t- \"amlogic,meson8-clkc\" for Meson8 (S802) SoCs\n" "> +\t- \"amlogic,meson8b-clkc\" for Meson8 (S805) SoCs\n" "> +\t- \"amlogic,meson8m2-clkc\" for Meson8m2 (S812) SoCs\n" - "> ?- reg: it must be composed by two tuples:\n" - "> ?\t0) physical base address of the xtal register and length of memory\n" - "> ?\t???mapped region.\n" + "> \302\240- reg: it must be composed by two tuples:\n" + "> \302\240\t0) physical base address of the xtal register and length of memory\n" + "> \302\240\t\302\240\302\240\302\240mapped region.\n" "> diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig\n" "> index 19480bcc7046..4a806203b73c 100644\n" "> --- a/drivers/clk/meson/Kconfig\n" "> +++ b/drivers/clk/meson/Kconfig\n" "> @@ -7,9 +7,9 @@ config COMMON_CLK_MESON8B\n" - "> ?\tbool\n" - "> ?\tdepends on COMMON_CLK_AMLOGIC\n" - "> ?\thelp\n" - "> -\t??Support for the clock controller on AmLogic S805 devices, aka\n" - "> -\t??meson8b. Say Y if you want peripherals and CPU frequency scaling to\n" - "> -\t??work.\n" - "> +\t??Support for the clock controller on AmLogic S802 (Meson8),\n" - "> +\t??S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you\n" - "> +\t??want peripherals and CPU frequency scaling to work.\n" - "> ?\n" - "> ?config COMMON_CLK_GXBB\n" - "> ?\tbool\n" + "> \302\240\tbool\n" + "> \302\240\tdepends on COMMON_CLK_AMLOGIC\n" + "> \302\240\thelp\n" + "> -\t\302\240\302\240Support for the clock controller on AmLogic S805 devices, aka\n" + "> -\t\302\240\302\240meson8b. Say Y if you want peripherals and CPU frequency scaling to\n" + "> -\t\302\240\302\240work.\n" + "> +\t\302\240\302\240Support for the clock controller on AmLogic S802 (Meson8),\n" + "> +\t\302\240\302\240S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you\n" + "> +\t\302\240\302\240want peripherals and CPU frequency scaling to work.\n" + "> \302\240\n" + "> \302\240config COMMON_CLK_GXBB\n" + "> \302\240\tbool\n" "> diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c\n" "> index bfd1690724de..94c55e79cdde 100644\n" "> --- a/drivers/clk/meson/meson8b.c\n" "> +++ b/drivers/clk/meson/meson8b.c\n" "> @@ -1,5 +1,6 @@\n" - "> ?/*\n" + "> \302\240/*\n" "> - * AmLogic S805 / Meson8b Clock Controller Driver\n" "> + * AmLogic S802 (Meson8) / S805 (Meson8b) / S812 (Meson8m2) Clock Controller\n" "> + * Driver\n" - "> ? *\n" - "> ? * Copyright (c) 2015 Endless Mobile, Inc.\n" - "> ? * Author: Carlo Caione <carlo@endlessm.com>\n" + "> \302\240 *\n" + "> \302\240 * Copyright (c) 2015 Endless Mobile, Inc.\n" + "> \302\240 * Author: Carlo Caione <carlo@endlessm.com>\n" "> @@ -777,7 +778,9 @@ static int meson8b_clkc_probe(struct platform_device\n" "> *pdev)\n" - "> ?}\n" - "> ?\n" - "> ?static const struct of_device_id meson8b_clkc_match_table[] = {\n" + "> \302\240}\n" + "> \302\240\n" + "> \302\240static const struct of_device_id meson8b_clkc_match_table[] = {\n" "> +\t{ .compatible = \"amlogic,meson8-clkc\" },\n" - "> ?\t{ .compatible = \"amlogic,meson8b-clkc\" },\n" + "> \302\240\t{ .compatible = \"amlogic,meson8b-clkc\" },\n" "> +\t{ .compatible = \"amlogic,meson8m2-clkc\" },\n" - "> ?\t{ }\n" - "> ?};\n" - > ? + "> \302\240\t{ }\n" + "> \302\240};\n" + > -69dd2759413b1d34a4fa99fed391f2a967b0bf5cf906258b59d10633bf30f67d +7fff14957b84f4e1119652311f66df7c319697168869989268030a9d2fb19d10
diff --git a/a/content_digest b/N2/content_digest index c78f5f1..5d80f38 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -3,7 +3,7 @@ "From\0jbrunet@baylibre.com (Jerome Brunet)\0" "Subject\0[PATCH 1/3] clk: meson: meson8b: add compatibles for Meson8 and Meson8m2\0" "Date\0Sun, 04 Jun 2017 21:58:45 +0200\0" - "To\0linus-amlogic@lists.infradead.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Sun, 2017-06-04 at 20:33 +0200, Martin Blumenstingl wrote:\n" @@ -130,4 +130,4 @@ "> ?};\n" > ? -69dd2759413b1d34a4fa99fed391f2a967b0bf5cf906258b59d10633bf30f67d +7a1a00b44f0c65eb3c263936ffe80002a562a31464ca04a362ce5853e5b41c04
diff --git a/a/1.txt b/N3/1.txt index df4b4ef..4cedf45 100644 --- a/a/1.txt +++ b/N3/1.txt @@ -14,12 +14,12 @@ On Sun, 2017-06-04 at 20:33 +0200, Martin Blumenstingl wrote: > all commented out code). > The difference between the Meson8 and Meson8b clock gates seem to be: > - Meson8 has AIU_PCLK, HDMI_RX, VCLK2_ENCT, VCLK2_ENCL, UART3, -> ? CSI_DIG_CLKIN gates which don't seem to be available on Meson8b +> CSI_DIG_CLKIN gates which don't seem to be available on Meson8b > - the gate on Meson8 for bit 7 seems to be named "_1200XXX" instead -> ? of "PERIPHS_TOP" (on Meson8b) +> of "PERIPHS_TOP" (on Meson8b) > - Meson8b has a SANA gate which doesn't seem to exist on Meson8 (or -> ? on Meson8 the same bit is used by the UART3 gate in Amlogic's GPL -> ? kernel sources) +> on Meson8 the same bit is used by the UART3 gate in Amlogic's GPL +> kernel sources) > None of these gates is added for now, since it's unclear whether these > definitions are actually correct (the VCLK2_ENCT gate for example is > defined, but only used in some commented block). @@ -33,16 +33,16 @@ On Sun, 2017-06-04 at 20:33 +0200, Martin Blumenstingl wrote: > None of these VPU clocks are not supported by our mainline meson8b > clock driver yet though. > -> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> +> Signed-off-by: Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org> > --- -> ?.../devicetree/bindings/clock/amlogic,meson8b-clkc.txt????????| 11 +++++++--- +> .../devicetree/bindings/clock/amlogic,meson8b-clkc.txt | 11 +++++++--- I think you should split the binding documentation and clk changes into separate patches. > - -> ?drivers/clk/meson/Kconfig?????????????????????????????????????|??6 +++--- -> ?drivers/clk/meson/meson8b.c???????????????????????????????????|??5 ++++- +> drivers/clk/meson/Kconfig | 6 +++--- +> drivers/clk/meson/meson8b.c | 5 ++++- The change being more platform than clock related, I'd prefer if Kevin or Carlo ack it before we apply it. @@ -55,7 +55,7 @@ people to help you. Cheers Jerome -> ?3 files changed, 14 insertions(+), 8 deletions(-) +> 3 files changed, 14 insertions(+), 8 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt > b/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt @@ -65,59 +65,64 @@ Jerome > @@ -1,11 +1,14 @@ > -* Amlogic Meson8b Clock and Reset Unit > +* Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Unit -> ? +> > -The Amlogic Meson8b clock controller generates and supplies clock to various > -controllers within the SoC. > +The Amlogic Meson8 / Meson8b / Meson8m2 clock controller generates and > +supplies clock to various controllers within the SoC. -> ? -> ?Required Properties: -> ? +> +> Required Properties: +> > -- compatible: should be "amlogic,meson8b-clkc" > +- compatible: must be one of: > + - "amlogic,meson8-clkc" for Meson8 (S802) SoCs > + - "amlogic,meson8b-clkc" for Meson8 (S805) SoCs > + - "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs -> ?- reg: it must be composed by two tuples: -> ? 0) physical base address of the xtal register and length of memory -> ? ???mapped region. +> - reg: it must be composed by two tuples: +> 0) physical base address of the xtal register and length of memory +> mapped region. > diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig > index 19480bcc7046..4a806203b73c 100644 > --- a/drivers/clk/meson/Kconfig > +++ b/drivers/clk/meson/Kconfig > @@ -7,9 +7,9 @@ config COMMON_CLK_MESON8B -> ? bool -> ? depends on COMMON_CLK_AMLOGIC -> ? help -> - ??Support for the clock controller on AmLogic S805 devices, aka -> - ??meson8b. Say Y if you want peripherals and CPU frequency scaling to -> - ??work. -> + ??Support for the clock controller on AmLogic S802 (Meson8), -> + ??S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you -> + ??want peripherals and CPU frequency scaling to work. -> ? -> ?config COMMON_CLK_GXBB -> ? bool +> bool +> depends on COMMON_CLK_AMLOGIC +> help +> - Support for the clock controller on AmLogic S805 devices, aka +> - meson8b. Say Y if you want peripherals and CPU frequency scaling to +> - work. +> + Support for the clock controller on AmLogic S802 (Meson8), +> + S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you +> + want peripherals and CPU frequency scaling to work. +> +> config COMMON_CLK_GXBB +> bool > diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c > index bfd1690724de..94c55e79cdde 100644 > --- a/drivers/clk/meson/meson8b.c > +++ b/drivers/clk/meson/meson8b.c > @@ -1,5 +1,6 @@ -> ?/* +> /* > - * AmLogic S805 / Meson8b Clock Controller Driver > + * AmLogic S802 (Meson8) / S805 (Meson8b) / S812 (Meson8m2) Clock Controller > + * Driver -> ? * -> ? * Copyright (c) 2015 Endless Mobile, Inc. -> ? * Author: Carlo Caione <carlo@endlessm.com> +> * +> * Copyright (c) 2015 Endless Mobile, Inc. +> * Author: Carlo Caione <carlo-6IF/jdPJHihWk0Htik3J/w@public.gmane.org> > @@ -777,7 +778,9 @@ static int meson8b_clkc_probe(struct platform_device > *pdev) -> ?} -> ? -> ?static const struct of_device_id meson8b_clkc_match_table[] = { +> } +> +> static const struct of_device_id meson8b_clkc_match_table[] = { > + { .compatible = "amlogic,meson8-clkc" }, -> ? { .compatible = "amlogic,meson8b-clkc" }, +> { .compatible = "amlogic,meson8b-clkc" }, > + { .compatible = "amlogic,meson8m2-clkc" }, -> ? { } -> ?}; -> ? +> { } +> }; +> + +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N3/content_digest index c78f5f1..500617a 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -1,9 +1,22 @@ "ref\020170604183341.21417-1-martin.blumenstingl@googlemail.com\0" "ref\020170604183341.21417-2-martin.blumenstingl@googlemail.com\0" - "From\0jbrunet@baylibre.com (Jerome Brunet)\0" - "Subject\0[PATCH 1/3] clk: meson: meson8b: add compatibles for Meson8 and Meson8m2\0" + "ref\020170604183341.21417-2-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org\0" + "From\0Jerome Brunet <jbrunet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>\0" + "Subject\0Re: [PATCH 1/3] clk: meson: meson8b: add compatibles for Meson8 and Meson8m2\0" "Date\0Sun, 04 Jun 2017 21:58:45 +0200\0" - "To\0linus-amlogic@lists.infradead.org\0" + "To\0Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>" + narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org + linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + " linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" + "Cc\0mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org" + sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org + robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org + mark.rutland-5wv7dgnIgG8@public.gmane.org + carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org + khilman-rdvid1DuHRBWk0Htik3J/w@public.gmane.org + linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" "\00:1\0" "b\0" "On Sun, 2017-06-04 at 20:33 +0200, Martin Blumenstingl wrote:\n" @@ -22,12 +35,12 @@ "> all commented out code).\n" "> The difference between the Meson8 and Meson8b clock gates seem to be:\n" "> - Meson8 has AIU_PCLK, HDMI_RX, VCLK2_ENCT, VCLK2_ENCL, UART3,\n" - "> ? CSI_DIG_CLKIN gates which don't seem to be available on Meson8b\n" + "> \302\240 CSI_DIG_CLKIN gates which don't seem to be available on Meson8b\n" "> - the gate on Meson8 for bit 7 seems to be named \"_1200XXX\" instead\n" - "> ? of \"PERIPHS_TOP\" (on Meson8b)\n" + "> \302\240 of \"PERIPHS_TOP\" (on Meson8b)\n" "> - Meson8b has a SANA gate which doesn't seem to exist on Meson8 (or\n" - "> ? on Meson8 the same bit is used by the UART3 gate in Amlogic's GPL\n" - "> ? kernel sources)\n" + "> \302\240 on Meson8 the same bit is used by the UART3 gate in Amlogic's GPL\n" + "> \302\240 kernel sources)\n" "> None of these gates is added for now, since it's unclear whether these\n" "> definitions are actually correct (the VCLK2_ENCT gate for example is\n" "> defined, but only used in some commented block).\n" @@ -41,16 +54,16 @@ "> None of these VPU clocks are not supported by our mainline meson8b\n" "> clock driver yet though.\n" "> \n" - "> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>\n" + "> Signed-off-by: Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>\n" "> ---\n" - "> ?.../devicetree/bindings/clock/amlogic,meson8b-clkc.txt????????| 11 +++++++---\n" + "> \302\240.../devicetree/bindings/clock/amlogic,meson8b-clkc.txt\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240| 11 +++++++---\n" "\n" "I think you should split the binding documentation and clk changes into separate\n" "patches.\n" "\n" "> -\n" - "> ?drivers/clk/meson/Kconfig?????????????????????????????????????|??6 +++---\n" - "> ?drivers/clk/meson/meson8b.c???????????????????????????????????|??5 ++++-\n" + "> \302\240drivers/clk/meson/Kconfig\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2406 +++---\n" + "> \302\240drivers/clk/meson/meson8b.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2405 ++++-\n" "\n" "The change being more platform than clock related, I'd prefer if Kevin or Carlo\n" "ack it before we apply it.\n" @@ -63,7 +76,7 @@ "Cheers\n" "Jerome\n" "\n" - "> ?3 files changed, 14 insertions(+), 8 deletions(-)\n" + "> \302\2403 files changed, 14 insertions(+), 8 deletions(-)\n" "> \n" "> diff --git a/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt\n" "> b/Documentation/devicetree/bindings/clock/amlogic,meson8b-clkc.txt\n" @@ -73,61 +86,66 @@ "> @@ -1,11 +1,14 @@\n" "> -* Amlogic Meson8b Clock and Reset Unit\n" "> +* Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Unit\n" - "> ?\n" + "> \302\240\n" "> -The Amlogic Meson8b clock controller generates and supplies clock to various\n" "> -controllers within the SoC.\n" "> +The Amlogic Meson8 / Meson8b / Meson8m2 clock controller generates and\n" "> +supplies clock to various controllers within the SoC.\n" - "> ?\n" - "> ?Required Properties:\n" - "> ?\n" + "> \302\240\n" + "> \302\240Required Properties:\n" + "> \302\240\n" "> -- compatible: should be \"amlogic,meson8b-clkc\"\n" "> +- compatible: must be one of:\n" "> +\t- \"amlogic,meson8-clkc\" for Meson8 (S802) SoCs\n" "> +\t- \"amlogic,meson8b-clkc\" for Meson8 (S805) SoCs\n" "> +\t- \"amlogic,meson8m2-clkc\" for Meson8m2 (S812) SoCs\n" - "> ?- reg: it must be composed by two tuples:\n" - "> ?\t0) physical base address of the xtal register and length of memory\n" - "> ?\t???mapped region.\n" + "> \302\240- reg: it must be composed by two tuples:\n" + "> \302\240\t0) physical base address of the xtal register and length of memory\n" + "> \302\240\t\302\240\302\240\302\240mapped region.\n" "> diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig\n" "> index 19480bcc7046..4a806203b73c 100644\n" "> --- a/drivers/clk/meson/Kconfig\n" "> +++ b/drivers/clk/meson/Kconfig\n" "> @@ -7,9 +7,9 @@ config COMMON_CLK_MESON8B\n" - "> ?\tbool\n" - "> ?\tdepends on COMMON_CLK_AMLOGIC\n" - "> ?\thelp\n" - "> -\t??Support for the clock controller on AmLogic S805 devices, aka\n" - "> -\t??meson8b. Say Y if you want peripherals and CPU frequency scaling to\n" - "> -\t??work.\n" - "> +\t??Support for the clock controller on AmLogic S802 (Meson8),\n" - "> +\t??S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you\n" - "> +\t??want peripherals and CPU frequency scaling to work.\n" - "> ?\n" - "> ?config COMMON_CLK_GXBB\n" - "> ?\tbool\n" + "> \302\240\tbool\n" + "> \302\240\tdepends on COMMON_CLK_AMLOGIC\n" + "> \302\240\thelp\n" + "> -\t\302\240\302\240Support for the clock controller on AmLogic S805 devices, aka\n" + "> -\t\302\240\302\240meson8b. Say Y if you want peripherals and CPU frequency scaling to\n" + "> -\t\302\240\302\240work.\n" + "> +\t\302\240\302\240Support for the clock controller on AmLogic S802 (Meson8),\n" + "> +\t\302\240\302\240S805 (Meson8b) and S812 (Meson8m2) devices. Say Y if you\n" + "> +\t\302\240\302\240want peripherals and CPU frequency scaling to work.\n" + "> \302\240\n" + "> \302\240config COMMON_CLK_GXBB\n" + "> \302\240\tbool\n" "> diff --git a/drivers/clk/meson/meson8b.c b/drivers/clk/meson/meson8b.c\n" "> index bfd1690724de..94c55e79cdde 100644\n" "> --- a/drivers/clk/meson/meson8b.c\n" "> +++ b/drivers/clk/meson/meson8b.c\n" "> @@ -1,5 +1,6 @@\n" - "> ?/*\n" + "> \302\240/*\n" "> - * AmLogic S805 / Meson8b Clock Controller Driver\n" "> + * AmLogic S802 (Meson8) / S805 (Meson8b) / S812 (Meson8m2) Clock Controller\n" "> + * Driver\n" - "> ? *\n" - "> ? * Copyright (c) 2015 Endless Mobile, Inc.\n" - "> ? * Author: Carlo Caione <carlo@endlessm.com>\n" + "> \302\240 *\n" + "> \302\240 * Copyright (c) 2015 Endless Mobile, Inc.\n" + "> \302\240 * Author: Carlo Caione <carlo-6IF/jdPJHihWk0Htik3J/w@public.gmane.org>\n" "> @@ -777,7 +778,9 @@ static int meson8b_clkc_probe(struct platform_device\n" "> *pdev)\n" - "> ?}\n" - "> ?\n" - "> ?static const struct of_device_id meson8b_clkc_match_table[] = {\n" + "> \302\240}\n" + "> \302\240\n" + "> \302\240static const struct of_device_id meson8b_clkc_match_table[] = {\n" "> +\t{ .compatible = \"amlogic,meson8-clkc\" },\n" - "> ?\t{ .compatible = \"amlogic,meson8b-clkc\" },\n" + "> \302\240\t{ .compatible = \"amlogic,meson8b-clkc\" },\n" "> +\t{ .compatible = \"amlogic,meson8m2-clkc\" },\n" - "> ?\t{ }\n" - "> ?};\n" - > ? + "> \302\240\t{ }\n" + "> \302\240};\n" + "> \302\240\n" + "\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -69dd2759413b1d34a4fa99fed391f2a967b0bf5cf906258b59d10633bf30f67d +f9824205d4d978214ea8c8b2e1ffc26e53fe8dc8e171fcdbded69a86d635d3d7
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