From: Chee, Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v8 5/7] drivers: Enable FPGA driver build on SPL
Date: Tue, 6 Jun 2017 08:26:43 +0000 [thread overview]
Message-ID: <1496737602.2428.54.camel@intel.com> (raw)
In-Reply-To: <c78f5e83-6df9-92bb-09e0-451678d12d5a@denx.de>
On Sel, 2017-06-06 at 10:03 +0200, Marek Vasut wrote:
> On 06/06/2017 08:35 AM, tien.fong.chee at intel.com wrote:
> >
> > From: Tien Fong Chee <tien.fong.chee@intel.com>
> >
> > Enable FPGA driver build for SPL because FPGA driver is needed for
> > SPL
> > to configure and getting DDR up before loading U-boot into DDR and
> > booting from there.
> >
> > FPGA driver build on SPL must be enabled 1st before applying next
> > patch to
> > avoid build failed, because fpga_manager which would be moved to
> > drivers/fpga by next patch are required in SPL.
> >
> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> You should probably swap this and 4/5 ?
>
I have no strong opinion about this swapping. Don't you think that it's
much more sensible having enabling FPGA support on SPL(configuration
1st), then only enable the build?
> >
> > ---
> > drivers/Makefile | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/Makefile b/drivers/Makefile
> > index 64c39d3..4478212 100644
> > --- a/drivers/Makefile
> > +++ b/drivers/Makefile
> > @@ -48,6 +48,7 @@ obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/
> > obj-$(CONFIG_SPL_SATA_SUPPORT) += block/
> > obj-$(CONFIG_SPL_USB_HOST_SUPPORT) += block/
> > obj-$(CONFIG_SPL_MMC_SUPPORT) += block/
> > +obj-$(CONFIG_SPL_FPGA_SUPPORT) += fpga/
> > endif
> >
> > ifdef CONFIG_TPL_BUILD
> >
>
next prev parent reply other threads:[~2017-06-06 8:26 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-06 6:35 [U-Boot] [PATCH v8 0/7] Add Intel Arria 10 SoC FPGA driver tien.fong.chee at intel.com
2017-06-06 6:35 ` [U-Boot] [PATCH v8 1/7] arm: socfpga: Remove unused passing parameter of socfpga_bridges_reset tien.fong.chee at intel.com
2017-06-06 6:35 ` [U-Boot] [PATCH v8 2/7] arm: socfpga: Restructure FPGA driver in the preparation to support A10 tien.fong.chee at intel.com
2017-06-06 6:35 ` [U-Boot] [PATCH v8 3/7] arm: socfpga: Convert all Intel related FPGA configuration to Kconfig tien.fong.chee at intel.com
2017-06-06 7:57 ` Marek Vasut
2017-06-06 8:16 ` Chee, Tien Fong
2017-06-06 8:32 ` Marek Vasut
2017-06-06 8:48 ` Chee, Tien Fong
2017-06-06 8:53 ` Marek Vasut
2017-06-06 9:40 ` Chee, Tien Fong
2017-06-06 6:35 ` [U-Boot] [PATCH v8 4/7] arm: socfpga: Enable FPGA driver on SPL tien.fong.chee at intel.com
2017-06-06 8:03 ` Marek Vasut
2017-06-06 8:19 ` Chee, Tien Fong
2017-06-06 8:35 ` Marek Vasut
2017-06-06 9:36 ` Chee, Tien Fong
2017-06-06 9:41 ` Marek Vasut
2017-06-06 9:46 ` Chee, Tien Fong
2017-06-06 9:50 ` Marek Vasut
2017-06-07 3:06 ` Chee, Tien Fong
2017-06-07 6:36 ` Marek Vasut
2017-06-07 8:04 ` Chee, Tien Fong
2017-06-07 11:26 ` Chee, Tien Fong
2017-06-07 12:31 ` Marek Vasut
2017-06-08 3:40 ` Chee, Tien Fong
2017-06-08 12:14 ` Marek Vasut
2017-06-09 3:39 ` Chee, Tien Fong
2017-06-09 8:25 ` Marek Vasut
2017-06-09 13:52 ` Dinh Nguyen
2017-06-12 8:38 ` Chee, Tien Fong
2017-06-13 3:26 ` Chee, Tien Fong
2017-06-13 9:05 ` Marek Vasut
2017-06-14 5:35 ` Chee, Tien Fong
2017-06-19 10:32 ` Chee, Tien Fong
2017-06-19 13:18 ` Dinh Nguyen
2017-06-07 12:30 ` Marek Vasut
2017-06-06 6:35 ` [U-Boot] [PATCH v8 5/7] drivers: Enable FPGA driver build " tien.fong.chee at intel.com
2017-06-06 8:03 ` Marek Vasut
2017-06-06 8:26 ` Chee, Tien Fong [this message]
2017-06-06 8:35 ` Marek Vasut
2017-06-06 9:38 ` Chee, Tien Fong
2017-06-06 6:35 ` [U-Boot] [PATCH v8 6/7] arm: socfpga: Move FPGA manager driver to FPGA driver tien.fong.chee at intel.com
2017-06-06 6:35 ` [U-Boot] [PATCH v8 7/7] arm: socfpga: Add FPGA driver support for Arria 10 tien.fong.chee at intel.com
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