diff for duplicates of <1496999185.3552.60.camel@baylibre.com> diff --git a/a/1.txt b/N1/1.txt index 1587d71..044ec12 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -11,98 +11,98 @@ On Thu, 2017-06-08 at 21:39 +0200, Heiner Kallweit wrote: > v6: > - no changes > --- -> ?drivers/pinctrl/Kconfig???????????????|???1 + -> ?drivers/pinctrl/meson/pinctrl-meson.c | 170 +> drivers/pinctrl/Kconfig | 1 + +> drivers/pinctrl/meson/pinctrl-meson.c | 170 > +++++++++++++++++++++++++++++++++- -> ?2 files changed, 170 insertions(+), 1 deletion(-) +> 2 files changed, 170 insertions(+), 1 deletion(-) > > diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig > index 7ae04a97..86834dea 100644 > --- a/drivers/pinctrl/Kconfig > +++ b/drivers/pinctrl/Kconfig > @@ -166,6 +166,7 @@ config PINCTRL_MESON -> ? select PINCONF -> ? select GENERIC_PINCONF -> ? select GPIOLIB +> select PINCONF +> select GENERIC_PINCONF +> select GPIOLIB > + select GPIOLIB_IRQCHIP -> ? select OF_GPIO -> ? select REGMAP_MMIO -> ? +> select OF_GPIO +> select REGMAP_MMIO +> > diff --git a/drivers/pinctrl/meson/pinctrl-meson.c > b/drivers/pinctrl/meson/pinctrl-meson.c > index 66ed70c1..7bacd4e3 100644 > --- a/drivers/pinctrl/meson/pinctrl-meson.c > +++ b/drivers/pinctrl/meson/pinctrl-meson.c > @@ -62,6 +62,8 @@ -> ?#include "../pinctrl-utils.h" -> ?#include "pinctrl-meson.h" -> ? +> #include "../pinctrl-utils.h" +> #include "pinctrl-meson.h" +> > +static struct irq_domain *meson_pinctrl_irq_domain; > + -> ?/** -> ? * meson_get_bank() - find the bank containing a given pin -> ? * +> /** +> * meson_get_bank() - find the bank containing a given pin +> * > @@ -497,6 +499,154 @@ static int meson_gpio_get(struct gpio_chip *chip, > unsigned gpio) -> ? return !!(val & BIT(bit)); -> ?} -> ? +> return !!(val & BIT(bit)); +> } +> > +static struct meson_pinctrl *meson_gpio_data_to_pc(struct irq_data *data) > +{ -> +????????struct gpio_chip *chip = irq_data_get_irq_chip_data(data); +> + struct gpio_chip *chip = irq_data_get_irq_chip_data(data); > + -> +????????return gpiochip_get_data(chip); +> + return gpiochip_get_data(chip); > +} > + > +static int meson_gpio_bank_hwirq(struct meson_bank *bank, unsigned int > offset) > +{ -> +????????int hwirq; +> + int hwirq; > + -> +????????if (bank->irq_first < 0) -> +????????????????/* this bank cannot generate irqs */ -> +????????????????return 0; +> + if (bank->irq_first < 0) +> + /* this bank cannot generate irqs */ +> + return 0; > + -> +????????hwirq = offset - bank->first + bank->irq_first; +> + hwirq = offset - bank->first + bank->irq_first; > + -> +????????if (hwirq > bank->irq_last) -> +????????????????/* this pin cannot generate irqs */ -> +????????????????return 0; +> + if (hwirq > bank->irq_last) +> + /* this pin cannot generate irqs */ +> + return 0; > + -> +????????return hwirq; +> + return hwirq; > +} > + > +static int meson_gpio_to_hwirq(struct irq_data *data) > +{ > + struct meson_pinctrl *pc = meson_gpio_data_to_pc(data); > + unsigned int offset = data->hwirq; -> +????????struct meson_bank *bank; -> +????????int hwirq, ret; +> + struct meson_bank *bank; +> + int hwirq, ret; > + -> +????????offset += pc->data->pin_base; +> + offset += pc->data->pin_base; > + -> +????????ret = meson_get_bank(pc, offset, &bank); -> +????????if (ret) -> +????????????????return ret; +> + ret = meson_get_bank(pc, offset, &bank); +> + if (ret) +> + return ret; > + -> +????????hwirq = meson_gpio_bank_hwirq(bank, offset); -> +????????if (!hwirq) -> +????????????????dev_dbg(pc->dev, "no interrupt for pin %u\n", offset); +> + hwirq = meson_gpio_bank_hwirq(bank, offset); +> + if (!hwirq) +> + dev_dbg(pc->dev, "no interrupt for pin %u\n", offset); > + -> +????????return hwirq; +> + return hwirq; > +} > + > +static void meson_gpio_irq_handler(struct irq_desc *desc) > +{ -> +????????struct irq_chip *chip = irq_desc_get_chip(desc); -> +????????struct irq_data *gpio_irq_data = irq_desc_get_handler_data(desc); +> + struct irq_chip *chip = irq_desc_get_chip(desc); +> + struct irq_data *gpio_irq_data = irq_desc_get_handler_data(desc); > + -> +????????chained_irq_enter(chip, desc); +> + chained_irq_enter(chip, desc); > + -> +????????if (gpio_irq_data) -> +????????????????generic_handle_irq(gpio_irq_data->irq); +> + if (gpio_irq_data) +> + generic_handle_irq(gpio_irq_data->irq); > + -> +????????chained_irq_exit(chip, desc); +> + chained_irq_exit(chip, desc); > +} > + > +static void meson_gpio_irq_unmask(struct irq_data *data) {} @@ -117,12 +117,12 @@ On Thu, 2017-06-08 at 21:39 +0200, Heiner Kallweit wrote: > + return; > + > + /* -> + ?* In case of IRQ_TYPE_EDGE_BOTH we need two parent interrupts, -> + ?* one for each edge. That's due to HW constraints. -> + ?* We use format 2 * GPIO_HWIRQ +(0|1) for the hwirq, so we can -> + ?* have one GPIO_HWIRQ twice and derive the GPIO_HWIRQ from hwirq -> + ?* by shifting hwirq one bit to the right. -> + ?*/ +> + * In case of IRQ_TYPE_EDGE_BOTH we need two parent interrupts, +> + * one for each edge. That's due to HW constraints. +> + * We use format 2 * GPIO_HWIRQ +(0|1) for the hwirq, so we can +> + * have one GPIO_HWIRQ twice and derive the GPIO_HWIRQ from hwirq +> + * by shifting hwirq one bit to the right. +> + */ > + irq = irq_find_mapping(meson_pinctrl_irq_domain, hwirq * 2); > + if (irq) { > + irq_set_chained_handler_and_data(irq, handle_bad_irq, NULL); @@ -140,7 +140,7 @@ On Thu, 2017-06-08 at 21:39 +0200, Heiner Kallweit wrote: > +{ > + int hwirq = meson_gpio_to_hwirq(data); > + struct irq_fwspec fwspec; -> +????????int irq, irq2, num_slots; +> + int irq, irq2, num_slots; > + > + if (irqd_is_activated(data)) > + return -EBUSY; @@ -167,10 +167,10 @@ startup callback... > + fwspec.param_count = 2; > + > + /* -> + ?* The chip can create an interrupt for either rising or falling edge -> + ?* only. Therefore use two interrupts in case of IRQ_TYPE_EDGE_BOTH, -> + ?* first for falling edge and second one for rising edge. -> + ?*/ +> + * The chip can create an interrupt for either rising or falling edge +> + * only. Therefore use two interrupts in case of IRQ_TYPE_EDGE_BOTH, +> + * first for falling edge and second one for rising edge. +> + */ > + num_slots = (type == IRQ_TYPE_EDGE_BOTH) ? 2 : 1; > + > + /* see comment in meson_gpio_irq_shutdown why we shift one bit here @@ -199,36 +199,36 @@ startup callback... > meson_gpio_irq_handler, data); > + } > + -> +????????return 0; +> + return 0; > +} > + > +static struct irq_chip meson_gpio_irq_chip = { -> +????????.name = "GPIO", -> +????????.irq_set_type = meson_gpio_irq_set_type, -> +????????.irq_mask = meson_gpio_irq_mask, -> +????????.irq_unmask = meson_gpio_irq_unmask, -> +????????.irq_shutdown = meson_gpio_irq_shutdown, +> + .name = "GPIO", +> + .irq_set_type = meson_gpio_irq_set_type, +> + .irq_mask = meson_gpio_irq_mask, +> + .irq_unmask = meson_gpio_irq_unmask, +> + .irq_shutdown = meson_gpio_irq_shutdown, > +}; > + -> ?static const struct of_device_id meson_pinctrl_dt_match[] = { -> ? { -> ? .compatible = "amlogic,meson8-cbus-pinctrl", +> static const struct of_device_id meson_pinctrl_dt_match[] = { +> { +> .compatible = "amlogic,meson8-cbus-pinctrl", > @@ -558,7 +708,8 @@ static int meson_gpiolib_register(struct meson_pinctrl > *pc) -> ? return ret; -> ? } -> ? +> return ret; +> } +> > - return 0; > + return gpiochip_irqchip_add(&pc->chip, &meson_gpio_irq_chip, 0, -> + ????handle_simple_irq, IRQ_TYPE_NONE); -> ?} -> ? -> ?static struct regmap_config meson_regmap_config = { +> + handle_simple_irq, IRQ_TYPE_NONE); +> } +> +> static struct regmap_config meson_regmap_config = { > @@ -637,6 +788,23 @@ static int meson_pinctrl_parse_dt(struct meson_pinctrl > *pc, -> ? return PTR_ERR(pc->reg_gpio); -> ? } -> ? +> return PTR_ERR(pc->reg_gpio); +> } +> > + if (!meson_pinctrl_irq_domain) { This be in " struct meson_pinctrl *pc" not a global. @@ -253,6 +253,6 @@ this ! > + of_node_put(np); > + } > + -> ? return 0; -> ?} -> ? +> return 0; +> } +> diff --git a/a/content_digest b/N1/content_digest index e1f8262..6b5d554 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,9 +1,21 @@ "ref\004378047-4194-bb0f-3da3-e1d62345a86b@gmail.com\0" "ref\0a86d38af-9103-7557-9986-2dc187815569@gmail.com\0" - "From\0jbrunet@baylibre.com (Jerome Brunet)\0" - "Subject\0[PATCH v6 6/9] pinctrl: meson: add support for GPIO interrupts\0" + "From\0Jerome Brunet <jbrunet@baylibre.com>\0" + "Subject\0Re: [PATCH v6 6/9] pinctrl: meson: add support for GPIO interrupts\0" "Date\0Fri, 09 Jun 2017 11:06:25 +0200\0" - "To\0linus-amlogic@lists.infradead.org\0" + "To\0Heiner Kallweit <hkallweit1@gmail.com>" + Mark Rutland <mark.rutland@arm.com> + Marc Zyngier <marc.zyngier@arm.com> + Linus Walleij <linus.walleij@linaro.org> + Kevin Hilman <khilman@baylibre.com> + Thomas Gleixner <tglx@linutronix.de> + Rob Herring <robh@kernel.org> + " Neil Armstrong <narmstrong@baylibre.com>\0" + "Cc\0devicetree@vger.kernel.org" + linux-amlogic@lists.infradead.org + linux-gpio@vger.kernel.org + thierry.reding@gmail.com <thierry.reding@gmail.com> + " Thierry Reding <treding@nvidia.com>\0" "\00:1\0" "b\0" "On Thu, 2017-06-08 at 21:39 +0200, Heiner Kallweit wrote:\n" @@ -19,98 +31,98 @@ "> v6:\n" "> - no changes\n" "> ---\n" - "> ?drivers/pinctrl/Kconfig???????????????|???1 +\n" - "> ?drivers/pinctrl/meson/pinctrl-meson.c | 170\n" + "> \302\240drivers/pinctrl/Kconfig\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240\302\2401 +\n" + "> \302\240drivers/pinctrl/meson/pinctrl-meson.c | 170\n" "> +++++++++++++++++++++++++++++++++-\n" - "> ?2 files changed, 170 insertions(+), 1 deletion(-)\n" + "> \302\2402 files changed, 170 insertions(+), 1 deletion(-)\n" "> \n" "> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig\n" "> index 7ae04a97..86834dea 100644\n" "> --- a/drivers/pinctrl/Kconfig\n" "> +++ b/drivers/pinctrl/Kconfig\n" "> @@ -166,6 +166,7 @@ config PINCTRL_MESON\n" - "> ?\tselect PINCONF\n" - "> ?\tselect GENERIC_PINCONF\n" - "> ?\tselect GPIOLIB\n" + "> \302\240\tselect PINCONF\n" + "> \302\240\tselect GENERIC_PINCONF\n" + "> \302\240\tselect GPIOLIB\n" "> +\tselect GPIOLIB_IRQCHIP\n" - "> ?\tselect OF_GPIO\n" - "> ?\tselect REGMAP_MMIO\n" - "> ?\n" + "> \302\240\tselect OF_GPIO\n" + "> \302\240\tselect REGMAP_MMIO\n" + "> \302\240\n" "> diff --git a/drivers/pinctrl/meson/pinctrl-meson.c\n" "> b/drivers/pinctrl/meson/pinctrl-meson.c\n" "> index 66ed70c1..7bacd4e3 100644\n" "> --- a/drivers/pinctrl/meson/pinctrl-meson.c\n" "> +++ b/drivers/pinctrl/meson/pinctrl-meson.c\n" "> @@ -62,6 +62,8 @@\n" - "> ?#include \"../pinctrl-utils.h\"\n" - "> ?#include \"pinctrl-meson.h\"\n" - "> ?\n" + "> \302\240#include \"../pinctrl-utils.h\"\n" + "> \302\240#include \"pinctrl-meson.h\"\n" + "> \302\240\n" "> +static struct irq_domain *meson_pinctrl_irq_domain;\n" "> +\n" - "> ?/**\n" - "> ? * meson_get_bank() - find the bank containing a given pin\n" - "> ? *\n" + "> \302\240/**\n" + "> \302\240 * meson_get_bank() - find the bank containing a given pin\n" + "> \302\240 *\n" "> @@ -497,6 +499,154 @@ static int meson_gpio_get(struct gpio_chip *chip,\n" "> unsigned gpio)\n" - "> ?\treturn !!(val & BIT(bit));\n" - "> ?}\n" - "> ?\n" + "> \302\240\treturn !!(val & BIT(bit));\n" + "> \302\240}\n" + "> \302\240\n" "> +static struct meson_pinctrl *meson_gpio_data_to_pc(struct irq_data *data)\n" "> +{\n" - "> +????????struct gpio_chip *chip = irq_data_get_irq_chip_data(data);\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240struct gpio_chip *chip = irq_data_get_irq_chip_data(data);\n" "> +\n" - "> +????????return gpiochip_get_data(chip);\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240return gpiochip_get_data(chip);\n" "> +}\n" "> +\n" "> +static int meson_gpio_bank_hwirq(struct meson_bank *bank, unsigned int\n" "> offset)\n" "> +{\n" - "> +????????int hwirq;\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240int hwirq;\n" "> +\n" - "> +????????if (bank->irq_first < 0)\n" - "> +????????????????/* this bank cannot generate irqs */\n" - "> +????????????????return 0;\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240if (bank->irq_first < 0)\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240/* this bank cannot generate irqs */\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240return 0;\n" "> +\n" - "> +????????hwirq = offset - bank->first + bank->irq_first;\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240hwirq = offset - bank->first + bank->irq_first;\n" "> +\n" - "> +????????if (hwirq > bank->irq_last)\n" - "> +????????????????/* this pin cannot generate irqs */\n" - "> +????????????????return 0;\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240if (hwirq > bank->irq_last)\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240/* this pin cannot generate irqs */\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240return 0;\n" "> +\n" - "> +????????return hwirq;\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240return hwirq;\n" "> +}\n" "> +\n" "> +static int meson_gpio_to_hwirq(struct irq_data *data)\n" "> +{\n" "> +\tstruct meson_pinctrl *pc = meson_gpio_data_to_pc(data);\n" "> +\tunsigned int offset = data->hwirq;\n" - "> +????????struct meson_bank *bank;\n" - "> +????????int hwirq, ret;\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240struct meson_bank *bank;\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240int hwirq, ret;\n" "> +\n" - "> +????????offset += pc->data->pin_base;\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240offset += pc->data->pin_base;\n" "> +\n" - "> +????????ret = meson_get_bank(pc, offset, &bank);\n" - "> +????????if (ret)\n" - "> +????????????????return ret;\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240ret = meson_get_bank(pc, offset, &bank);\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240if (ret)\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240return ret;\n" "> +\n" - "> +????????hwirq = meson_gpio_bank_hwirq(bank, offset);\n" - "> +????????if (!hwirq)\n" - "> +????????????????dev_dbg(pc->dev, \"no interrupt for pin %u\\n\", offset);\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240hwirq = meson_gpio_bank_hwirq(bank, offset);\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240if (!hwirq)\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240dev_dbg(pc->dev, \"no interrupt for pin %u\\n\", offset);\n" "> +\n" - "> +????????return hwirq;\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240return hwirq;\n" "> +}\n" "> +\n" "> +static void meson_gpio_irq_handler(struct irq_desc *desc)\n" "> +{\n" - "> +????????struct irq_chip *chip = irq_desc_get_chip(desc);\n" - "> +????????struct irq_data *gpio_irq_data = irq_desc_get_handler_data(desc);\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240struct irq_chip *chip = irq_desc_get_chip(desc);\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240struct irq_data *gpio_irq_data = irq_desc_get_handler_data(desc);\n" "> +\n" - "> +????????chained_irq_enter(chip, desc);\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240chained_irq_enter(chip, desc);\n" "> +\n" - "> +????????if (gpio_irq_data)\n" - "> +????????????????generic_handle_irq(gpio_irq_data->irq);\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240if (gpio_irq_data)\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240generic_handle_irq(gpio_irq_data->irq);\n" "> +\n" - "> +????????chained_irq_exit(chip, desc);\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240chained_irq_exit(chip, desc);\n" "> +}\n" "> +\n" "> +static void meson_gpio_irq_unmask(struct irq_data *data) {}\n" @@ -125,12 +137,12 @@ "> +\t\treturn;\n" "> +\n" "> +\t/*\n" - "> +\t?* In case of IRQ_TYPE_EDGE_BOTH we need two parent interrupts,\n" - "> +\t?* one for each edge. That's due to HW constraints.\n" - "> +\t?* We use format 2 * GPIO_HWIRQ +(0|1) for the hwirq, so we can\n" - "> +\t?* have one GPIO_HWIRQ twice and derive the GPIO_HWIRQ from hwirq\n" - "> +\t?* by shifting hwirq one bit to the right.\n" - "> +\t?*/\n" + "> +\t\302\240* In case of IRQ_TYPE_EDGE_BOTH we need two parent interrupts,\n" + "> +\t\302\240* one for each edge. That's due to HW constraints.\n" + "> +\t\302\240* We use format 2 * GPIO_HWIRQ +(0|1) for the hwirq, so we can\n" + "> +\t\302\240* have one GPIO_HWIRQ twice and derive the GPIO_HWIRQ from hwirq\n" + "> +\t\302\240* by shifting hwirq one bit to the right.\n" + "> +\t\302\240*/\n" "> +\tirq = irq_find_mapping(meson_pinctrl_irq_domain, hwirq * 2);\n" "> +\tif (irq) {\n" "> +\t\tirq_set_chained_handler_and_data(irq, handle_bad_irq, NULL);\n" @@ -148,7 +160,7 @@ "> +{\n" "> +\tint hwirq = meson_gpio_to_hwirq(data);\n" "> +\tstruct irq_fwspec fwspec;\n" - "> +????????int irq, irq2, num_slots;\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240int irq, irq2, num_slots;\n" "> +\n" "> +\tif (irqd_is_activated(data))\n" "> +\t\treturn -EBUSY;\n" @@ -175,10 +187,10 @@ "> +\tfwspec.param_count = 2;\n" "> +\n" "> +\t/*\n" - "> +\t?* The chip can create an interrupt for either rising or falling edge\n" - "> +\t?* only. Therefore use two interrupts in case of IRQ_TYPE_EDGE_BOTH,\n" - "> +\t?* first for falling edge and second one for rising edge.\n" - "> +\t?*/\n" + "> +\t\302\240* The chip can create an interrupt for either rising or falling edge\n" + "> +\t\302\240* only. Therefore use two interrupts in case of IRQ_TYPE_EDGE_BOTH,\n" + "> +\t\302\240* first for falling edge and second one for rising edge.\n" + "> +\t\302\240*/\n" "> +\tnum_slots = (type == IRQ_TYPE_EDGE_BOTH) ? 2 : 1;\n" "> +\n" "> +\t/* see comment in meson_gpio_irq_shutdown why we shift one bit here\n" @@ -207,36 +219,36 @@ "> meson_gpio_irq_handler, data);\n" "> +\t}\n" "> +\n" - "> +????????return 0;\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240return 0;\n" "> +}\n" "> +\n" "> +static struct irq_chip meson_gpio_irq_chip = {\n" - "> +????????.name = \"GPIO\",\n" - "> +????????.irq_set_type = meson_gpio_irq_set_type,\n" - "> +????????.irq_mask = meson_gpio_irq_mask,\n" - "> +????????.irq_unmask = meson_gpio_irq_unmask,\n" - "> +????????.irq_shutdown = meson_gpio_irq_shutdown,\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240.name = \"GPIO\",\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240.irq_set_type = meson_gpio_irq_set_type,\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240.irq_mask = meson_gpio_irq_mask,\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240.irq_unmask = meson_gpio_irq_unmask,\n" + "> +\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240.irq_shutdown = meson_gpio_irq_shutdown,\n" "> +};\n" "> +\n" - "> ?static const struct of_device_id meson_pinctrl_dt_match[] = {\n" - "> ?\t{\n" - "> ?\t\t.compatible = \"amlogic,meson8-cbus-pinctrl\",\n" + "> \302\240static const struct of_device_id meson_pinctrl_dt_match[] = {\n" + "> \302\240\t{\n" + "> \302\240\t\t.compatible = \"amlogic,meson8-cbus-pinctrl\",\n" "> @@ -558,7 +708,8 @@ static int meson_gpiolib_register(struct meson_pinctrl\n" "> *pc)\n" - "> ?\t\treturn ret;\n" - "> ?\t}\n" - "> ?\n" + "> \302\240\t\treturn ret;\n" + "> \302\240\t}\n" + "> \302\240\n" "> -\treturn 0;\n" "> +\treturn gpiochip_irqchip_add(&pc->chip, &meson_gpio_irq_chip, 0,\n" - "> +\t\t\t\t????handle_simple_irq, IRQ_TYPE_NONE);\n" - "> ?}\n" - "> ?\n" - "> ?static struct regmap_config meson_regmap_config = {\n" + "> +\t\t\t\t\302\240\302\240\302\240\302\240handle_simple_irq, IRQ_TYPE_NONE);\n" + "> \302\240}\n" + "> \302\240\n" + "> \302\240static struct regmap_config meson_regmap_config = {\n" "> @@ -637,6 +788,23 @@ static int meson_pinctrl_parse_dt(struct meson_pinctrl\n" "> *pc,\n" - "> ?\t\treturn PTR_ERR(pc->reg_gpio);\n" - "> ?\t}\n" - "> ?\n" + "> \302\240\t\treturn PTR_ERR(pc->reg_gpio);\n" + "> \302\240\t}\n" + "> \302\240\n" "> +\tif (!meson_pinctrl_irq_domain) {\n" "\n" "This be in \" struct meson_pinctrl *pc\" not a global.\n" @@ -261,8 +273,8 @@ "> +\t\tof_node_put(np);\n" "> +\t}\n" "> +\n" - "> ?\treturn 0;\n" - "> ?}\n" - > ? + "> \302\240\treturn 0;\n" + "> \302\240}\n" + > -61841481a30450bbd411ad28fefdaadab3a3ac6b51842c08a7ad25580f89f83d +d05d0b28ff235a71102e7c2bb48f8479562fe221bf989944a6a013e39fc8355c
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