diff for duplicates of <1497252724.3086.0.camel@baylibre.com> diff --git a/a/1.txt b/N1/1.txt index d6e4343..7800f58 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,26 +1,26 @@ On Sun, 2017-06-11 at 12:16 +0200, Martin Blumenstingl wrote: > This series adds: > - USB support on Meson8 and Meson8b (it seems that some boards show an -> ? error when trying to initialize one of the USB2 PHYs, but we have the -> ? same problem on some GXBB boards. it is working fine for me - on a board -> ? which is not supported upstream yet) +> error when trying to initialize one of the USB2 PHYs, but we have the +> same problem on some GXBB boards. it is working fine for me - on a board +> which is not supported upstream yet) > - hardware random number generator support (Meson8 and Meson8b seem to -> ? have two 32-bit hardware random number generator registers, while the -> ? GX SoCs only have one. This is not handled by the meson-rng driver yet, -> ? but that can still be improved later on) +> have two 32-bit hardware random number generator registers, while the +> GX SoCs only have one. This is not handled by the meson-rng driver yet, +> but that can still be improved later on) > - SAR ADC support > - add reserved memory zones to fix random hangs when filling the memory -> ? (currently only on Meson8 until I have a Meson8b device to test if the -> ? same problem appears there as well) +> (currently only on Meson8 until I have a Meson8b device to test if the +> same problem appears there as well) > - use the real ethernet clock on Meson8 and Meson8b to fix ethernet when -> ? the bootloader does not enable the gate clock +> the bootloader does not enable the gate clock > - add the SCU (Snoop Control Unit) which is needed for SMP support > - minor preparations for further .dts updates as this already exports the -> ? SDIO clocks (a driver for this MMC controller is work-in-progress) as -> ? well as the corresponding pin definitions in meson8.dtsi +> SDIO clocks (a driver for this MMC controller is work-in-progress) as +> well as the corresponding pin definitions in meson8.dtsi > - this adds the pwm_e (typically used for the 32.768 kHz LPO clock for the -> ? SDIO wifi chip) and pwm_f (used on some boards for the dimmable power -> ? LED) pins to meson8.dtsi +> SDIO wifi chip) and pwm_f (used on some boards for the dimmable power +> LED) pins to meson8.dtsi > > NOTE: the .dts changes from this series depend on my previous patch from > [0]: "ARM: dts: meson8: fix the IR receiver pins" @@ -30,28 +30,33 @@ On Sun, 2017-06-11 at 12:16 +0200, Martin Blumenstingl wrote: > > > Martin Blumenstingl (13): -> ? clk: meson8b: export the SAR ADC clocks -> ? clk: meson8b: export the SDIO clock -> ? clk: meson8b: export the gate clock for the HW random number generator -> ? clk: meson8b: export the USB clocks -> ? clk: meson8b: export the ethernet gate clock +> clk: meson8b: export the SAR ADC clocks +> clk: meson8b: export the SDIO clock +> clk: meson8b: export the gate clock for the HW random number generator +> clk: meson8b: export the USB clocks +> clk: meson8b: export the ethernet gate clock Applied these 5 clk patches to next/headers with Neil's Acks. -> ? ARM: dts: meson8: add the PWM_E and PWM_F pins -> ? ARM: dts: meson8: add the pins for the SDIO controller -> ? ARM: dts: meson: add the SAR ADC -> ? ARM: dts: meson8: add reserved memory zones -> ? ARM: dts: meson: add the hardware random number generator -> ? ARM: dts: meson: add USB support on Meson8 and Meson8b -> ? ARM: dts: meson8b: add the SCU device node -> ? ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b +> ARM: dts: meson8: add the PWM_E and PWM_F pins +> ARM: dts: meson8: add the pins for the SDIO controller +> ARM: dts: meson: add the SAR ADC +> ARM: dts: meson8: add reserved memory zones +> ARM: dts: meson: add the hardware random number generator +> ARM: dts: meson: add USB support on Meson8 and Meson8b +> ARM: dts: meson8b: add the SCU device node +> ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b > -> ?arch/arm/boot/dts/meson.dtsi?????????????|??51 +++++++++++++++ -> ?arch/arm/boot/dts/meson8.dtsi????????????| 109 +> arch/arm/boot/dts/meson.dtsi | 51 +++++++++++++++ +> arch/arm/boot/dts/meson8.dtsi | 109 > ++++++++++++++++++++++++++++++- -> ?arch/arm/boot/dts/meson8b.dtsi???????????|??49 ++++++++++++++ -> ?drivers/clk/meson/meson8b.h??????????????|??20 +++--- -> ?include/dt-bindings/clock/meson8b-clkc.h |??10 +++ -> ?5 files changed, 228 insertions(+), 11 deletions(-) -> +> arch/arm/boot/dts/meson8b.dtsi | 49 ++++++++++++++ +> drivers/clk/meson/meson8b.h | 20 +++--- +> include/dt-bindings/clock/meson8b-clkc.h | 10 +++ +> 5 files changed, 228 insertions(+), 11 deletions(-) +> + +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index 2990fc9..518c427 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,33 +1,41 @@ "ref\020170611101644.28581-1-martin.blumenstingl@googlemail.com\0" - "From\0jbrunet@baylibre.com (Jerome Brunet)\0" - "Subject\0[PATCH 00/13] add support for more devices on Meson8 and Meson8b\0" + "ref\020170611101644.28581-1-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org\0" + "From\0Jerome Brunet <jbrunet-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>\0" + "Subject\0Re: [PATCH 00/13] add support for more devices on Meson8 and Meson8b\0" "Date\0Mon, 12 Jun 2017 09:32:04 +0200\0" - "To\0linus-amlogic@lists.infradead.org\0" + "To\0Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>" + linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + narmstrong-rdvid1DuHRBWk0Htik3J/w@public.gmane.org + khilman-rdvid1DuHRBWk0Htik3J/w@public.gmane.org + " carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org\0" + "Cc\0devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" + mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org + " linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org\0" "\00:1\0" "b\0" "On Sun, 2017-06-11 at 12:16 +0200, Martin Blumenstingl wrote:\n" "> This series adds:\n" "> - USB support on Meson8 and Meson8b (it seems that some boards show an\n" - "> ? error when trying to initialize one of the USB2 PHYs, but we have the\n" - "> ? same problem on some GXBB boards. it is working fine for me - on a board\n" - "> ? which is not supported upstream yet)\n" + "> \302\240 error when trying to initialize one of the USB2 PHYs, but we have the\n" + "> \302\240 same problem on some GXBB boards. it is working fine for me - on a board\n" + "> \302\240 which is not supported upstream yet)\n" "> - hardware random number generator support (Meson8 and Meson8b seem to\n" - "> ? have two 32-bit hardware random number generator registers, while the\n" - "> ? GX SoCs only have one. This is not handled by the meson-rng driver yet,\n" - "> ? but that can still be improved later on)\n" + "> \302\240 have two 32-bit hardware random number generator registers, while the\n" + "> \302\240 GX SoCs only have one. This is not handled by the meson-rng driver yet,\n" + "> \302\240 but that can still be improved later on)\n" "> - SAR ADC support\n" "> - add reserved memory zones to fix random hangs when filling the memory\n" - "> ? (currently only on Meson8 until I have a Meson8b device to test if the\n" - "> ? same problem appears there as well)\n" + "> \302\240 (currently only on Meson8 until I have a Meson8b device to test if the\n" + "> \302\240 same problem appears there as well)\n" "> - use the real ethernet clock on Meson8 and Meson8b to fix ethernet when\n" - "> ? the bootloader does not enable the gate clock\n" + "> \302\240 the bootloader does not enable the gate clock\n" "> - add the SCU (Snoop Control Unit) which is needed for SMP support\n" "> - minor preparations for further .dts updates as this already exports the\n" - "> ? SDIO clocks (a driver for this MMC controller is work-in-progress) as\n" - "> ? well as the corresponding pin definitions in meson8.dtsi\n" + "> \302\240 SDIO clocks (a driver for this MMC controller is work-in-progress) as\n" + "> \302\240 well as the corresponding pin definitions in meson8.dtsi\n" "> - this adds the pwm_e (typically used for the 32.768 kHz LPO clock for the\n" - "> ? SDIO wifi chip) and pwm_f (used on some boards for the dimmable power\n" - "> ? LED) pins to meson8.dtsi\n" + "> \302\240 SDIO wifi chip) and pwm_f (used on some boards for the dimmable power\n" + "> \302\240 LED) pins to meson8.dtsi\n" "> \n" "> NOTE: the .dts changes from this series depend on my previous patch from\n" "> [0]: \"ARM: dts: meson8: fix the IR receiver pins\"\n" @@ -37,30 +45,35 @@ "> \n" "> \n" "> Martin Blumenstingl (13):\n" - "> ? clk: meson8b: export the SAR ADC clocks\n" - "> ? clk: meson8b: export the SDIO clock\n" - "> ? clk: meson8b: export the gate clock for the HW random number generator\n" - "> ? clk: meson8b: export the USB clocks\n" - "> ? clk: meson8b: export the ethernet gate clock\n" + "> \302\240 clk: meson8b: export the SAR ADC clocks\n" + "> \302\240 clk: meson8b: export the SDIO clock\n" + "> \302\240 clk: meson8b: export the gate clock for the HW random number generator\n" + "> \302\240 clk: meson8b: export the USB clocks\n" + "> \302\240 clk: meson8b: export the ethernet gate clock\n" "\n" "Applied these 5 clk patches to next/headers with Neil's Acks.\n" "\n" - "> ? ARM: dts: meson8: add the PWM_E and PWM_F pins\n" - "> ? ARM: dts: meson8: add the pins for the SDIO controller\n" - "> ? ARM: dts: meson: add the SAR ADC\n" - "> ? ARM: dts: meson8: add reserved memory zones\n" - "> ? ARM: dts: meson: add the hardware random number generator\n" - "> ? ARM: dts: meson: add USB support on Meson8 and Meson8b\n" - "> ? ARM: dts: meson8b: add the SCU device node\n" - "> ? ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b\n" + "> \302\240 ARM: dts: meson8: add the PWM_E and PWM_F pins\n" + "> \302\240 ARM: dts: meson8: add the pins for the SDIO controller\n" + "> \302\240 ARM: dts: meson: add the SAR ADC\n" + "> \302\240 ARM: dts: meson8: add reserved memory zones\n" + "> \302\240 ARM: dts: meson: add the hardware random number generator\n" + "> \302\240 ARM: dts: meson: add USB support on Meson8 and Meson8b\n" + "> \302\240 ARM: dts: meson8b: add the SCU device node\n" + "> \302\240 ARM: dts: meson: use the real ethernet clock on Meson8 and Meson8b\n" "> \n" - "> ?arch/arm/boot/dts/meson.dtsi?????????????|??51 +++++++++++++++\n" - "> ?arch/arm/boot/dts/meson8.dtsi????????????| 109\n" + "> \302\240arch/arm/boot/dts/meson.dtsi\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\24051 +++++++++++++++\n" + "> \302\240arch/arm/boot/dts/meson8.dtsi\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240| 109\n" "> ++++++++++++++++++++++++++++++-\n" - "> ?arch/arm/boot/dts/meson8b.dtsi???????????|??49 ++++++++++++++\n" - "> ?drivers/clk/meson/meson8b.h??????????????|??20 +++---\n" - "> ?include/dt-bindings/clock/meson8b-clkc.h |??10 +++\n" - "> ?5 files changed, 228 insertions(+), 11 deletions(-)\n" - > + "> \302\240arch/arm/boot/dts/meson8b.dtsi\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\24049 ++++++++++++++\n" + "> \302\240drivers/clk/meson/meson8b.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\24020 +++---\n" + "> \302\240include/dt-bindings/clock/meson8b-clkc.h |\302\240\302\24010 +++\n" + "> \302\2405 files changed, 228 insertions(+), 11 deletions(-)\n" + "> \n" + "\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -1bfa8dee04d28222222c09e9c9ac369a256f180d82165a164c6a7754a7a38af2 +4f15256c736aeebe43ade22b60687b9a81b1163d86125e6746d5a6474cc817c7
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