diff for duplicates of <1497923734.42572.8.camel@intel.com> diff --git a/a/1.txt b/N1/1.txt index 23ab231..62c5469 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,98 +1,135 @@ On Mon, 2017-06-19 at 20:49 -0500, Bjorn Helgaas wrote: > [+cc Marc] -> +>=20 > On Tue, Jun 20, 2017 at 08:38:14AM +0800, Ley Foon Tan wrote: -> > +> >=20 > > On Mon, 2017-06-19 at 18:47 -0500, Bjorn Helgaas wrote: -> > > +> > >=20 > > > [+cc Thomas, Ley Foon] -> > > +> > >=20 > > > On Sat, Jun 17, 2017 at 12:57:38PM -0700, Paul Burton wrote: -> > > > -> > > > +> > > >=20 +> > > >=20 > > > > The driver expects to use hardware IRQ numbers 1 through 4 for > > > > INTX > > > > interrupts, but only creates an IRQ domain of size 4 (ie. IRQ > > > > numbers 0 > > > > through 3). This results in a warning from irq_domain_associate > > > > when it -> > > > is called with hwirq=4: -> > > > -> > > > WARNING: CPU: 0 PID: 1 at kernel/irq/irqdomain.c:365 -> > > > irq_domain_associate+0x170/0x220 -> > > > error: hwirq 0x4 is too large for dummy -> > > > Modules linked in: -> > > > CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W -> > > > 4.12.0-rc5-00126-g19e1b3a10aad-dirty #427 -> > > > Stack : 0000000000000000 0000000000000004 0000000000000006 +> > > > is called with hwirq=3D4: +> > > >=20 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0WARNING: CPU: 0 PID: 1 at kernel/irq/= +irqdomain.c:365 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0irq_domain_as= +sociate+0x170/0x220 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0error: hwirq 0x4 is too large for dum= +my +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0Modules linked in: +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0CPU: 0 PID: 1 Comm: swapper/0 Tainted= +: G=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0W +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A04.12.0-rc5-00= +126-g19e1b3a10aad-dirty #427 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0Stack : 0000000000000000 000000000000= +0004 0000000000000006 > > > > ffffffff8092c78a -> > > > 0000000000000061 ffffffff8018bf60 0000000000000000 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= +=C2=A0=C2=A00000000000000061 ffffffff8018bf60 0000000000000000 > > > > 0000000000000000 -> > > > ffffffff8088c287 ffffffff80811d18 a8000000ffc60000 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= +=C2=A0=C2=A0ffffffff8088c287 ffffffff80811d18 a8000000ffc60000 > > > > ffffffff80926678 -> > > > 0000000000000001 0000000000000000 ffffffff80887880 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= +=C2=A0=C2=A00000000000000001 0000000000000000 ffffffff80887880 > > > > ffffffff80960000 -> > > > ffffffff80920000 ffffffff801e6744 ffffffff80887880 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= +=C2=A0=C2=A0ffffffff80920000 ffffffff801e6744 ffffffff80887880 > > > > a8000000ffc4f8f8 -> > > > 000000000000089c ffffffff8018d260 0000000000010000 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= +=C2=A0=C2=A0000000000000089c ffffffff8018d260 0000000000010000 > > > > ffffffff80811d18 -> > > > 0000000000000000 0000000000000001 0000000000000000 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= +=C2=A0=C2=A00000000000000000 0000000000000001 0000000000000000 > > > > 0000000000000000 -> > > > 0000000000000000 a8000000ffc4f840 0000000000000000 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= +=C2=A0=C2=A00000000000000000 a8000000ffc4f840 0000000000000000 > > > > ffffffff8042cf34 -> > > > 0000000000000000 0000000000000000 0000000000000000 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= +=C2=A0=C2=A00000000000000000 0000000000000000 0000000000000000 > > > > 0000000000040c00 -> > > > 0000000000000000 ffffffff8010d1c8 0000000000000000 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= +=C2=A0=C2=A00000000000000000 ffffffff8010d1c8 0000000000000000 > > > > ffffffff8042cf34 -> > > > ... -> > > > Call Trace: -> > > > [<ffffffff8010d1c8>] show_stack+0x80/0xa0 -> > > > [<ffffffff8042cf34>] dump_stack+0xd4/0x110 -> > > > [<ffffffff8013ea98>] __warn+0xf0/0x108 -> > > > [<ffffffff8013eb14>] warn_slowpath_fmt+0x3c/0x48 -> > > > [<ffffffff80196528>] irq_domain_associate+0x170/0x220 -> > > > [<ffffffff80196bf0>] irq_create_mapping+0x88/0x118 -> > > > [<ffffffff801976a8>] irq_create_fwspec_mapping+0xb8/0x320 -> > > > [<ffffffff80197970>] irq_create_of_mapping+0x60/0x70 -> > > > [<ffffffff805d1318>] of_irq_parse_and_map_pci+0x20/0x38 -> > > > [<ffffffff8049c210>] pci_fixup_irqs+0x60/0xe0 -> > > > [<ffffffff8049cd64>] xilinx_pcie_probe+0x28c/0x478 -> > > > [<ffffffff804e8ca8>] platform_drv_probe+0x50/0xd0 -> > > > [<ffffffff804e73a4>] driver_probe_device+0x2c4/0x3a0 -> > > > [<ffffffff804e7544>] __driver_attach+0xc4/0xd0 -> > > > [<ffffffff804e5254>] bus_for_each_dev+0x64/0xa8 -> > > > [<ffffffff804e5e40>] bus_add_driver+0x1f0/0x268 -> > > > [<ffffffff804e8000>] driver_register+0x68/0x118 -> > > > [<ffffffff801001a4>] do_one_initcall+0x4c/0x178 -> > > > [<ffffffff808d3ca8>] kernel_init_freeable+0x204/0x2b0 -> > > > [<ffffffff80730b68>] kernel_init+0x10/0xf8 -> > > > [<ffffffff80106218>] ret_from_kernel_thread+0x14/0x1c -> > > > +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= +=C2=A0=C2=A0... +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0Call Trace: +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8010d1c8>] show_stack+0x80/= +0xa0 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8042cf34>] dump_stack+0xd4/= +0x110 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8013ea98>] __warn+0xf0/0x10= +8 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8013eb14>] warn_slowpath_fm= +t+0x3c/0x48 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80196528>] irq_domain_assoc= +iate+0x170/0x220 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80196bf0>] irq_create_mappi= +ng+0x88/0x118 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff801976a8>] irq_create_fwspe= +c_mapping+0xb8/0x320 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80197970>] irq_create_of_ma= +pping+0x60/0x70 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff805d1318>] of_irq_parse_and= +_map_pci+0x20/0x38 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8049c210>] pci_fixup_irqs+0= +x60/0xe0 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8049cd64>] xilinx_pcie_prob= +e+0x28c/0x478 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e8ca8>] platform_drv_pro= +be+0x50/0xd0 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e73a4>] driver_probe_dev= +ice+0x2c4/0x3a0 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e7544>] __driver_attach+= +0xc4/0xd0 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e5254>] bus_for_each_dev= ++0x64/0xa8 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e5e40>] bus_add_driver+0= +x1f0/0x268 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e8000>] driver_register+= +0x68/0x118 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff801001a4>] do_one_initcall+= +0x4c/0x178 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff808d3ca8>] kernel_init_free= +able+0x204/0x2b0 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80730b68>] kernel_init+0x10= +/0xf8 +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80106218>] ret_from_kernel_= +thread+0x14/0x1c +> > > >=20 > > > > This patch avoids that warning by creating the legacy IRQ > > > > domain > > > > with -> > > > size 5 rather than 4, allowing it to cover the hwirq=4/INTD +> > > > size 5 rather than 4, allowing it to cover the hwirq=3D4/INTD > > > > case. -> > > > +> > > >=20 > > > > Signed-off-by: Paul Burton <paul.burton@imgtec.com> > > > > Cc: Bharat Kumar Gogada <bharatku@xilinx.com> > > > > Cc: Bjorn Helgaas <bhelgaas@google.com> > > > > Cc: Michal Simek <michal.simek@xilinx.com> > > > > Cc: Ravikiran Gummaluri <rgummal@xilinx.com> > > > > Cc: linux-pci@vger.kernel.org -> > > > +> > > >=20 > > > > --- -> > > > +> > > >=20 > > > > Changes in v5: > > > > - New patch; replacing "PCI: xilinx: Fix INTX irq dispatch". -> > > > +> > > >=20 > > > > Changes in v4: None > > > > Changes in v3: None > > > > Changes in v2: None -> > > > -> > > > drivers/pci/host/pcie-xilinx.c | 2 +- -> > > > 1 file changed, 1 insertion(+), 1 deletion(-) -> > > > +> > > >=20 +> > > > =C2=A0drivers/pci/host/pcie-xilinx.c | 2 +- +> > > > =C2=A01 file changed, 1 insertion(+), 1 deletion(-) +> > > >=20 > > > > diff --git a/drivers/pci/host/pcie-xilinx.c > > > > b/drivers/pci/host/pcie-xilinx.c > > > > index 2fe2df51f9f8..94c71fb91648 100644 @@ -101,54 +138,64 @@ On Mon, 2017-06-19 at 20:49 -0500, Bjorn Helgaas wrote: > > > > @@ -524,7 +524,7 @@ static int > > > > xilinx_pcie_init_irq_domain(struct > > > > xilinx_pcie_port *port) -> > > > return -ENODEV; -> > > > } -> > > > -> > > > - port->leg_domain = irq_domain_add_linear(pcie_intc_node, +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= +=C2=A0=C2=A0=C2=A0return -ENODEV; +> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0} +> > > >=20 +> > > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0port->leg_domain =3D irq_domain_add_= +linear(pcie_intc_node, > > > > 4, -> > > > + port->leg_domain = irq_domain_add_linear(pcie_intc_node, +> > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0port->leg_domain =3D irq_domain_add_= +linear(pcie_intc_node, > > > > 1 + > > > > 4, -> > > I don't understand this. Several drivers call +> > > I don't understand this.=C2=A0=C2=A0Several drivers call > > > irq_domain_add_linear() with > > > a size of 4: -> > > -> > > dra7xx_pcie_init_irq_domain -> > > ks_dw_pcie_host_init -> > > advk_pcie_init_irq_domain -> > > faraday_pci_setup_cascaded_irq -> > > rockchip_pcie_init_irq_domain -> > > nwl_pcie_init_irq_domain -> > > +> > >=20 +> > > =C2=A0 dra7xx_pcie_init_irq_domain +> > > =C2=A0 ks_dw_pcie_host_init +> > > =C2=A0 advk_pcie_init_irq_domain +> > > =C2=A0 faraday_pci_setup_cascaded_irq +> > > =C2=A0 rockchip_pcie_init_irq_domain +> > > =C2=A0 nwl_pcie_init_irq_domain +> > >=20 > > > Only one other in drivers/pci uses a size of 5: -> > > -> > > altera_pcie_init_irq_domain -> > > -> > > Why can't we use a size of 4 for all of them? We only have INTA- -> > > INTD. Are +> > >=20 +> > > =C2=A0 altera_pcie_init_irq_domain +> > >=20 +> > > Why can't we use a size of 4 for all of them?=C2=A0=C2=A0We only have= + INTA- +> > > INTD.=C2=A0=C2=A0Are > > > altera and xilinx missing something to apply an offset from the > > > 0-3 > > > space > > > to the 1-4 space? -> > We have the same discussion before in 2016: https://lkml.org/lkml/2 +> > We have the same discussion before in 2016:=C2=A0https://lkml.org/lkml/= +2 > > 016/ > > 8/30/198 -> Thanks for digging that out. I knew we'd discussed this before, but +> Thanks for digging that out.=C2=A0=C2=A0I knew we'd discussed this before= +, but > I -> couldn't find it in the archives. I don't think anybody was really +> couldn't find it in the archives.=C2=A0=C2=A0I don't think anybody was re= +ally > satisfied with the outcome, but we accepted it to make forward > progress. -> -> > +>=20 +> >=20 > > This is because legacy interrupt is start with index 1 instead of > > 0. -> I'm not buying this. Your argument was that "the hwirq for legacy +> I'm not buying this.=C2=A0=C2=A0Your argument was that "the hwirq for leg= +acy > interrupts will start at 0x1 to 0x4 (INTA to INTD) and these values -> are as per PCIe specification for legacy interrupts. So these cannot +> are as per PCIe specification for legacy interrupts.=C2=A0=C2=A0So these = +cannot > be numbered from 0." -> +>=20 > But all the other drivers I mentioned get along with the 0-3 range -> somehow. If there's something different about altera and xilinx that +> somehow.=C2=A0=C2=A0If there's something different about altera and xilin= +x that > means they can't use the same solution the others do, I'd like to > know > what it is. diff --git a/a/content_digest b/N1/content_digest index 3f4dfdc..8372dc2 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -21,99 +21,136 @@ "b\0" "On Mon, 2017-06-19 at 20:49 -0500, Bjorn Helgaas wrote:\n" "> [+cc Marc]\n" - "> \n" + ">=20\n" "> On Tue, Jun 20, 2017 at 08:38:14AM +0800, Ley Foon Tan wrote:\n" - "> > \n" + "> >=20\n" "> > On Mon, 2017-06-19 at 18:47 -0500, Bjorn Helgaas wrote:\n" - "> > > \n" + "> > >=20\n" "> > > [+cc Thomas, Ley Foon]\n" - "> > > \n" + "> > >=20\n" "> > > On Sat, Jun 17, 2017 at 12:57:38PM -0700, Paul Burton wrote:\n" - "> > > > \n" - "> > > > \n" + "> > > >=20\n" + "> > > >=20\n" "> > > > The driver expects to use hardware IRQ numbers 1 through 4 for\n" "> > > > INTX\n" "> > > > interrupts, but only creates an IRQ domain of size 4 (ie. IRQ\n" "> > > > numbers 0\n" "> > > > through 3). This results in a warning from irq_domain_associate\n" "> > > > when it\n" - "> > > > is called with hwirq=4:\n" - "> > > > \n" - "> > > > \302\240\302\240\302\240\302\240\302\240WARNING: CPU: 0 PID: 1 at kernel/irq/irqdomain.c:365\n" - "> > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240irq_domain_associate+0x170/0x220\n" - "> > > > \302\240\302\240\302\240\302\240\302\240error: hwirq 0x4 is too large for dummy\n" - "> > > > \302\240\302\240\302\240\302\240\302\240Modules linked in:\n" - "> > > > \302\240\302\240\302\240\302\240\302\240CPU: 0 PID: 1 Comm: swapper/0 Tainted: G\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240W\n" - "> > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2404.12.0-rc5-00126-g19e1b3a10aad-dirty #427\n" - "> > > > \302\240\302\240\302\240\302\240\302\240Stack : 0000000000000000 0000000000000004 0000000000000006\n" + "> > > > is called with hwirq=3D4:\n" + "> > > >=20\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0WARNING: CPU: 0 PID: 1 at kernel/irq/=\n" + "irqdomain.c:365\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0irq_domain_as=\n" + "sociate+0x170/0x220\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0error: hwirq 0x4 is too large for dum=\n" + "my\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0Modules linked in:\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0CPU: 0 PID: 1 Comm: swapper/0 Tainted=\n" + ": G=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0W\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A04.12.0-rc5-00=\n" + "126-g19e1b3a10aad-dirty #427\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0Stack : 0000000000000000 000000000000=\n" + "0004 0000000000000006\n" "> > > > ffffffff8092c78a\n" - "> > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2400000000000000061 ffffffff8018bf60 0000000000000000\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" + "=C2=A0=C2=A00000000000000061 ffffffff8018bf60 0000000000000000\n" "> > > > 0000000000000000\n" - "> > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240ffffffff8088c287 ffffffff80811d18 a8000000ffc60000\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" + "=C2=A0=C2=A0ffffffff8088c287 ffffffff80811d18 a8000000ffc60000\n" "> > > > ffffffff80926678\n" - "> > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2400000000000000001 0000000000000000 ffffffff80887880\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" + "=C2=A0=C2=A00000000000000001 0000000000000000 ffffffff80887880\n" "> > > > ffffffff80960000\n" - "> > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240ffffffff80920000 ffffffff801e6744 ffffffff80887880\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" + "=C2=A0=C2=A0ffffffff80920000 ffffffff801e6744 ffffffff80887880\n" "> > > > a8000000ffc4f8f8\n" - "> > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240000000000000089c ffffffff8018d260 0000000000010000\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" + "=C2=A0=C2=A0000000000000089c ffffffff8018d260 0000000000010000\n" "> > > > ffffffff80811d18\n" - "> > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2400000000000000000 0000000000000001 0000000000000000\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" + "=C2=A0=C2=A00000000000000000 0000000000000001 0000000000000000\n" "> > > > 0000000000000000\n" - "> > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2400000000000000000 a8000000ffc4f840 0000000000000000\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" + "=C2=A0=C2=A00000000000000000 a8000000ffc4f840 0000000000000000\n" "> > > > ffffffff8042cf34\n" - "> > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2400000000000000000 0000000000000000 0000000000000000\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" + "=C2=A0=C2=A00000000000000000 0000000000000000 0000000000000000\n" "> > > > 0000000000040c00\n" - "> > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2400000000000000000 ffffffff8010d1c8 0000000000000000\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" + "=C2=A0=C2=A00000000000000000 ffffffff8010d1c8 0000000000000000\n" "> > > > ffffffff8042cf34\n" - "> > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240...\n" - "> > > > \302\240\302\240\302\240\302\240\302\240Call Trace:\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff8010d1c8>] show_stack+0x80/0xa0\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff8042cf34>] dump_stack+0xd4/0x110\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff8013ea98>] __warn+0xf0/0x108\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff8013eb14>] warn_slowpath_fmt+0x3c/0x48\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff80196528>] irq_domain_associate+0x170/0x220\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff80196bf0>] irq_create_mapping+0x88/0x118\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff801976a8>] irq_create_fwspec_mapping+0xb8/0x320\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff80197970>] irq_create_of_mapping+0x60/0x70\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff805d1318>] of_irq_parse_and_map_pci+0x20/0x38\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff8049c210>] pci_fixup_irqs+0x60/0xe0\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff8049cd64>] xilinx_pcie_probe+0x28c/0x478\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff804e8ca8>] platform_drv_probe+0x50/0xd0\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff804e73a4>] driver_probe_device+0x2c4/0x3a0\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff804e7544>] __driver_attach+0xc4/0xd0\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff804e5254>] bus_for_each_dev+0x64/0xa8\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff804e5e40>] bus_add_driver+0x1f0/0x268\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff804e8000>] driver_register+0x68/0x118\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff801001a4>] do_one_initcall+0x4c/0x178\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff808d3ca8>] kernel_init_freeable+0x204/0x2b0\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff80730b68>] kernel_init+0x10/0xf8\n" - "> > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff80106218>] ret_from_kernel_thread+0x14/0x1c\n" - "> > > > \n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" + "=C2=A0=C2=A0...\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0Call Trace:\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8010d1c8>] show_stack+0x80/=\n" + "0xa0\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8042cf34>] dump_stack+0xd4/=\n" + "0x110\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8013ea98>] __warn+0xf0/0x10=\n" + "8\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8013eb14>] warn_slowpath_fm=\n" + "t+0x3c/0x48\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80196528>] irq_domain_assoc=\n" + "iate+0x170/0x220\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80196bf0>] irq_create_mappi=\n" + "ng+0x88/0x118\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff801976a8>] irq_create_fwspe=\n" + "c_mapping+0xb8/0x320\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80197970>] irq_create_of_ma=\n" + "pping+0x60/0x70\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff805d1318>] of_irq_parse_and=\n" + "_map_pci+0x20/0x38\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8049c210>] pci_fixup_irqs+0=\n" + "x60/0xe0\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8049cd64>] xilinx_pcie_prob=\n" + "e+0x28c/0x478\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e8ca8>] platform_drv_pro=\n" + "be+0x50/0xd0\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e73a4>] driver_probe_dev=\n" + "ice+0x2c4/0x3a0\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e7544>] __driver_attach+=\n" + "0xc4/0xd0\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e5254>] bus_for_each_dev=\n" + "+0x64/0xa8\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e5e40>] bus_add_driver+0=\n" + "x1f0/0x268\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e8000>] driver_register+=\n" + "0x68/0x118\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff801001a4>] do_one_initcall+=\n" + "0x4c/0x178\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff808d3ca8>] kernel_init_free=\n" + "able+0x204/0x2b0\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80730b68>] kernel_init+0x10=\n" + "/0xf8\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80106218>] ret_from_kernel_=\n" + "thread+0x14/0x1c\n" + "> > > >=20\n" "> > > > This patch avoids that warning by creating the legacy IRQ\n" "> > > > domain\n" "> > > > with\n" - "> > > > size 5 rather than 4, allowing it to cover the hwirq=4/INTD\n" + "> > > > size 5 rather than 4, allowing it to cover the hwirq=3D4/INTD\n" "> > > > case.\n" - "> > > > \n" + "> > > >=20\n" "> > > > Signed-off-by: Paul Burton <paul.burton@imgtec.com>\n" "> > > > Cc: Bharat Kumar Gogada <bharatku@xilinx.com>\n" "> > > > Cc: Bjorn Helgaas <bhelgaas@google.com>\n" "> > > > Cc: Michal Simek <michal.simek@xilinx.com>\n" "> > > > Cc: Ravikiran Gummaluri <rgummal@xilinx.com>\n" "> > > > Cc: linux-pci@vger.kernel.org\n" - "> > > > \n" + "> > > >=20\n" "> > > > ---\n" - "> > > > \n" + "> > > >=20\n" "> > > > Changes in v5:\n" "> > > > - New patch; replacing \"PCI: xilinx: Fix INTX irq dispatch\".\n" - "> > > > \n" + "> > > >=20\n" "> > > > Changes in v4: None\n" "> > > > Changes in v3: None\n" "> > > > Changes in v2: None\n" - "> > > > \n" - "> > > > \302\240drivers/pci/host/pcie-xilinx.c | 2 +-\n" - "> > > > \302\2401 file changed, 1 insertion(+), 1 deletion(-)\n" - "> > > > \n" + "> > > >=20\n" + "> > > > =C2=A0drivers/pci/host/pcie-xilinx.c | 2 +-\n" + "> > > > =C2=A01 file changed, 1 insertion(+), 1 deletion(-)\n" + "> > > >=20\n" "> > > > diff --git a/drivers/pci/host/pcie-xilinx.c\n" "> > > > b/drivers/pci/host/pcie-xilinx.c\n" "> > > > index 2fe2df51f9f8..94c71fb91648 100644\n" @@ -122,54 +159,64 @@ "> > > > @@ -524,7 +524,7 @@ static int\n" "> > > > xilinx_pcie_init_irq_domain(struct\n" "> > > > xilinx_pcie_port *port)\n" - "> > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240return -ENODEV;\n" - "> > > > \302\240\302\240\302\240\302\240\302\240\302\240}\n" - "> > > > \n" - "> > > > -\302\240\302\240\302\240\302\240\302\240port->leg_domain = irq_domain_add_linear(pcie_intc_node,\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" + "=C2=A0=C2=A0=C2=A0return -ENODEV;\n" + "> > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0}\n" + "> > > >=20\n" + "> > > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0port->leg_domain =3D irq_domain_add_=\n" + "linear(pcie_intc_node,\n" "> > > > 4,\n" - "> > > > +\302\240\302\240\302\240\302\240\302\240port->leg_domain = irq_domain_add_linear(pcie_intc_node,\n" + "> > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0port->leg_domain =3D irq_domain_add_=\n" + "linear(pcie_intc_node,\n" "> > > > 1 +\n" "> > > > 4,\n" - "> > > I don't understand this.\302\240\302\240Several drivers call\n" + "> > > I don't understand this.=C2=A0=C2=A0Several drivers call\n" "> > > irq_domain_add_linear() with\n" "> > > a size of 4:\n" - "> > > \n" - "> > > \302\240 dra7xx_pcie_init_irq_domain\n" - "> > > \302\240 ks_dw_pcie_host_init\n" - "> > > \302\240 advk_pcie_init_irq_domain\n" - "> > > \302\240 faraday_pci_setup_cascaded_irq\n" - "> > > \302\240 rockchip_pcie_init_irq_domain\n" - "> > > \302\240 nwl_pcie_init_irq_domain\n" - "> > > \n" + "> > >=20\n" + "> > > =C2=A0 dra7xx_pcie_init_irq_domain\n" + "> > > =C2=A0 ks_dw_pcie_host_init\n" + "> > > =C2=A0 advk_pcie_init_irq_domain\n" + "> > > =C2=A0 faraday_pci_setup_cascaded_irq\n" + "> > > =C2=A0 rockchip_pcie_init_irq_domain\n" + "> > > =C2=A0 nwl_pcie_init_irq_domain\n" + "> > >=20\n" "> > > Only one other in drivers/pci uses a size of 5:\n" - "> > > \n" - "> > > \302\240 altera_pcie_init_irq_domain\n" - "> > > \n" - "> > > Why can't we use a size of 4 for all of them?\302\240\302\240We only have INTA-\n" - "> > > INTD.\302\240\302\240Are\n" + "> > >=20\n" + "> > > =C2=A0 altera_pcie_init_irq_domain\n" + "> > >=20\n" + "> > > Why can't we use a size of 4 for all of them?=C2=A0=C2=A0We only have=\n" + " INTA-\n" + "> > > INTD.=C2=A0=C2=A0Are\n" "> > > altera and xilinx missing something to apply an offset from the\n" "> > > 0-3\n" "> > > space\n" "> > > to the 1-4 space?\n" - "> > We have the same discussion before in 2016:\302\240https://lkml.org/lkml/2\n" + "> > We have the same discussion before in 2016:=C2=A0https://lkml.org/lkml/=\n" + "2\n" "> > 016/\n" "> > 8/30/198\n" - "> Thanks for digging that out.\302\240\302\240I knew we'd discussed this before, but\n" + "> Thanks for digging that out.=C2=A0=C2=A0I knew we'd discussed this before=\n" + ", but\n" "> I\n" - "> couldn't find it in the archives.\302\240\302\240I don't think anybody was really\n" + "> couldn't find it in the archives.=C2=A0=C2=A0I don't think anybody was re=\n" + "ally\n" "> satisfied with the outcome, but we accepted it to make forward\n" "> progress.\n" - "> \n" - "> > \n" + ">=20\n" + "> >=20\n" "> > This is because legacy interrupt is start with index 1 instead of\n" "> > 0.\n" - "> I'm not buying this.\302\240\302\240Your argument was that \"the hwirq for legacy\n" + "> I'm not buying this.=C2=A0=C2=A0Your argument was that \"the hwirq for leg=\n" + "acy\n" "> interrupts will start at 0x1 to 0x4 (INTA to INTD) and these values\n" - "> are as per PCIe specification for legacy interrupts.\302\240\302\240So these cannot\n" + "> are as per PCIe specification for legacy interrupts.=C2=A0=C2=A0So these =\n" + "cannot\n" "> be numbered from 0.\"\n" - "> \n" + ">=20\n" "> But all the other drivers I mentioned get along with the 0-3 range\n" - "> somehow.\302\240\302\240If there's something different about altera and xilinx that\n" + "> somehow.=C2=A0=C2=A0If there's something different about altera and xilin=\n" + "x that\n" "> means they can't use the same solution the others do, I'd like to\n" "> know\n" "> what it is.\n" @@ -183,4 +230,4 @@ "Regards\n" Ley Foon -e26b2672e59eec8e54698969361de4b8266f0ea152a71dd581fc5e67a2cef559 +d158fc2592f70f91ec1e272b92757c84e47a3aa8650c655d39768403f1e59593
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.