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diff for duplicates of <1497924151.42572.10.camel@intel.com>

diff --git a/a/1.txt b/N1/1.txt
index 827a9d3..7e807f9 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,20 +1,20 @@
 On Tue, 2017-06-20 at 09:55 +0800, Ley Foon Tan wrote:
 > On Mon, 2017-06-19 at 20:49 -0500, Bjorn Helgaas wrote:
-> > 
+> >=20
 > > [+cc Marc]
-> > 
+> >=20
 > > On Tue, Jun 20, 2017 at 08:38:14AM +0800, Ley Foon Tan wrote:
-> > > 
-> > > 
+> > >=20
+> > >=20
 > > > On Mon, 2017-06-19 at 18:47 -0500, Bjorn Helgaas wrote:
-> > > > 
-> > > > 
+> > > >=20
+> > > >=20
 > > > > [+cc Thomas, Ley Foon]
-> > > > 
+> > > >=20
 > > > > On Sat, Jun 17, 2017 at 12:57:38PM -0700, Paul Burton wrote:
-> > > > > 
-> > > > > 
-> > > > > 
+> > > > >=20
+> > > > >=20
+> > > > >=20
 > > > > > The driver expects to use hardware IRQ numbers 1 through 4
 > > > > > for
 > > > > > INTX
@@ -23,94 +23,130 @@ On Tue, 2017-06-20 at 09:55 +0800, Ley Foon Tan wrote:
 > > > > > through 3). This results in a warning from
 > > > > > irq_domain_associate
 > > > > > when it
-> > > > > is called with hwirq=4:
-> > > > > 
-> > > > >      WARNING: CPU: 0 PID: 1 at kernel/irq/irqdomain.c:365
-> > > > >          irq_domain_associate+0x170/0x220
-> > > > >      error: hwirq 0x4 is too large for dummy
-> > > > >      Modules linked in:
-> > > > >      CPU: 0 PID: 1 Comm: swapper/0 Tainted: G        W
-> > > > >          4.12.0-rc5-00126-g19e1b3a10aad-dirty #427
-> > > > >      Stack : 0000000000000000 0000000000000004
+> > > > > is called with hwirq=3D4:
+> > > > >=20
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0WARNING: CPU: 0 PID: 1 at kernel/ir=
+q/irqdomain.c:365
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0irq_domain_=
+associate+0x170/0x220
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0error: hwirq 0x4 is too large for d=
+ummy
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0Modules linked in:
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0CPU: 0 PID: 1 Comm: swapper/0 Taint=
+ed: G=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0W
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A04.12.0-rc5-=
+00126-g19e1b3a10aad-dirty #427
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0Stack : 0000000000000000 0000000000=
+000004
 > > > > > 0000000000000006
 > > > > > ffffffff8092c78a
-> > > > >              0000000000000061 ffffffff8018bf60
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
+=A0=C2=A0=C2=A00000000000000061 ffffffff8018bf60
 > > > > > 0000000000000000
 > > > > > 0000000000000000
-> > > > >              ffffffff8088c287 ffffffff80811d18
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
+=A0=C2=A0=C2=A0ffffffff8088c287 ffffffff80811d18
 > > > > > a8000000ffc60000
 > > > > > ffffffff80926678
-> > > > >              0000000000000001 0000000000000000
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
+=A0=C2=A0=C2=A00000000000000001 0000000000000000
 > > > > > ffffffff80887880
 > > > > > ffffffff80960000
-> > > > >              ffffffff80920000 ffffffff801e6744
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
+=A0=C2=A0=C2=A0ffffffff80920000 ffffffff801e6744
 > > > > > ffffffff80887880
 > > > > > a8000000ffc4f8f8
-> > > > >              000000000000089c ffffffff8018d260
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
+=A0=C2=A0=C2=A0000000000000089c ffffffff8018d260
 > > > > > 0000000000010000
 > > > > > ffffffff80811d18
-> > > > >              0000000000000000 0000000000000001
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
+=A0=C2=A0=C2=A00000000000000000 0000000000000001
 > > > > > 0000000000000000
 > > > > > 0000000000000000
-> > > > >              0000000000000000 a8000000ffc4f840
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
+=A0=C2=A0=C2=A00000000000000000 a8000000ffc4f840
 > > > > > 0000000000000000
 > > > > > ffffffff8042cf34
-> > > > >              0000000000000000 0000000000000000
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
+=A0=C2=A0=C2=A00000000000000000 0000000000000000
 > > > > > 0000000000000000
 > > > > > 0000000000040c00
-> > > > >              0000000000000000 ffffffff8010d1c8
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
+=A0=C2=A0=C2=A00000000000000000 ffffffff8010d1c8
 > > > > > 0000000000000000
 > > > > > ffffffff8042cf34
-> > > > >              ...
-> > > > >      Call Trace:
-> > > > >      [<ffffffff8010d1c8>] show_stack+0x80/0xa0
-> > > > >      [<ffffffff8042cf34>] dump_stack+0xd4/0x110
-> > > > >      [<ffffffff8013ea98>] __warn+0xf0/0x108
-> > > > >      [<ffffffff8013eb14>] warn_slowpath_fmt+0x3c/0x48
-> > > > >      [<ffffffff80196528>] irq_domain_associate+0x170/0x220
-> > > > >      [<ffffffff80196bf0>] irq_create_mapping+0x88/0x118
-> > > > >      [<ffffffff801976a8>]
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
+=A0=C2=A0=C2=A0...
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0Call Trace:
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8010d1c8>] show_stack+0x8=
+0/0xa0
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8042cf34>] dump_stack+0xd=
+4/0x110
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8013ea98>] __warn+0xf0/0x=
+108
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8013eb14>] warn_slowpath_=
+fmt+0x3c/0x48
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80196528>] irq_domain_ass=
+ociate+0x170/0x220
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80196bf0>] irq_create_map=
+ping+0x88/0x118
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff801976a8>]
 > > > > > irq_create_fwspec_mapping+0xb8/0x320
-> > > > >      [<ffffffff80197970>] irq_create_of_mapping+0x60/0x70
-> > > > >      [<ffffffff805d1318>] of_irq_parse_and_map_pci+0x20/0x38
-> > > > >      [<ffffffff8049c210>] pci_fixup_irqs+0x60/0xe0
-> > > > >      [<ffffffff8049cd64>] xilinx_pcie_probe+0x28c/0x478
-> > > > >      [<ffffffff804e8ca8>] platform_drv_probe+0x50/0xd0
-> > > > >      [<ffffffff804e73a4>] driver_probe_device+0x2c4/0x3a0
-> > > > >      [<ffffffff804e7544>] __driver_attach+0xc4/0xd0
-> > > > >      [<ffffffff804e5254>] bus_for_each_dev+0x64/0xa8
-> > > > >      [<ffffffff804e5e40>] bus_add_driver+0x1f0/0x268
-> > > > >      [<ffffffff804e8000>] driver_register+0x68/0x118
-> > > > >      [<ffffffff801001a4>] do_one_initcall+0x4c/0x178
-> > > > >      [<ffffffff808d3ca8>] kernel_init_freeable+0x204/0x2b0
-> > > > >      [<ffffffff80730b68>] kernel_init+0x10/0xf8
-> > > > >      [<ffffffff80106218>] ret_from_kernel_thread+0x14/0x1c
-> > > > > 
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80197970>] irq_create_of_=
+mapping+0x60/0x70
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff805d1318>] of_irq_parse_a=
+nd_map_pci+0x20/0x38
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8049c210>] pci_fixup_irqs=
++0x60/0xe0
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8049cd64>] xilinx_pcie_pr=
+obe+0x28c/0x478
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e8ca8>] platform_drv_p=
+robe+0x50/0xd0
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e73a4>] driver_probe_d=
+evice+0x2c4/0x3a0
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e7544>] __driver_attac=
+h+0xc4/0xd0
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e5254>] bus_for_each_d=
+ev+0x64/0xa8
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e5e40>] bus_add_driver=
++0x1f0/0x268
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e8000>] driver_registe=
+r+0x68/0x118
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff801001a4>] do_one_initcal=
+l+0x4c/0x178
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff808d3ca8>] kernel_init_fr=
+eeable+0x204/0x2b0
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80730b68>] kernel_init+0x=
+10/0xf8
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80106218>] ret_from_kerne=
+l_thread+0x14/0x1c
+> > > > >=20
 > > > > > This patch avoids that warning by creating the legacy IRQ
 > > > > > domain
 > > > > > with
-> > > > > size 5 rather than 4, allowing it to cover the hwirq=4/INTD
+> > > > > size 5 rather than 4, allowing it to cover the hwirq=3D4/INTD
 > > > > > case.
-> > > > > 
+> > > > >=20
 > > > > > Signed-off-by: Paul Burton <paul.burton@imgtec.com>
 > > > > > Cc: Bharat Kumar Gogada <bharatku@xilinx.com>
 > > > > > Cc: Bjorn Helgaas <bhelgaas@google.com>
 > > > > > Cc: Michal Simek <michal.simek@xilinx.com>
 > > > > > Cc: Ravikiran Gummaluri <rgummal@xilinx.com>
 > > > > > Cc: linux-pci@vger.kernel.org
-> > > > > 
+> > > > >=20
 > > > > > ---
-> > > > > 
+> > > > >=20
 > > > > > Changes in v5:
 > > > > > - New patch; replacing "PCI: xilinx: Fix INTX irq dispatch".
-> > > > > 
+> > > > >=20
 > > > > > Changes in v4: None
 > > > > > Changes in v3: None
 > > > > > Changes in v2: None
-> > > > > 
-> > > > >  drivers/pci/host/pcie-xilinx.c | 2 +-
-> > > > >  1 file changed, 1 insertion(+), 1 deletion(-)
-> > > > > 
+> > > > >=20
+> > > > > =C2=A0drivers/pci/host/pcie-xilinx.c | 2 +-
+> > > > > =C2=A01 file changed, 1 insertion(+), 1 deletion(-)
+> > > > >=20
 > > > > > diff --git a/drivers/pci/host/pcie-xilinx.c
 > > > > > b/drivers/pci/host/pcie-xilinx.c
 > > > > > index 2fe2df51f9f8..94c71fb91648 100644
@@ -119,34 +155,36 @@ On Tue, 2017-06-20 at 09:55 +0800, Ley Foon Tan wrote:
 > > > > > @@ -524,7 +524,7 @@ static int
 > > > > > xilinx_pcie_init_irq_domain(struct
 > > > > > xilinx_pcie_port *port)
-> > > > >               return -ENODEV;
-> > > > >       }
-> > > > > 
-> > > > > -     port->leg_domain =
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
+=A0=C2=A0=C2=A0=C2=A0return -ENODEV;
+> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0}
+> > > > >=20
+> > > > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0port->leg_domain =3D
 > > > > > irq_domain_add_linear(pcie_intc_node,
 > > > > > 4,
-> > > > > +     port->leg_domain =
+> > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0port->leg_domain =3D
 > > > > > irq_domain_add_linear(pcie_intc_node,
 > > > > > 1 +
 > > > > > 4,
-> > > > I don't understand this.  Several drivers call
+> > > > I don't understand this.=C2=A0=C2=A0Several drivers call
 > > > > irq_domain_add_linear() with
 > > > > a size of 4:
-> > > > 
-> > > >   dra7xx_pcie_init_irq_domain
-> > > >   ks_dw_pcie_host_init
-> > > >   advk_pcie_init_irq_domain
-> > > >   faraday_pci_setup_cascaded_irq
-> > > >   rockchip_pcie_init_irq_domain
-> > > >   nwl_pcie_init_irq_domain
-> > > > 
+> > > >=20
+> > > > =C2=A0 dra7xx_pcie_init_irq_domain
+> > > > =C2=A0 ks_dw_pcie_host_init
+> > > > =C2=A0 advk_pcie_init_irq_domain
+> > > > =C2=A0 faraday_pci_setup_cascaded_irq
+> > > > =C2=A0 rockchip_pcie_init_irq_domain
+> > > > =C2=A0 nwl_pcie_init_irq_domain
+> > > >=20
 > > > > Only one other in drivers/pci uses a size of 5:
-> > > > 
-> > > >   altera_pcie_init_irq_domain
-> > > > 
-> > > > Why can't we use a size of 4 for all of them?  We only have
+> > > >=20
+> > > > =C2=A0 altera_pcie_init_irq_domain
+> > > >=20
+> > > > Why can't we use a size of 4 for all of them?=C2=A0=C2=A0We only ha=
+ve
 > > > > INTA-
-> > > > INTD.  Are
+> > > > INTD.=C2=A0=C2=A0Are
 > > > > altera and xilinx missing something to apply an offset from the
 > > > > 0-3
 > > > > space
@@ -155,25 +193,30 @@ On Tue, 2017-06-20 at 09:55 +0800, Ley Foon Tan wrote:
 > > > /2
 > > > 016/
 > > > 8/30/198
-> > Thanks for digging that out.  I knew we'd discussed this before,
+> > Thanks for digging that out.=C2=A0=C2=A0I knew we'd discussed this befo=
+re,
 > > but
 > > I
-> > couldn't find it in the archives.  I don't think anybody was really
+> > couldn't find it in the archives.=C2=A0=C2=A0I don't think anybody was =
+really
 > > satisfied with the outcome, but we accepted it to make forward
 > > progress.
-> > 
-> > > 
-> > > 
+> >=20
+> > >=20
+> > >=20
 > > > This is because legacy interrupt is start with index 1 instead of
 > > > 0.
-> > I'm not buying this.  Your argument was that "the hwirq for legacy
+> > I'm not buying this.=C2=A0=C2=A0Your argument was that "the hwirq for l=
+egacy
 > > interrupts will start at 0x1 to 0x4 (INTA to INTD) and these values
-> > are as per PCIe specification for legacy interrupts.  So these
+> > are as per PCIe specification for legacy interrupts.=C2=A0=C2=A0So thes=
+e
 > > cannot
 > > be numbered from 0."
-> > 
+> >=20
 > > But all the other drivers I mentioned get along with the 0-3 range
-> > somehow.  If there's something different about altera and xilinx
+> > somehow.=C2=A0=C2=A0If there's something different about altera and xil=
+inx
 > > that
 > > means they can't use the same solution the others do, I'd like to
 > > know
@@ -183,9 +226,9 @@ On Tue, 2017-06-20 at 09:55 +0800, Ley Foon Tan wrote:
 > legacy interrupts. We see this error when we enabling multi-function
 > endpoint (4 functions). I believe this is not altera or xilinx
 > specific.
-> 
+>=20
 
-It is broken in dra7xx too.
+It is broken in=C2=A0dra7xx too.
 https://lkml.org/lkml/2016/9/14/241
 
 Regards
diff --git a/a/content_digest b/N1/content_digest
index 02894c8..74c4c82 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -22,21 +22,21 @@
  "b\0"
  "On Tue, 2017-06-20 at 09:55 +0800, Ley Foon Tan wrote:\n"
  "> On Mon, 2017-06-19 at 20:49 -0500, Bjorn Helgaas wrote:\n"
- "> > \n"
+ "> >=20\n"
  "> > [+cc Marc]\n"
- "> > \n"
+ "> >=20\n"
  "> > On Tue, Jun 20, 2017 at 08:38:14AM +0800, Ley Foon Tan wrote:\n"
- "> > > \n"
- "> > > \n"
+ "> > >=20\n"
+ "> > >=20\n"
  "> > > On Mon, 2017-06-19 at 18:47 -0500, Bjorn Helgaas wrote:\n"
- "> > > > \n"
- "> > > > \n"
+ "> > > >=20\n"
+ "> > > >=20\n"
  "> > > > [+cc Thomas, Ley Foon]\n"
- "> > > > \n"
+ "> > > >=20\n"
  "> > > > On Sat, Jun 17, 2017 at 12:57:38PM -0700, Paul Burton wrote:\n"
- "> > > > > \n"
- "> > > > > \n"
- "> > > > > \n"
+ "> > > > >=20\n"
+ "> > > > >=20\n"
+ "> > > > >=20\n"
  "> > > > > The driver expects to use hardware IRQ numbers 1 through 4\n"
  "> > > > > for\n"
  "> > > > > INTX\n"
@@ -45,94 +45,130 @@
  "> > > > > through 3). This results in a warning from\n"
  "> > > > > irq_domain_associate\n"
  "> > > > > when it\n"
- "> > > > > is called with hwirq=4:\n"
- "> > > > > \n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240WARNING: CPU: 0 PID: 1 at kernel/irq/irqdomain.c:365\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240irq_domain_associate+0x170/0x220\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240error: hwirq 0x4 is too large for dummy\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240Modules linked in:\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240CPU: 0 PID: 1 Comm: swapper/0 Tainted: G\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240W\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2404.12.0-rc5-00126-g19e1b3a10aad-dirty #427\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240Stack : 0000000000000000 0000000000000004\n"
+ "> > > > > is called with hwirq=3D4:\n"
+ "> > > > >=20\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0WARNING: CPU: 0 PID: 1 at kernel/ir=\n"
+ "q/irqdomain.c:365\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0irq_domain_=\n"
+ "associate+0x170/0x220\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0error: hwirq 0x4 is too large for d=\n"
+ "ummy\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0Modules linked in:\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0CPU: 0 PID: 1 Comm: swapper/0 Taint=\n"
+ "ed: G=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0W\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A04.12.0-rc5-=\n"
+ "00126-g19e1b3a10aad-dirty #427\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0Stack : 0000000000000000 0000000000=\n"
+ "000004\n"
  "> > > > > 0000000000000006\n"
  "> > > > > ffffffff8092c78a\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2400000000000000061 ffffffff8018bf60\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n"
+ "=A0=C2=A0=C2=A00000000000000061 ffffffff8018bf60\n"
  "> > > > > 0000000000000000\n"
  "> > > > > 0000000000000000\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240ffffffff8088c287 ffffffff80811d18\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n"
+ "=A0=C2=A0=C2=A0ffffffff8088c287 ffffffff80811d18\n"
  "> > > > > a8000000ffc60000\n"
  "> > > > > ffffffff80926678\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2400000000000000001 0000000000000000\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n"
+ "=A0=C2=A0=C2=A00000000000000001 0000000000000000\n"
  "> > > > > ffffffff80887880\n"
  "> > > > > ffffffff80960000\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240ffffffff80920000 ffffffff801e6744\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n"
+ "=A0=C2=A0=C2=A0ffffffff80920000 ffffffff801e6744\n"
  "> > > > > ffffffff80887880\n"
  "> > > > > a8000000ffc4f8f8\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240000000000000089c ffffffff8018d260\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n"
+ "=A0=C2=A0=C2=A0000000000000089c ffffffff8018d260\n"
  "> > > > > 0000000000010000\n"
  "> > > > > ffffffff80811d18\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2400000000000000000 0000000000000001\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n"
+ "=A0=C2=A0=C2=A00000000000000000 0000000000000001\n"
  "> > > > > 0000000000000000\n"
  "> > > > > 0000000000000000\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2400000000000000000 a8000000ffc4f840\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n"
+ "=A0=C2=A0=C2=A00000000000000000 a8000000ffc4f840\n"
  "> > > > > 0000000000000000\n"
  "> > > > > ffffffff8042cf34\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2400000000000000000 0000000000000000\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n"
+ "=A0=C2=A0=C2=A00000000000000000 0000000000000000\n"
  "> > > > > 0000000000000000\n"
  "> > > > > 0000000000040c00\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2400000000000000000 ffffffff8010d1c8\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n"
+ "=A0=C2=A0=C2=A00000000000000000 ffffffff8010d1c8\n"
  "> > > > > 0000000000000000\n"
  "> > > > > ffffffff8042cf34\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240...\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240Call Trace:\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff8010d1c8>] show_stack+0x80/0xa0\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff8042cf34>] dump_stack+0xd4/0x110\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff8013ea98>] __warn+0xf0/0x108\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff8013eb14>] warn_slowpath_fmt+0x3c/0x48\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff80196528>] irq_domain_associate+0x170/0x220\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff80196bf0>] irq_create_mapping+0x88/0x118\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff801976a8>]\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n"
+ "=A0=C2=A0=C2=A0...\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0Call Trace:\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8010d1c8>] show_stack+0x8=\n"
+ "0/0xa0\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8042cf34>] dump_stack+0xd=\n"
+ "4/0x110\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8013ea98>] __warn+0xf0/0x=\n"
+ "108\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8013eb14>] warn_slowpath_=\n"
+ "fmt+0x3c/0x48\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80196528>] irq_domain_ass=\n"
+ "ociate+0x170/0x220\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80196bf0>] irq_create_map=\n"
+ "ping+0x88/0x118\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff801976a8>]\n"
  "> > > > > irq_create_fwspec_mapping+0xb8/0x320\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff80197970>] irq_create_of_mapping+0x60/0x70\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff805d1318>] of_irq_parse_and_map_pci+0x20/0x38\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff8049c210>] pci_fixup_irqs+0x60/0xe0\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff8049cd64>] xilinx_pcie_probe+0x28c/0x478\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff804e8ca8>] platform_drv_probe+0x50/0xd0\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff804e73a4>] driver_probe_device+0x2c4/0x3a0\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff804e7544>] __driver_attach+0xc4/0xd0\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff804e5254>] bus_for_each_dev+0x64/0xa8\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff804e5e40>] bus_add_driver+0x1f0/0x268\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff804e8000>] driver_register+0x68/0x118\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff801001a4>] do_one_initcall+0x4c/0x178\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff808d3ca8>] kernel_init_freeable+0x204/0x2b0\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff80730b68>] kernel_init+0x10/0xf8\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240[<ffffffff80106218>] ret_from_kernel_thread+0x14/0x1c\n"
- "> > > > > \n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80197970>] irq_create_of_=\n"
+ "mapping+0x60/0x70\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff805d1318>] of_irq_parse_a=\n"
+ "nd_map_pci+0x20/0x38\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8049c210>] pci_fixup_irqs=\n"
+ "+0x60/0xe0\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff8049cd64>] xilinx_pcie_pr=\n"
+ "obe+0x28c/0x478\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e8ca8>] platform_drv_p=\n"
+ "robe+0x50/0xd0\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e73a4>] driver_probe_d=\n"
+ "evice+0x2c4/0x3a0\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e7544>] __driver_attac=\n"
+ "h+0xc4/0xd0\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e5254>] bus_for_each_d=\n"
+ "ev+0x64/0xa8\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e5e40>] bus_add_driver=\n"
+ "+0x1f0/0x268\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff804e8000>] driver_registe=\n"
+ "r+0x68/0x118\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff801001a4>] do_one_initcal=\n"
+ "l+0x4c/0x178\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff808d3ca8>] kernel_init_fr=\n"
+ "eeable+0x204/0x2b0\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80730b68>] kernel_init+0x=\n"
+ "10/0xf8\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0[<ffffffff80106218>] ret_from_kerne=\n"
+ "l_thread+0x14/0x1c\n"
+ "> > > > >=20\n"
  "> > > > > This patch avoids that warning by creating the legacy IRQ\n"
  "> > > > > domain\n"
  "> > > > > with\n"
- "> > > > > size 5 rather than 4, allowing it to cover the hwirq=4/INTD\n"
+ "> > > > > size 5 rather than 4, allowing it to cover the hwirq=3D4/INTD\n"
  "> > > > > case.\n"
- "> > > > > \n"
+ "> > > > >=20\n"
  "> > > > > Signed-off-by: Paul Burton <paul.burton@imgtec.com>\n"
  "> > > > > Cc: Bharat Kumar Gogada <bharatku@xilinx.com>\n"
  "> > > > > Cc: Bjorn Helgaas <bhelgaas@google.com>\n"
  "> > > > > Cc: Michal Simek <michal.simek@xilinx.com>\n"
  "> > > > > Cc: Ravikiran Gummaluri <rgummal@xilinx.com>\n"
  "> > > > > Cc: linux-pci@vger.kernel.org\n"
- "> > > > > \n"
+ "> > > > >=20\n"
  "> > > > > ---\n"
- "> > > > > \n"
+ "> > > > >=20\n"
  "> > > > > Changes in v5:\n"
  "> > > > > - New patch; replacing \"PCI: xilinx: Fix INTX irq dispatch\".\n"
- "> > > > > \n"
+ "> > > > >=20\n"
  "> > > > > Changes in v4: None\n"
  "> > > > > Changes in v3: None\n"
  "> > > > > Changes in v2: None\n"
- "> > > > > \n"
- "> > > > > \302\240drivers/pci/host/pcie-xilinx.c | 2 +-\n"
- "> > > > > \302\2401 file changed, 1 insertion(+), 1 deletion(-)\n"
- "> > > > > \n"
+ "> > > > >=20\n"
+ "> > > > > =C2=A0drivers/pci/host/pcie-xilinx.c | 2 +-\n"
+ "> > > > > =C2=A01 file changed, 1 insertion(+), 1 deletion(-)\n"
+ "> > > > >=20\n"
  "> > > > > diff --git a/drivers/pci/host/pcie-xilinx.c\n"
  "> > > > > b/drivers/pci/host/pcie-xilinx.c\n"
  "> > > > > index 2fe2df51f9f8..94c71fb91648 100644\n"
@@ -141,34 +177,36 @@
  "> > > > > @@ -524,7 +524,7 @@ static int\n"
  "> > > > > xilinx_pcie_init_irq_domain(struct\n"
  "> > > > > xilinx_pcie_port *port)\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240return -ENODEV;\n"
- "> > > > > \302\240\302\240\302\240\302\240\302\240\302\240}\n"
- "> > > > > \n"
- "> > > > > -\302\240\302\240\302\240\302\240\302\240port->leg_domain =\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n"
+ "=A0=C2=A0=C2=A0=C2=A0return -ENODEV;\n"
+ "> > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0}\n"
+ "> > > > >=20\n"
+ "> > > > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0port->leg_domain =3D\n"
  "> > > > > irq_domain_add_linear(pcie_intc_node,\n"
  "> > > > > 4,\n"
- "> > > > > +\302\240\302\240\302\240\302\240\302\240port->leg_domain =\n"
+ "> > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0port->leg_domain =3D\n"
  "> > > > > irq_domain_add_linear(pcie_intc_node,\n"
  "> > > > > 1 +\n"
  "> > > > > 4,\n"
- "> > > > I don't understand this.\302\240\302\240Several drivers call\n"
+ "> > > > I don't understand this.=C2=A0=C2=A0Several drivers call\n"
  "> > > > irq_domain_add_linear() with\n"
  "> > > > a size of 4:\n"
- "> > > > \n"
- "> > > > \302\240 dra7xx_pcie_init_irq_domain\n"
- "> > > > \302\240 ks_dw_pcie_host_init\n"
- "> > > > \302\240 advk_pcie_init_irq_domain\n"
- "> > > > \302\240 faraday_pci_setup_cascaded_irq\n"
- "> > > > \302\240 rockchip_pcie_init_irq_domain\n"
- "> > > > \302\240 nwl_pcie_init_irq_domain\n"
- "> > > > \n"
+ "> > > >=20\n"
+ "> > > > =C2=A0 dra7xx_pcie_init_irq_domain\n"
+ "> > > > =C2=A0 ks_dw_pcie_host_init\n"
+ "> > > > =C2=A0 advk_pcie_init_irq_domain\n"
+ "> > > > =C2=A0 faraday_pci_setup_cascaded_irq\n"
+ "> > > > =C2=A0 rockchip_pcie_init_irq_domain\n"
+ "> > > > =C2=A0 nwl_pcie_init_irq_domain\n"
+ "> > > >=20\n"
  "> > > > Only one other in drivers/pci uses a size of 5:\n"
- "> > > > \n"
- "> > > > \302\240 altera_pcie_init_irq_domain\n"
- "> > > > \n"
- "> > > > Why can't we use a size of 4 for all of them?\302\240\302\240We only have\n"
+ "> > > >=20\n"
+ "> > > > =C2=A0 altera_pcie_init_irq_domain\n"
+ "> > > >=20\n"
+ "> > > > Why can't we use a size of 4 for all of them?=C2=A0=C2=A0We only ha=\n"
+ "ve\n"
  "> > > > INTA-\n"
- "> > > > INTD.\302\240\302\240Are\n"
+ "> > > > INTD.=C2=A0=C2=A0Are\n"
  "> > > > altera and xilinx missing something to apply an offset from the\n"
  "> > > > 0-3\n"
  "> > > > space\n"
@@ -177,25 +215,30 @@
  "> > > /2\n"
  "> > > 016/\n"
  "> > > 8/30/198\n"
- "> > Thanks for digging that out.\302\240\302\240I knew we'd discussed this before,\n"
+ "> > Thanks for digging that out.=C2=A0=C2=A0I knew we'd discussed this befo=\n"
+ "re,\n"
  "> > but\n"
  "> > I\n"
- "> > couldn't find it in the archives.\302\240\302\240I don't think anybody was really\n"
+ "> > couldn't find it in the archives.=C2=A0=C2=A0I don't think anybody was =\n"
+ "really\n"
  "> > satisfied with the outcome, but we accepted it to make forward\n"
  "> > progress.\n"
- "> > \n"
- "> > > \n"
- "> > > \n"
+ "> >=20\n"
+ "> > >=20\n"
+ "> > >=20\n"
  "> > > This is because legacy interrupt is start with index 1 instead of\n"
  "> > > 0.\n"
- "> > I'm not buying this.\302\240\302\240Your argument was that \"the hwirq for legacy\n"
+ "> > I'm not buying this.=C2=A0=C2=A0Your argument was that \"the hwirq for l=\n"
+ "egacy\n"
  "> > interrupts will start at 0x1 to 0x4 (INTA to INTD) and these values\n"
- "> > are as per PCIe specification for legacy interrupts.\302\240\302\240So these\n"
+ "> > are as per PCIe specification for legacy interrupts.=C2=A0=C2=A0So thes=\n"
+ "e\n"
  "> > cannot\n"
  "> > be numbered from 0.\"\n"
- "> > \n"
+ "> >=20\n"
  "> > But all the other drivers I mentioned get along with the 0-3 range\n"
- "> > somehow.\302\240\302\240If there's something different about altera and xilinx\n"
+ "> > somehow.=C2=A0=C2=A0If there's something different about altera and xil=\n"
+ "inx\n"
  "> > that\n"
  "> > means they can't use the same solution the others do, I'd like to\n"
  "> > know\n"
@@ -205,12 +248,12 @@
  "> legacy interrupts. We see this error when we enabling multi-function\n"
  "> endpoint (4 functions). I believe this is not altera or xilinx\n"
  "> specific.\n"
- "> \n"
+ ">=20\n"
  "\n"
- "It is broken in\302\240dra7xx too.\n"
+ "It is broken in=C2=A0dra7xx too.\n"
  "https://lkml.org/lkml/2016/9/14/241\n"
  "\n"
  "Regards\n"
  Ley Foon
 
-7a85a7709d1ff1db7aa0a70779d2d49e06b3019dddb6114ffe5fa0b40ee17582
+851cbc4764d3e215f358a2adaf0cce4875c5a7294ec961cd7b50efca84e697bd

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