From mboxrd@z Thu Jan 1 00:00:00 1970 From: Bibby Hsieh Subject: Re: [v2] drm: mediatek: change the variable type of rdma threshold Date: Thu, 22 Jun 2017 10:25:21 +0800 Message-ID: <1498098321.717.17.camel@mtksdaap41> References: <1495187843-6882-1-git-send-email-bibby.hsieh@mediatek.com> <20170621211456.GA21176@roeck-us.net> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20170621211456.GA21176@roeck-us.net> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Guenter Roeck Cc: Sascha Hauer , Daniel Vetter , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Cawa Cheng , Thierry Reding , linux-mediatek@lists.infradead.org, Matthias Brugger , Yingjoe Chen , Mao Huang , linux-arm-kernel@lists.infradead.org List-Id: linux-mediatek@lists.infradead.org SGksIEd1ZW50ZXIsCgpUaGFua3MgZm9yIHlvdXIgdGVzdCBhbmQgY29tbWVudC4KCgpPbiBXZWQs IDIwMTctMDYtMjEgYXQgMTQ6MTQgLTA3MDAsIEd1ZW50ZXIgUm9lY2sgd3JvdGU6Cj4gT24gRnJp LCBNYXkgMTksIDIwMTcgYXQgMDU6NTc6MjNQTSArMDgwMCwgQmliYnkgSHNpZWggd3JvdGU6Cj4g PiBGb3Igc29tZSBncmVhdGVyIHJlc29sdXRpb24sIHRoZSByZG1hIHRocmVzaG9sZAo+ID4gdmFy aWFibGUgd2lsbCBvdmVyZmxvdy4KPiA+IAo+ID4gU2lnbmVkLW9mZi1ieTogQmliYnkgSHNpZWgg PGJpYmJ5LmhzaWVoQG1lZGlhdGVrLmNvbT4KPiA+IC0tLQo+ID4gIGRyaXZlcnMvZ3B1L2RybS9t ZWRpYXRlay9tdGtfZGlzcF9yZG1hLmMgfCA3ICsrKystLS0KPiA+ICAxIGZpbGUgY2hhbmdlZCwg NCBpbnNlcnRpb25zKCspLCAzIGRlbGV0aW9ucygtKQo+ID4gCj4gPiBkaWZmIC0tZ2l0IGEvZHJp dmVycy9ncHUvZHJtL21lZGlhdGVrL210a19kaXNwX3JkbWEuYyBiL2RyaXZlcnMvZ3B1L2RybS9t ZWRpYXRlay9tdGtfZGlzcF9yZG1hLmMKPiA+IGluZGV4IDBkZjA1ZjkuLjlhZmRjZDcgMTAwNjQ0 Cj4gPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vbWVkaWF0ZWsvbXRrX2Rpc3BfcmRtYS5jCj4gPiAr KysgYi9kcml2ZXJzL2dwdS9kcm0vbWVkaWF0ZWsvbXRrX2Rpc3BfcmRtYS5jCj4gPiBAQCAtMzcs NyArMzcsNyBAQAo+ID4gICNkZWZpbmUgRElTUF9SRUdfUkRNQV9GSUZPX0NPTgkJCTB4MDA0MAo+ ID4gICNkZWZpbmUgUkRNQV9GSUZPX1VOREVSRkxPV19FTgkJCQlCSVQoMzEpCj4gPiAgI2RlZmlu ZSBSRE1BX0ZJRk9fUFNFVURPX1NJWkUoYnl0ZXMpCQkJKCgoYnl0ZXMpIC8gMTYpIDw8IDE2KQo+ ID4gLSNkZWZpbmUgUkRNQV9PVVRQVVRfVkFMSURfRklGT19USFJFU0hPTEQoYnl0ZXMpCQkoKGJ5 dGVzKSAvIDE2KQo+ID4gKyNkZWZpbmUgUkRNQV9PVVRQVVRfVkFMSURfRklGT19USFJFU0hPTEQo Ynl0ZXMpICgoKGJ5dGVzKSAvIDE2KSAmIDB4M2ZmKQo+IAo+IEkgYWdyZWUgd2l0aCB0aGUgZWFy bGllciBjb21tZW50OyBjbGFtcF92YWwoKSBtaWdodCBiZSBtb3JlIGFwcHJvcHJpYXRlIGhlcmUK PiBhbmQgd291bGQgYXZvaWQgdW5leHBlY3RlZCByZXN1bHRzLgo+IAoKWWVwLCBJdCdzIGEgZ29v ZCBzdWdnZXN0aW9uIHRvIG1lLCBJIHdpbGwgYWRkIGNsYW1wX3ZhbCgpIHRvIGF2b2lkCnVuZXhw ZWN0ZWQgdmFsdWUsIHRoYW5rcy4KCj4gPiAgCj4gPiAgLyoqCj4gPiAgICogc3RydWN0IG10a19k aXNwX3JkbWEgLSBESVNQX1JETUEgZHJpdmVyIHN0cnVjdHVyZQo+ID4gQEAgLTEwOSw3ICsxMDks NyBAQCBzdGF0aWMgdm9pZCBtdGtfcmRtYV9jb25maWcoc3RydWN0IG10a19kZHBfY29tcCAqY29t cCwgdW5zaWduZWQgaW50IHdpZHRoLAo+ID4gIAkJCSAgICB1bnNpZ25lZCBpbnQgaGVpZ2h0LCB1 bnNpZ25lZCBpbnQgdnJlZnJlc2gsCj4gPiAgCQkJICAgIHVuc2lnbmVkIGludCBicGMpCj4gPiAg ewo+ID4gLQl1bnNpZ25lZCBpbnQgdGhyZXNob2xkOwo+ID4gKwl1bnNpZ25lZCBsb25nIGxvbmcg dGhyZXNob2xkOwo+ID4gIAl1bnNpZ25lZCBpbnQgcmVnOwo+ID4gIAo+ID4gIAlyZG1hX3VwZGF0 ZV9iaXRzKGNvbXAsIERJU1BfUkVHX1JETUFfU0laRV9DT05fMCwgMHhmZmYsIHdpZHRoKTsKPiA+ IEBAIC0xMjEsNyArMTIxLDggQEAgc3RhdGljIHZvaWQgbXRrX3JkbWFfY29uZmlnKHN0cnVjdCBt dGtfZGRwX2NvbXAgKmNvbXAsIHVuc2lnbmVkIGludCB3aWR0aCwKPiA+ICAJICogb3V0cHV0IHRo cmVzaG9sZCB0byA2IG1pY3Jvc2Vjb25kcyB3aXRoIDcvNiBvdmVyaGVhZCB0bwo+ID4gIAkgKiBh Y2NvdW50IGZvciBibGFua2luZywgYW5kIHdpdGggYSBwaXhlbCBkZXB0aCBvZiA0IGJ5dGVzOgo+ ID4gIAkgKi8KPiA+IC0JdGhyZXNob2xkID0gd2lkdGggKiBoZWlnaHQgKiB2cmVmcmVzaCAqIDQg KiA3IC8gMTAwMDAwMDsKPiA+ICsJdGhyZXNob2xkID0gKHVuc2lnbmVkIGxvbmcgbG9uZyl3aWR0 aCAqIGhlaWdodCAqIHZyZWZyZXNoICoKPiA+ICsJCSAgICA0ICogNyAvIDEwMDAwMDA7Cj4gCj4g VGhpcyBpcyBhIDY0IGJpdCBkaXZpZGUgb3BlcmF0aW9uLiBJdCB3aWxsIHJlc3VsdCBpbiBhIGJ1 aWxkIGZhaWx1cmUKPiBpZiBjb21waWxlZCBmb3IgYSAzMiBiaXQga2VybmVsIChlZyBhcm06YWxs bW9kY29uZmlnKS4KPiAKPiBFUlJPUjogIl9fYWVhYmlfdWxkaXZtb2QiIFtkcml2ZXJzL2dwdS9k cm0vbWVkaWF0ZWsvbWVkaWF0ZWstZHJtLmtvXSB1bmRlZmluZWQhCj4gCgpTb3JyeSBhYm91dCB0 aGUgbGFjayBvZiB0ZXN0cywgSSB3aWxsIGNoYW5nZSB0aGUgZGl2aWRlIG9wZXJhdGlvbiB0bwpk aXZfdTY0IGZ1bmN0aW9uLCB0aGFua3MgZm9yIHlvdXIgc3VnZ2VzdGlvbnMuCgoKPiBHdWVudGVy CgotLSAKQmliYnkKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fCmRyaS1kZXZlbCBtYWlsaW5nIGxpc3QKZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9y ZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2RyaS1kZXZl bAo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: bibby.hsieh@mediatek.com (Bibby Hsieh) Date: Thu, 22 Jun 2017 10:25:21 +0800 Subject: [v2] drm: mediatek: change the variable type of rdma threshold In-Reply-To: <20170621211456.GA21176@roeck-us.net> References: <1495187843-6882-1-git-send-email-bibby.hsieh@mediatek.com> <20170621211456.GA21176@roeck-us.net> Message-ID: <1498098321.717.17.camel@mtksdaap41> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi, Guenter, Thanks for your test and comment. On Wed, 2017-06-21 at 14:14 -0700, Guenter Roeck wrote: > On Fri, May 19, 2017 at 05:57:23PM +0800, Bibby Hsieh wrote: > > For some greater resolution, the rdma threshold > > variable will overflow. > > > > Signed-off-by: Bibby Hsieh > > --- > > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 7 ++++--- > > 1 file changed, 4 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > index 0df05f9..9afdcd7 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > @@ -37,7 +37,7 @@ > > #define DISP_REG_RDMA_FIFO_CON 0x0040 > > #define RDMA_FIFO_UNDERFLOW_EN BIT(31) > > #define RDMA_FIFO_PSEUDO_SIZE(bytes) (((bytes) / 16) << 16) > > -#define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes) ((bytes) / 16) > > +#define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes) (((bytes) / 16) & 0x3ff) > > I agree with the earlier comment; clamp_val() might be more appropriate here > and would avoid unexpected results. > Yep, It's a good suggestion to me, I will add clamp_val() to avoid unexpected value, thanks. > > > > /** > > * struct mtk_disp_rdma - DISP_RDMA driver structure > > @@ -109,7 +109,7 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, > > unsigned int height, unsigned int vrefresh, > > unsigned int bpc) > > { > > - unsigned int threshold; > > + unsigned long long threshold; > > unsigned int reg; > > > > rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, 0xfff, width); > > @@ -121,7 +121,8 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, > > * output threshold to 6 microseconds with 7/6 overhead to > > * account for blanking, and with a pixel depth of 4 bytes: > > */ > > - threshold = width * height * vrefresh * 4 * 7 / 1000000; > > + threshold = (unsigned long long)width * height * vrefresh * > > + 4 * 7 / 1000000; > > This is a 64 bit divide operation. It will result in a build failure > if compiled for a 32 bit kernel (eg arm:allmodconfig). > > ERROR: "__aeabi_uldivmod" [drivers/gpu/drm/mediatek/mediatek-drm.ko] undefined! > Sorry about the lack of tests, I will change the divide operation to div_u64 function, thanks for your suggestions. > Guenter -- Bibby From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752192AbdFVCZ2 (ORCPT ); Wed, 21 Jun 2017 22:25:28 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:17057 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751900AbdFVCZ1 (ORCPT ); Wed, 21 Jun 2017 22:25:27 -0400 Message-ID: <1498098321.717.17.camel@mtksdaap41> Subject: Re: [v2] drm: mediatek: change the variable type of rdma threshold From: Bibby Hsieh To: Guenter Roeck CC: David Airlie , Matthias Brugger , Daniel Vetter , , , , Cawa Cheng , "Mao Huang" , CK Hu , Thierry Reding , Philipp Zabel , YT Shen , Yingjoe Chen , "Sascha Hauer" , Date: Thu, 22 Jun 2017 10:25:21 +0800 In-Reply-To: <20170621211456.GA21176@roeck-us.net> References: <1495187843-6882-1-git-send-email-bibby.hsieh@mediatek.com> <20170621211456.GA21176@roeck-us.net> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, Guenter, Thanks for your test and comment. On Wed, 2017-06-21 at 14:14 -0700, Guenter Roeck wrote: > On Fri, May 19, 2017 at 05:57:23PM +0800, Bibby Hsieh wrote: > > For some greater resolution, the rdma threshold > > variable will overflow. > > > > Signed-off-by: Bibby Hsieh > > --- > > drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 7 ++++--- > > 1 file changed, 4 insertions(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > index 0df05f9..9afdcd7 100644 > > --- a/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > +++ b/drivers/gpu/drm/mediatek/mtk_disp_rdma.c > > @@ -37,7 +37,7 @@ > > #define DISP_REG_RDMA_FIFO_CON 0x0040 > > #define RDMA_FIFO_UNDERFLOW_EN BIT(31) > > #define RDMA_FIFO_PSEUDO_SIZE(bytes) (((bytes) / 16) << 16) > > -#define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes) ((bytes) / 16) > > +#define RDMA_OUTPUT_VALID_FIFO_THRESHOLD(bytes) (((bytes) / 16) & 0x3ff) > > I agree with the earlier comment; clamp_val() might be more appropriate here > and would avoid unexpected results. > Yep, It's a good suggestion to me, I will add clamp_val() to avoid unexpected value, thanks. > > > > /** > > * struct mtk_disp_rdma - DISP_RDMA driver structure > > @@ -109,7 +109,7 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, > > unsigned int height, unsigned int vrefresh, > > unsigned int bpc) > > { > > - unsigned int threshold; > > + unsigned long long threshold; > > unsigned int reg; > > > > rdma_update_bits(comp, DISP_REG_RDMA_SIZE_CON_0, 0xfff, width); > > @@ -121,7 +121,8 @@ static void mtk_rdma_config(struct mtk_ddp_comp *comp, unsigned int width, > > * output threshold to 6 microseconds with 7/6 overhead to > > * account for blanking, and with a pixel depth of 4 bytes: > > */ > > - threshold = width * height * vrefresh * 4 * 7 / 1000000; > > + threshold = (unsigned long long)width * height * vrefresh * > > + 4 * 7 / 1000000; > > This is a 64 bit divide operation. It will result in a build failure > if compiled for a 32 bit kernel (eg arm:allmodconfig). > > ERROR: "__aeabi_uldivmod" [drivers/gpu/drm/mediatek/mediatek-drm.ko] undefined! > Sorry about the lack of tests, I will change the divide operation to div_u64 function, thanks for your suggestions. > Guenter -- Bibby