All of lore.kernel.org
 help / color / mirror / Atom feed
From: Huacai Chen <chenhc@lemote.com>
To: Ralf Baechle <ralf@linux-mips.org>
Cc: John Crispin <john@phrozen.org>,
	"Steven J . Hill" <Steven.Hill@cavium.com>,
	linux-mips@linux-mips.org, Fuxin Zhang <zhangfx@lemote.com>,
	Zhangjin Wu <wuzhangjin@gmail.com>,
	Huacai Chen <chenhc@lemote.com>
Subject: [PATCH V7 0/9] MIPS: Loongson: feature and performance improvements
Date: Thu, 22 Jun 2017 23:06:47 +0800	[thread overview]
Message-ID: <1498144016-9111-1-git-send-email-chenhc@lemote.com> (raw)

This patchset is is prepared for the next 4.13 release for Linux/MIPS.
It adds Loongson-3A R3 and Loongson's NMI handler support, adds a
"model name" knob in /proc/cpuinfo which is needed by some userspace
tools, improves I/O performance by IRQ balancing and IRQ affinity
setting, fixes indexed scache flushing for Loongson-3, and introduces
LOONGSON_LLSC_WAR to improve stability.

V1 -> V2:
1, Add Loongson-3A R3 basic support.
2, Sync the code to upstream.

V2 -> V3:
1, Add r4k_blast_scache_node for Loongson-3.
2, Update the last patch to avoid miscompilation.
3, Sync the code to upstream.

V3 -> V4:
1, Support 4 packages in CPU Hwmon driver.
2, ICT is dropped in cpu name, and cpu name can be overwritten by BIOS.
3, Sync the code to upstream.

V4 -> V5:
1, Drop some #ifdefs in the 2nd patch.
2, Improve maintainability of the 4th patch.
3, Sync the code to upstream.

V5 -> V6:
1, Update commit message in the 2nd patch.
2, Drop #ifdefs and set irq_set_affinity() at runtime in the 6th patch.
3, Sync the code to upstream.

V6 -> V7:
1, Fix bnez/beqz mistake in the last patch.
2, Sync the code to upstream.

Huacai Chen(9):
 MIPS: Loongson: Add Loongson-3A R3 basic support.
 MIPS: c-r4k: Add r4k_blast_scache_node for Loongson-3.
 MIPS: Loongson: Add NMI handler support.
 MIPS: Loongson-3: Support 4 packages in CPU Hwmon driver.
 MIPS: Loongson-3: IRQ balancing for PCI devices.
 MIPS: Loongson-3: support irq_set_affinity() in i8259 chip.
 MIPS: Loogson: Make enum loongson_cpu_type more clear.
 MIPS: Add __cpu_full_name[] to make CPU names more human-readable.
 MIPS: Loongson: Introduce and use LOONGSON_LLSC_WAR.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
---
 arch/mips/include/asm/atomic.h                     | 107 ++++++++
 arch/mips/include/asm/bitops.h                     | 273 ++++++++++++++++-----
 arch/mips/include/asm/cmpxchg.h                    |  54 ++++
 arch/mips/include/asm/cpu-info.h                   |   2 +
 arch/mips/include/asm/cpu.h                        |   1 +
 arch/mips/include/asm/edac.h                       |  33 ++-
 arch/mips/include/asm/futex.h                      |  62 +++++
 arch/mips/include/asm/irq.h                        |   3 +
 arch/mips/include/asm/local.h                      |  34 +++
 arch/mips/include/asm/mach-cavium-octeon/war.h     |   1 +
 arch/mips/include/asm/mach-generic/war.h           |   1 +
 arch/mips/include/asm/mach-ip22/war.h              |   1 +
 arch/mips/include/asm/mach-ip27/war.h              |   1 +
 arch/mips/include/asm/mach-ip28/war.h              |   1 +
 arch/mips/include/asm/mach-ip32/war.h              |   1 +
 arch/mips/include/asm/mach-loongson64/boot_param.h |  23 +-
 arch/mips/include/asm/mach-loongson64/war.h        |  26 ++
 arch/mips/include/asm/mach-malta/war.h             |   1 +
 arch/mips/include/asm/mach-pmcs-msp71xx/war.h      |   1 +
 arch/mips/include/asm/mach-rc32434/war.h           |   1 +
 arch/mips/include/asm/mach-rm/war.h                |   1 +
 arch/mips/include/asm/mach-sibyte/war.h            |   1 +
 arch/mips/include/asm/mach-tx49xx/war.h            |   1 +
 arch/mips/include/asm/pgtable.h                    |  19 ++
 arch/mips/include/asm/r4kcache.h                   |  30 +++
 arch/mips/include/asm/spinlock.h                   | 142 +++++++++++
 arch/mips/include/asm/war.h                        |   8 +
 arch/mips/kernel/cpu-probe.c                       |  29 ++-
 arch/mips/kernel/proc.c                            |   4 +
 arch/mips/kernel/syscall.c                         |  34 +++
 arch/mips/loongson64/Platform                      |   3 +
 arch/mips/loongson64/common/env.c                  |  30 ++-
 arch/mips/loongson64/common/init.c                 |  13 +
 arch/mips/loongson64/loongson-3/irq.c              |  53 +++-
 arch/mips/loongson64/loongson-3/smp.c              |  23 +-
 arch/mips/mm/c-r4k.c                               |  42 +++-
 arch/mips/mm/tlbex.c                               |  17 ++
 drivers/irqchip/irq-i8259.c                        |   3 +
 drivers/platform/mips/cpu_hwmon.c                  | 136 +++++-----
 39 files changed, 1059 insertions(+), 157 deletions(-)
 create mode 100644 arch/mips/include/asm/mach-loongson64/war.h
--
2.7.0

             reply	other threads:[~2017-06-22 15:06 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-22 15:06 Huacai Chen [this message]
2017-06-22 15:06 ` [PATCH V7 1/9] MIPS: Loongson: Add Loongson-3A R3 basic support Huacai Chen
2017-06-22 15:06 ` [PATCH V7 2/9] MIPS: c-r4k: Add r4k_blast_scache_node for Loongson-3 Huacai Chen
2017-06-28 14:30   ` James Hogan
2017-06-28 14:30     ` James Hogan
2017-06-29  1:33     ` Huacai Chen
2017-06-29  5:46       ` James Hogan
2017-06-29  5:46         ` James Hogan
2017-06-29 10:07         ` Huacai Chen
2017-06-29 10:23         ` Joshua Kinard
2017-06-30  7:03           ` Huacai Chen
2017-06-22 15:06 ` [PATCH V7 3/9] MIPS: Loongson: Add NMI handler support Huacai Chen
2017-06-22 15:06 ` [PATCH V7 4/9] MIPS: Loongson-3: Support 4 packages in CPU Hwmon driver Huacai Chen
2017-06-22 15:06 ` [PATCH V7 5/9] MIPS: Loongson-3: IRQ balancing for PCI devices Huacai Chen
2017-06-22 15:06 ` [PATCH V7 6/9] MIPS: Loongson-3: support irq_set_affinity() in i8259 chip Huacai Chen
2017-06-22 15:06 ` [PATCH V7 7/9] MIPS: Loogson: Make enum loongson_cpu_type more clear Huacai Chen
2017-06-22 15:06 ` [PATCH V7 8/9] MIPS: Add __cpu_full_name[] to make CPU names more human-readable Huacai Chen
2017-06-23 15:15   ` James Hogan
2017-06-23 15:15     ` James Hogan
2017-06-23 17:11     ` Ralf Baechle
2017-06-24  8:50       ` Huacai Chen
2017-06-22 15:06 ` [PATCH V7 9/9] MIPS: Loongson: Introduce and use LOONGSON_LLSC_WAR Huacai Chen
2017-06-23 14:54   ` James Hogan
2017-06-23 14:54     ` James Hogan
2017-06-24  8:55     ` Huacai Chen
2017-06-24  9:02       ` James Hogan
2017-06-24  9:02         ` James Hogan
2017-06-24  9:23         ` Huacai Chen
2017-06-26  8:26           ` James Hogan
2017-06-26  9:38             ` Huacai Chen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1498144016-9111-1-git-send-email-chenhc@lemote.com \
    --to=chenhc@lemote.com \
    --cc=Steven.Hill@cavium.com \
    --cc=john@phrozen.org \
    --cc=linux-mips@linux-mips.org \
    --cc=ralf@linux-mips.org \
    --cc=wuzhangjin@gmail.com \
    --cc=zhangfx@lemote.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.