From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: Carlo Caione <carlo@caione.org>,
mturquette@baylibre.com, linux-clk@vger.kernel.org,
dvhart@infradead.org, pierre-louis.bossart@linux.intel.com,
sboyd@codeaurora.org, linux@endlessm.com, eballetbo@gmail.com
Cc: Carlo Caione <carlo@endlessm.com>
Subject: Re: [PATCH v2] clk: x86: Do not gate clocks enabled by the firmware
Date: Thu, 13 Jul 2017 13:06:14 +0300 [thread overview]
Message-ID: <1499940374.22624.370.camel@linux.intel.com> (raw)
In-Reply-To: <20170713094213.2775-1-carlo@caione.org>
On Thu, 2017-07-13 at 11:42 +0200, Carlo Caione wrote:
> From: Carlo Caione <carlo@endlessm.com>
>
> Read the enable register to determine if the clock is already in use
> by
> the firmware. In this case avoid gating the clock.
>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
I suppose it should go via clock tree.
> Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> Signed-off-by: Carlo Caione <carlo@endlessm.com>
> ---
> drivers/clk/x86/clk-pmc-atom.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/clk/x86/clk-pmc-atom.c b/drivers/clk/x86/clk-pmc-
> atom.c
> index 2b60577703ef..3c73d2e564ca 100644
> --- a/drivers/clk/x86/clk-pmc-atom.c
> +++ b/drivers/clk/x86/clk-pmc-atom.c
> @@ -185,6 +185,13 @@ static struct clk_plt *plt_clk_register(struct
> platform_device *pdev, int id,
> pclk->reg = base + PMC_CLK_CTL_OFFSET + id *
> PMC_CLK_CTL_SIZE;
> spin_lock_init(&pclk->lock);
>
> + /*
> + * If the clock was already enabled by the firmware mark is a
> critical
> + * to avoid it being gated by the clock framework if no
> driver owns it
> + */
> + if (plt_clk_is_enabled(&pclk->hw))
> + init.flags |= CLK_IS_CRITICAL;
> +
> ret = devm_clk_hw_register(&pdev->dev, &pclk->hw);
> if (ret) {
> pclk = ERR_PTR(ret);
--
Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Intel Finland Oy
next prev parent reply other threads:[~2017-07-13 10:06 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-13 9:42 [PATCH v2] clk: x86: Do not gate clocks enabled by the firmware Carlo Caione
2017-07-13 10:06 ` Andy Shevchenko [this message]
2017-07-13 15:54 ` Darren Hart
2017-07-14 8:19 ` Carlo Caione
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1499940374.22624.370.camel@linux.intel.com \
--to=andriy.shevchenko@linux.intel.com \
--cc=carlo@caione.org \
--cc=carlo@endlessm.com \
--cc=dvhart@infradead.org \
--cc=eballetbo@gmail.com \
--cc=linux-clk@vger.kernel.org \
--cc=linux@endlessm.com \
--cc=mturquette@baylibre.com \
--cc=pierre-louis.bossart@linux.intel.com \
--cc=sboyd@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.