Re: Coupled clk/reset

[Benjamin Herrenschmidt <benh@kernel.crashing.org>]

On Tue, 2017-07-18 at 16:06 +0200, Philipp Zabel wrote:
> If this is some special treatment for a single IP block, I'd just open
> code this in the driver:
>         reset_control_assert(rstc);
>         usleep_range(100, 200);
>         clk_prepare_enable(clk);
>         usleep_range(10000, 20000);
>         reset_control_deassert(rstc);
> 
> If this is a common pattern needed for multiple clocks, you could
> investigate hiding this in the clock driver and not export the resets to
> the 'engine' driver at all.

Right, it's a common pattern for all the IP blocks in that SoC. I agree
with your proposal, it would keep things simpler.

Cheers,
Ben.