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From: <gregkh@linuxfoundation.org>
To: macro@imgtec.com, gregkh@linuxfoundation.org,
	james.hogan@imgtec.com, ralf@linux-mips.org
Cc: <stable@vger.kernel.org>, <stable-commits@vger.kernel.org>
Subject: Patch "MIPS: Actually decode JALX in `__compute_return_epc_for_insn'" has been added to the 4.4-stable tree
Date: Mon, 24 Jul 2017 21:25:02 -0700	[thread overview]
Message-ID: <150095670236193@kroah.com> (raw)


This is a note to let you know that I've just added the patch titled

    MIPS: Actually decode JALX in `__compute_return_epc_for_insn'

to the 4.4-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     mips-actually-decode-jalx-in-__compute_return_epc_for_insn.patch
and it can be found in the queue-4.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


>From a9db101b735a9d49295326ae41f610f6da62b08c Mon Sep 17 00:00:00 2001
From: "Maciej W. Rozycki" <macro@imgtec.com>
Date: Fri, 16 Jun 2017 00:06:19 +0100
Subject: MIPS: Actually decode JALX in `__compute_return_epc_for_insn'

From: Maciej W. Rozycki <macro@imgtec.com>

commit a9db101b735a9d49295326ae41f610f6da62b08c upstream.

Complement commit fb6883e5809c ("MIPS: microMIPS: Support handling of
delay slots.") and actually decode the regular MIPS JALX major
instruction opcode, the handling of which has been added with the said
commit for EPC calculation in `__compute_return_epc_for_insn'.

Fixes: fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.")
Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16394/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 arch/mips/kernel/branch.c |    1 +
 1 file changed, 1 insertion(+)

--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -556,6 +556,7 @@ int __compute_return_epc_for_insn(struct
 	/*
 	 * These are unconditional and in j_format.
 	 */
+	case jalx_op:
 	case jal_op:
 		regs->regs[31] = regs->cp0_epc + 8;
 	case j_op:


Patches currently in stable-queue which might be from macro@imgtec.com are

queue-4.4/mips-send-sigill-for-bposge32-in-__compute_return_epc_for_insn.patch
queue-4.4/mips-actually-decode-jalx-in-__compute_return_epc_for_insn.patch
queue-4.4/mips-fix-a-typo-s-preset-present-in-r2-to-r6-emulation-error-message.patch
queue-4.4/mips-fix-unaligned-pc-interpretation-in-compute_return_epc.patch
queue-4.4/mips-rename-sigill_r6-to-sigill_r2r6-in-__compute_return_epc_for_insn.patch
queue-4.4/mips-send-sigill-for-linked-branches-in-__compute_return_epc_for_insn.patch
queue-4.4/mips-math-emu-prevent-wrong-isa-mode-instruction-emulation.patch

                 reply	other threads:[~2017-07-25  4:25 UTC|newest]

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