From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Ong, Hean Loong" Subject: Re: [PATCHv4 3/3] DRM:ivip Intel FPGA Video and Image Processing Suite Date: Wed, 2 Aug 2017 02:28:23 +0000 Message-ID: <1501640901.3757.3.camel@intel.com> References: <1501554694-3378-1-git-send-email-hean.loong.ong@intel.com> <1501554694-3378-4-git-send-email-hean.loong.ong@intel.com> <2323445.Hdzqrs3Ziv@avalon> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <2323445.Hdzqrs3Ziv@avalon> Content-Language: en-US Content-ID: <9AE5F7210DF5F54BBC7314A92976C648@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: "dri-devel@lists.freedesktop.org" , "laurent.pinchart@ideasonboard.com" Cc: "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "dinguyen@kernel.org" , "robh+dt@kernel.org" , "Vetter, Daniel" , "Ong@freedesktop.org" List-Id: devicetree@vger.kernel.org T24gVHVlLCAyMDE3LTA4LTAxIGF0IDE3OjMwICswMzAwLCBMYXVyZW50IFBpbmNoYXJ0IHdyb3Rl Og0KPiBIaSBIZWFuIExvb25nLA0KPiANCj4gVGhhbmsgeW91IGZvciB0aGUgcGF0Y2guDQo+IA0K PiBPbiBUdWVzZGF5IDAxIEF1ZyAyMDE3IDEwOjMxOjM0IEhlYW4gTG9vbmcsIE9uZyB3cm90ZToN Cj4gPiANCj4gPiBGcm9tOiBPbmcgSGVhbiBMb29uZyA8aGVhbi5sb29uZy5vbmdAaW50ZWwuY29t Pg0KPiA+IA0KPiA+IERyaXZlciBmb3IgSW50ZWwgRlBHQSBWaWRlbyBhbmQgSW1hZ2UgUHJvY2Vz c2luZw0KPiA+IFN1aXRlIEZyYW1lIEJ1ZmZlciBJSS4gVGhlIGRyaXZlciBvbmx5IHN1cHBvcnRz IHRoZSBJbnRlbA0KPiA+IEFycmlhMTAgZGV2a2l0IGFuZCBpdHMgdmFyaWFudHMuIFRoaXMgZHJp dmVyIGNhbiBiZSBlaXRoZXINCj4gPiBsb2FkZWQgc3RhdGljbGx5IG9yIGluIG1vZHVsZXMuIFRo ZSBPRiBkZXZpY2UgdHJlZSBiaW5kaW5nDQo+ID4gaXMgbG9jYXRlZCBhdDoNCj4gPiBEb2N1bWVu dGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3MvZGlzcGxheS9hbHRyLHZpcC1mYjIudHh0DQo+ID4g DQo+ID4gU2lnbmVkLW9mZi1ieTogT25nLCBIZWFuIExvb25nIDxoZWFuLmxvb25nLm9uZ0BpbnRl bC5jb20+DQo+ID4gLS0tDQo+ID4gVjM6DQo+ID4gKkNoYW5nZXMgdG8gZml4aW5nIGRybV9zaW1w bGVfcGlwZQ0KPiA+ICpVc2VkIGRybV9mYl9jbWFfZ2V0X2dlbV9hZGRyDQo+ID4gDQo+ID4gVjI6 DQo+ID4gKkFkZGluZyBkcm1fc2ltcGxlX2Rpc3BsYXlfcGlwZV9pbml0DQo+ID4gLS0tDQo+ID4g wqBkcml2ZXJzL2dwdS9kcm0vS2NvbmZpZ8KgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoHzC oMKgwqAyICsNCj4gPiDCoGRyaXZlcnMvZ3B1L2RybS9NYWtlZmlsZcKgwqDCoMKgwqDCoMKgwqDC oMKgwqDCoMKgwqB8wqDCoMKgMSArDQo+ID4gwqBkcml2ZXJzL2dwdS9kcm0vaXZpcC9LY29uZmln wqDCoMKgwqDCoMKgwqDCoMKgwqB8wqDCoDEzICsrKw0KPiA+IMKgZHJpdmVycy9ncHUvZHJtL2l2 aXAvTWFrZWZpbGXCoMKgwqDCoMKgwqDCoMKgwqB8wqDCoMKgOSArKw0KPiA+IMKgZHJpdmVycy9n cHUvZHJtL2l2aXAvaW50ZWxfdmlwX2Nvbm4uYyB8wqDCoDk2ICsrKysrKysrKysrKysrKysNCj4g PiDCoGRyaXZlcnMvZ3B1L2RybS9pdmlwL2ludGVsX3ZpcF9jb3JlLmMgfCAxODMNCj4gPiArKysr KysrKysrKysrKysrKysrKysrKysrKysrKysNCj4gPiDCoGRyaXZlcnMvZ3B1L2RybS9pdmlwL2lu dGVsX3ZpcF9kcnYuaMKgwqB8wqDCoDU0ICsrKysrKysrKw0KPiA+IMKgZHJpdmVycy9ncHUvZHJt L2l2aXAvaW50ZWxfdmlwX29mLmPCoMKgwqB8IDIwNA0KPiA+ICsrKysrKysrKysrKysrKysrKysr KysrKysrKysrKysNCj4gPiDCoDggZmlsZXMgY2hhbmdlZCwgNTYyIGluc2VydGlvbnMoKykNCj4g PiDCoGNyZWF0ZSBtb2RlIDEwMDY0NCBkcml2ZXJzL2dwdS9kcm0vaXZpcC9LY29uZmlnDQo+ID4g wqBjcmVhdGUgbW9kZSAxMDA2NDQgZHJpdmVycy9ncHUvZHJtL2l2aXAvTWFrZWZpbGUNCj4gPiDC oGNyZWF0ZSBtb2RlIDEwMDY0NCBkcml2ZXJzL2dwdS9kcm0vaXZpcC9pbnRlbF92aXBfY29ubi5j DQo+ID4gwqBjcmVhdGUgbW9kZSAxMDA2NDQgZHJpdmVycy9ncHUvZHJtL2l2aXAvaW50ZWxfdmlw X2NvcmUuYw0KPiA+IMKgY3JlYXRlIG1vZGUgMTAwNjQ0IGRyaXZlcnMvZ3B1L2RybS9pdmlwL2lu dGVsX3ZpcF9kcnYuaA0KPiA+IMKgY3JlYXRlIG1vZGUgMTAwNjQ0IGRyaXZlcnMvZ3B1L2RybS9p dmlwL2ludGVsX3ZpcF9vZi5jDQo+IFtzbmlwXQ0KPiANCj4gPiANCj4gPiBkaWZmIC0tZ2l0IGEv ZHJpdmVycy9ncHUvZHJtL2l2aXAvS2NvbmZpZw0KPiA+IGIvZHJpdmVycy9ncHUvZHJtL2l2aXAv S2NvbmZpZw0KPiA+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0DQo+ID4gaW5kZXggMDAwMDAwMC4uOWE4 YzVjZQ0KPiA+IC0tLSAvZGV2L251bGwNCj4gPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaXZpcC9L Y29uZmlnDQo+ID4gQEAgLTAsMCArMSwxMyBAQA0KPiA+ICtjb25maWcgRFJNX0lWSVANCj4gPiAr CcKgdHJpc3RhdGUgIkludGVsIEZHUEEgVmlkZW8gYW5kIEltYWdlIFByb2Nlc3NpbmciDQo+ID4g KwnCoGRlcGVuZHMgb24gRFJNICYmIE9GDQo+ID4gKwnCoHNlbGVjdCBEUk1fR0VNX0NNQV9IRUxQ RVINCj4gPiArCcKgc2VsZWN0IERSTV9LTVNfSEVMUEVSDQo+ID4gKwnCoHNlbGVjdCBEUk1fS01T X0ZCX0hFTFBFUg0KPiA+ICsJwqBzZWxlY3QgRFJNX0tNU19DTUFfSEVMUEVSDQo+ID4gKwnCoGhl bHANCj4gPiArCcKgwqDCoMKgwqBDaG9vc2UgdGhpcyBvcHRpb24gaWYgeW91IGhhdmUgYSBJbnRl bCBGUEdBIEFycmlhIDEwDQo+ID4gc3lzdGVtDQo+ID4gKwnCoMKgwqDCoMKgYW5kIGFib3ZlIHdp dGggYSBEaXNwbGF5IFBvcnQgSVAuIFRoaXMgZG9lcyBub3QNCj4gPiBzdXBwb3J0IGxlZ2FjeQ0K PiA+ICsJwqDCoMKgwqDCoEludGVsIEZQR0EgQ3ljbG9uZSBWIGRpc3BsYXkgcG9ydC4gQ3VycmVu dGx5IG9ubHkNCj4gPiBzaW5nbGUgZnJhbWUNCj4gPiArCcKgwqDCoMKgwqBidWZmZXIgaXMgc3Vw cG9ydGVkLg0KPiBJIHRoaW5rIHRoaXMgc2hvdWxkIGJlIGZpeGVkIHRvIHVwc3RyZWFtIHRoaXMg ZHJpdmVyLg0KPiANCj4gPiANCj4gPiBOb3RlIHRoYXQgQUNQSSBhbmQgWF84NiBhcmNoaXRlY3R1 cmUgaXMgeWV0DQo+IEFDUEkgb24gRlBHQS4uLiBJIHdvbmRlciBpZiBpdCBjb3VsZCBnZXQgYW55 IGNyYXppZXIgdGhhbiB0aGF0IDotKQ0KPiANClRoZSBkcml2ZXIgaXMgbWVhbnQgZm9yIHRoZSBw cm9kdWN0IEludGVsIEZQR0EgQXJyaWExMCBkZXZraXQuIFdlwqANCmRvIG5vdCBoYXZlIHBsYW5z IGZvciB0aGUgZGV2a2l0IHRvIGJlIHNoaXBwZWQgd2l0aCBBQ1BJIGFuZCBYXzg2IGluIGENCmZv cnNlZWFibGUgZnV0dXJlLiBDdXJyZW50bHkgbW9zdCB0aGUgY29tbWVyY2lhbCBTb0MgZGV2a2l0 cyBhcmUNCnNoaXBwZWQgd2l0aCBBUk0gKyBGUEdBLg0KPiA+IA0KPiA+ICsJwqDCoMKgwqDCoHRv IGJlIHN1cHBvcnRlZC5JZiBNIGlzIHNlbGVjdGVkIHRoZSBtb2R1bGUgd291bGQgYmUNCj4gPiBj YWxsZWQgaXZpcC4NCj4gcy8uSWYvLiBJZi8NCj4gDQo+IFtzbmlwXQ0KPiANCj4gPiANCj4gPiBk aWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2l2aXAvaW50ZWxfdmlwX2NvcmUuYw0KPiA+IGIv ZHJpdmVycy9ncHUvZHJtL2l2aXAvaW50ZWxfdmlwX2NvcmUuYyBuZXcgZmlsZSBtb2RlIDEwMDY0 NA0KPiA+IGluZGV4IDAwMDAwMDAuLmVhODU3MTUNCj4gPiAtLS0gL2Rldi9udWxsDQo+ID4gKysr IGIvZHJpdmVycy9ncHUvZHJtL2l2aXAvaW50ZWxfdmlwX2NvcmUuYw0KPiA+IEBAIC0wLDAgKzEs MTgzIEBADQo+ID4gKy8qDQo+ID4gKyAqIGludGVsX3ZpcF9jb3JlLmMgLS0gSW50ZWwgVmlkZW8g YW5kIEltYWdlIFByb2Nlc3NpbmcoVklQKQ0KPiA+ICsgKiBGcmFtZSBCdWZmZXIgSUkgZHJpdmVy DQo+ID4gKyAqDQo+ID4gKyAqIFRoaXMgZHJpdmVyIHN1cHBvcnRzIHRoZSBJbnRlbCBWSVAgRnJh bWUgUmVhZGVyIGNvbXBvbmVudC4NCj4gPiArICogTW9yZSBpbmZvIG9uIHRoZSBoYXJkd2FyZSBj YW4gYmUgZm91bmQgaW4gdGhlIEludGVsIFZpZGVvDQo+ID4gKyAqIGFuZCBJbWFnZSBQcm9jZXNz aW5nIFN1aXRlIFVzZXIgR3VpZGUgYXQgdGhpcyBhZGRyZXNzDQo+ID4gKyAqIGh0dHA6Ly93d3cu YWx0ZXJhLmNvbS9saXRlcmF0dXJlL3VnL3VnX3ZpcC5wZGYuDQo+ID4gKyAqDQo+ID4gKyAqIFRo aXMgcHJvZ3JhbSBpcyBmcmVlIHNvZnR3YXJlOyB5b3UgY2FuIHJlZGlzdHJpYnV0ZSBpdCBhbmQv b3INCj4gPiBtb2RpZnkgaXQNCj4gPiArICogdW5kZXIgdGhlIHRlcm1zIGFuZCBjb25kaXRpb25z IG9mIHRoZSBHTlUgR2VuZXJhbCBQdWJsaWMNCj4gPiBMaWNlbnNlLA0KPiA+ICsgKiB2ZXJzaW9u IDIsIGFzIHB1Ymxpc2hlZCBieSB0aGUgRnJlZSBTb2Z0d2FyZSBGb3VuZGF0aW9uLg0KPiA+ICsg Kg0KPiA+ICsgKiBUaGlzIHByb2dyYW0gaXMgZGlzdHJpYnV0ZWQgaW4gdGhlIGhvcGUgaXQgd2ls bCBiZSB1c2VmdWwsIGJ1dA0KPiA+IFdJVEhPVVQNCj4gPiArICogQU5ZIFdBUlJBTlRZOyB3aXRo b3V0IGV2ZW4gdGhlIGltcGxpZWQgd2FycmFudHkgb2YNCj4gPiBNRVJDSEFOVEFCSUxJVFkgb3IN Cj4gPiArICogRklUTkVTUyBGT1IgQSBQQVJUSUNVTEFSIFBVUlBPU0UuwqDCoFNlZSB0aGUgR05V IEdlbmVyYWwgUHVibGljDQo+ID4gTGljZW5zZQ0KPiA+IGZvciArICogbW9yZSBkZXRhaWxzLg0K PiA+ICsgKg0KPiA+ICsgKiBBdXRob3JzOg0KPiA+ICsgKiBPbmcsIEhlYW4tTG9vbmcgPGhlYW4u bG9vbmcub25nQGludGVsLmNvbT4NCj4gPiArICoNCj4gPiArICovDQo+ID4gKw0KPiA+ICsjaW5j bHVkZSA8bGludXgvaW5pdC5oPg0KPiA+ICsjaW5jbHVkZSA8bGludXgva2VybmVsLmg+DQo+ID4g KyNpbmNsdWRlIDxsaW51eC9tb2R1bGUuaD4NCj4gPiArDQo+ID4gKyNpbmNsdWRlIDxkcm0vZHJt UC5oPg0KPiA+ICsjaW5jbHVkZSA8ZHJtL2RybV9hdG9taWMuaD4NCj4gPiArI2luY2x1ZGUgPGRy bS9kcm1fYXRvbWljX2hlbHBlci5oPg0KPiA+ICsjaW5jbHVkZSA8ZHJtL2RybV9jcnRjX2hlbHBl ci5oPg0KPiA+ICsjaW5jbHVkZSA8ZHJtL2RybV9mYl9oZWxwZXIuaD4NCj4gPiArI2luY2x1ZGUg PGRybS9kcm1fZmJfY21hX2hlbHBlci5oPg0KPiA+ICsjaW5jbHVkZSA8ZHJtL2RybV9nZW1fY21h X2hlbHBlci5oPg0KPiA+ICsjaW5jbHVkZSA8ZHJtL2RybV9wbGFuZV9oZWxwZXIuaD4NCj4gPiAr I2luY2x1ZGUgPGRybS9kcm1fc2ltcGxlX2ttc19oZWxwZXIuaD4NCj4gPiArDQo+ID4gKyNpbmNs dWRlICJpbnRlbF92aXBfZHJ2LmgiDQo+ID4gKw0KPiA+ICtzdGF0aWMgdm9pZCBpbnRlbHZpcGZi X2VuYWJsZShzdHJ1Y3QgZHJtX3NpbXBsZV9kaXNwbGF5X3BpcGUNCj4gPiAqcGlwZSwNCj4gPiAr CXN0cnVjdCBkcm1fY3J0Y19zdGF0ZSAqY3J0Y19zdGF0ZSkNCj4gPiArew0KPiA+ICsJLyoNCj4g PiArCcKgKiBUaGUgZnJhbWVpbmZvIHZhcmlhYmxlIGhhcyB0byBjb3JyZXNwb25kIHRvIHRoZSBz aXplIG9mDQo+ID4gdGhlIFZJUMKgDQo+IFN1aXRlDQo+ID4gDQo+ID4gKwnCoCogRnJhbWUgUmVh ZGVyIHJlZ2lzdGVyIDcgd2hpY2ggd2lsbCBkZXRlcm1pbmUgdGhlDQo+ID4gbWF4aW11bSBzaXpl IHVzZWQNCj4gPiArCcKgKiBpbiB0aGlzIGZyYW1laW5mbw0KPiA+ICsJwqAqLw0KPiA+ICsNCj4g PiArCXUzMiBmcmFtZWluZm87DQo+ID4gKwlzdHJ1Y3QgaW50ZWx2aXBmYl9wcml2ICpwcml2ID0g cGlwZS0+cGxhbmUuZGV2LQ0KPiA+ID5kZXZfcHJpdmF0ZTsNCj4gPiArCXZvaWQgX19pb21lbSAq YmFzZSA9IHByaXYtPmJhc2U7DQo+ID4gKwlzdHJ1Y3QgZHJtX3BsYW5lX3N0YXRlICpzdGF0ZSA9 IHBpcGUtPnBsYW5lLnN0YXRlOw0KPiA+ICsJZG1hX2FkZHJfdCBhZGRyOw0KPiA+ICsNCj4gPiAr CWFkZHIgPSBkcm1fZmJfY21hX2dldF9nZW1fYWRkcihzdGF0ZS0+ZmIsIHN0YXRlLCAwKTsNCj4g PiArDQo+ID4gKwlkZXZfaW5mbyhwaXBlLT5wbGFuZS5kZXYtPmRldiwgIkFkZHJlc3MgMHgleFxu IiwgYWRkcik7DQo+ID4gKw0KPiA+ICsJZnJhbWVpbmZvID0NCj4gPiArCQnCoMKgcmVhZGwoYmFz ZSArIElOVEVMVklQRkJfRlJBTUVfUkVBREVSKSAmDQo+ID4gMHgwMGZmZmZmZjsNCj4gPiArCXdy aXRlbChmcmFtZWluZm8sIGJhc2UgKyBJTlRFTFZJUEZCX0ZSQU1FX0lORk8pOw0KPiA+ICsJd3Jp dGVsKGFkZHIsIGJhc2UgKyBJTlRFTFZJUEZCX0ZSQU1FX1NUQVJUKTsNCj4gPiArCS8qIEZpbmFs bHkgc2V0IHRoZSBjb250cm9sIHJlZ2lzdGVyIHRvIDEgdG8gc3RhcnQNCj4gPiBzdHJlYW1pbmcg Ki8NCj4gPiArCXdyaXRlbCgxLCBiYXNlICsgSU5URUxWSVBGQl9DT05UUk9MKTsNCj4gPiArfQ0K PiA+ICsNCj4gPiArc3RhdGljIHZvaWQgaW50ZWx2aXBmYl9kaXNhYmxlKHN0cnVjdCBkcm1fc2lt cGxlX2Rpc3BsYXlfcGlwZQ0KPiA+ICpwaXBlKQ0KPiA+ICt7DQo+ID4gKwlzdHJ1Y3QgaW50ZWx2 aXBmYl9wcml2ICpwcml2ID0gcGlwZS0+cGxhbmUuZGV2LQ0KPiA+ID5kZXZfcHJpdmF0ZTsNCj4g PiArCXZvaWQgX19pb21lbSAqYmFzZSA9IHByaXYtPmJhc2U7DQo+IE1pc3NpbmcgYmxhbmsgbGlu ZS4NCj4gDQo+ID4gDQo+ID4gKwkvKiBzZXQgdGhlIGNvbnRyb2wgcmVnaXN0ZXIgdG8gMCB0byBz dG9wIHN0cmVhbWluZyAqLw0KPiA+ICsJd3JpdGVsKDAsIGJhc2UgKyBJTlRFTFZJUEZCX0NPTlRS T0wpOw0KPiA+ICt9DQo+ID4gKw0KPiA+ICtzdGF0aWMgY29uc3Qgc3RydWN0IGRybV9tb2RlX2Nv bmZpZ19mdW5jcw0KPiA+IGludGVsdmlwZmJfbW9kZV9jb25maWdfZnVuY3MgPSB7DQo+ID4gKwku ZmJfY3JlYXRlID0gZHJtX2ZiX2NtYV9jcmVhdGUsDQo+ID4gKwkuYXRvbWljX2NoZWNrID0gZHJt X2F0b21pY19oZWxwZXJfY2hlY2ssDQo+ID4gKwkuYXRvbWljX2NvbW1pdCA9IGRybV9hdG9taWNf aGVscGVyX2NvbW1pdCwNCj4gPiArfTsNCj4gPiArDQo+ID4gK3N0YXRpYyB2b2lkIGludGVsdmlw ZmJfc2V0dXBfbW9kZV9jb25maWcoc3RydWN0IGRybV9kZXZpY2UgKmRybSkNCj4gPiArew0KPiA+ ICsJZHJtX21vZGVfY29uZmlnX2luaXQoZHJtKTsNCj4gPiArCWRybS0+bW9kZV9jb25maWcuZnVu Y3MgPSAmaW50ZWx2aXBmYl9tb2RlX2NvbmZpZ19mdW5jczsNCj4gPiArfQ0KPiA+ICsNCj4gPiAr c3RhdGljIGludCBpbnRlbHZpcGZiX3BpcGVfcHJlcGFyZV9mYihzdHJ1Y3QNCj4gPiBkcm1fc2lt cGxlX2Rpc3BsYXlfcGlwZSAqcGlwZSwNCj4gPiArCQlzdHJ1Y3QgZHJtX3BsYW5lX3N0YXRlICpw bGFuZV9zdGF0ZSkNCj4gPiArew0KPiA+ICsJcmV0dXJuIGRybV9mYl9jbWFfcHJlcGFyZV9mYigm cGlwZS0+cGxhbmUsIHBsYW5lX3N0YXRlKTsNCj4gPiArfQ0KPiA+ICsNCj4gPiArc3RhdGljIHZv aWQgaW50ZWx2aXBmYl91cGRhdGUoc3RydWN0IGRybV9zaW1wbGVfZGlzcGxheV9waXBlDQo+ID4g KnBpcGUsDQo+ID4gKwkJc3RydWN0IGRybV9wbGFuZV9zdGF0ZSAqb2xkX3N0YXRlKQ0KPiA+ICt7 DQo+ID4gKwlzdHJ1Y3QgZHJtX2NydGMgKmNydGMgPSAmcGlwZS0+Y3J0YzsNCj4gPiArDQo+ID4g KwlpZiAoY3J0Yy0+c3RhdGUtPmV2ZW50KSB7DQo+ID4gKwkJc3Bpbl9sb2NrX2lycSgmY3J0Yy0+ ZGV2LT5ldmVudF9sb2NrKTsNCj4gPiArCQlkcm1fY3J0Y19zZW5kX3ZibGFua19ldmVudChjcnRj LCBjcnRjLT5zdGF0ZS0NCj4gPiA+ZXZlbnQpOw0KPiA+ICsJCXNwaW5fdW5sb2NrX2lycSgmY3J0 Yy0+ZGV2LT5ldmVudF9sb2NrKTsNCj4gPiArCQljcnRjLT5zdGF0ZS0+ZXZlbnQgPSBOVUxMOw0K PiA+ICsJfQ0KPiBUaGlzIGlzIG5vdCBxdWl0ZSByaWdodC4gVXNlcnNwYWNlIGV4cGVjdHMgdGhl IGRyaXZlciB0byBwZXJmb3JtIGENCj4gcGFnZSBmbGlwwqANCj4gaGVyZSwgYW5kIHlvdSBqdXN0 IHNpZ25hbCBwYWdlIGZsaXAgY29tcGxldGlvbiB3aXRob3V0IGRvaW5nDQo+IGFueXRoaW5nLg0K PiANCj4gPiANCj4gPiArfQ0KPiA+ICsNCj4gPiArc3RhdGljIHN0cnVjdCBkcm1fc2ltcGxlX2Rp c3BsYXlfcGlwZV9mdW5jcyBmYnByaXZfZnVuY3MgPSB7DQo+ID4gKwkucHJlcGFyZV9mYiA9IGlu dGVsdmlwZmJfcGlwZV9wcmVwYXJlX2ZiLA0KPiA+ICsJLnVwZGF0ZSA9IGludGVsdmlwZmJfdXBk YXRlLA0KPiA+ICsJLmVuYWJsZSA9IGludGVsdmlwZmJfZW5hYmxlLA0KPiA+ICsJLmRpc2FibGUg PSBpbnRlbHZpcGZiX2Rpc2FibGUNCj4gPiArfTsNCj4gPiArDQo+ID4gK2ludCBpbnRlbHZpcGZi X3Byb2JlKHN0cnVjdCBkZXZpY2UgKmRldiwgdm9pZCBfX2lvbWVtICpiYXNlKQ0KPiBZb3UgZG9u J3QgdXNlIHRoZSBiYXNlIGFyZ3VtZW50LCB5b3UgY2FuIHJlbW92ZSBpdC4NCj4gDQo+ID4gDQo+ ID4gK3sNCj4gPiArCWludCByZXR2YWw7DQo+ID4gKwlzdHJ1Y3QgZHJtX2RldmljZSAqZHJtOw0K PiA+ICsJc3RydWN0IGludGVsdmlwZmJfcHJpdiAqZmJwcml2ID0gZGV2X2dldF9kcnZkYXRhKGRl dik7DQo+ID4gKwlzdHJ1Y3QgZHJtX2Nvbm5lY3RvciAqY29ubmVjdG9yOw0KPiA+ICsNCj4gRXh0 cmEgYmxhbmsgbGluZS4NCj4gDQo+ID4gDQo+ID4gKwl1MzIgZm9ybWF0c1tdID0ge0RSTV9GT1JN QVRfWFJHQjg4ODh9Ow0KPiA+ICsNCj4gPiArCWRldl9zZXRfZHJ2ZGF0YShkZXYsIGZicHJpdik7 DQo+IEFzIGZicHJpdiBpcyBvYnRhaW5lZCBieSBhIGNhbGwgdG8gZGV2X2dldF9kcnZkYXRhKCks IHRoaXMgaXNuJ3QNCj4gbmVlZGVkLg0KPiANCj4gQSBiZXR0ZXIgb3B0aW9uIHdvdWxkIGJlIHRv IHBhc3MgdGhlIGludGVsdmlwZmJfcHJpdiBwb2ludGVyIGFzIGFuDQo+IGFyZ3VtZW50IHRvwqAN Cj4gdGhpcyBmdW5jdGlvbi4NCj4gDQo+ID4gDQo+ID4gKwlkcm0gPSBmYnByaXYtPmRybTsNCj4g PiArDQo+ID4gKwlkcm0tPmRldl9wcml2YXRlID0gZmJwcml2Ow0KPiA+ICsNCj4gPiArCWludGVs dmlwZmJfc2V0dXBfbW9kZV9jb25maWcoZHJtKTsNCj4gPiArDQo+ID4gKwljb25uZWN0b3IgPSBp bnRlbHZpcGZiX2Nvbm5fc2V0dXAoZHJtKTsNCj4gPiArCWlmICghY29ubmVjdG9yKSB7DQo+ID4g KwkJZGV2X2Vycihkcm0tPmRldiwgIkNvbm5lY3RvciBzZXR1cCBmYWlsZWRcbiIpOw0KPiA+ICsJ CWdvdG8gZXJyX21vZGVfY29uZmlnOw0KPiA+ICsJfQ0KPiA+ICsNCj4gPiArCXJldHZhbCA9IGRy bV9zaW1wbGVfZGlzcGxheV9waXBlX2luaXQoZHJtLCAmZmJwcml2LT5waXBlLA0KPiA+ICsJCSZm YnByaXZfZnVuY3MsIGZvcm1hdHMsDQo+ID4gKwkJQVJSQVlfU0laRShmb3JtYXRzKSwgY29ubmVj dG9yKTsNCj4gPiArCWlmIChyZXR2YWwgPCAwKSB7DQo+ID4gKwkJZGV2X2Vycihkcm0tPmRldiwg IkNhbm5vdCBzZXR1cCBzaW1wbGUgZGlzcGxheQ0KPiA+IHBpcGVcbiIpOw0KPiA+ICsJCWdvdG8g ZXJyX21vZGVfY29uZmlnOw0KPiA+ICsJfQ0KPiA+ICsNCj4gPiArCWZicHJpdi0+ZmJjbWEgPSBk cm1fZmJkZXZfY21hX2luaXQoZHJtLA0KPiA+ICsJCWRybS0+bW9kZV9jb25maWcucHJlZmVycmVk X2RlcHRoLA0KPiA+ICsJCWRybS0+bW9kZV9jb25maWcubnVtX2Nvbm5lY3Rvcik7DQo+ID4gKw0K PiA+ICsJZHJtX21vZGVfY29uZmlnX3Jlc2V0KGRybSk7DQo+ID4gKw0KPiA+ICsJZHJtX2Rldl9y ZWdpc3Rlcihkcm0sIDApOw0KPiA+ICsNCj4gPiArCXJldHVybiByZXR2YWw7DQo+ID4gKw0KPiA+ ICtlcnJfbW9kZV9jb25maWc6DQo+ID4gKw0KPiA+ICsJZHJtX21vZGVfY29uZmlnX2NsZWFudXAo ZHJtKTsNCj4gPiArCXJldHVybiAtRU5PREVWOw0KPiA+ICt9DQo+ID4gK0VYUE9SVF9TWU1CT0xf R1BMKGludGVsdmlwZmJfcHJvYmUpOw0KPiBXaHkgZG8geW91IG5lZWQgdG8gZXhwb3J0IHRoaXMg c3ltYm9sID8NCj4gDQo+ID4gDQo+ID4gK2ludCBpbnRlbHZpcGZiX3JlbW92ZShzdHJ1Y3QgZGV2 aWNlICpkZXYpDQo+ID4gK3sNCj4gPiArCXN0cnVjdCBpbnRlbHZpcGZiX3ByaXYgKmZicHJpdiA9 IGRldl9nZXRfZHJ2ZGF0YShkZXYpOw0KPiA+ICsJc3RydWN0IGRybV9kZXZpY2UgKmRybSA9wqDC oGZicHJpdi0+ZHJtOw0KPiA+ICsNCj4gPiArCWRybV9kZXZfdW5yZWdpc3Rlcihkcm0pOw0KPiA+ ICsNCj4gPiArCWlmIChmYnByaXYtPmZiY21hKQ0KPiA+ICsJCWRybV9mYmRldl9jbWFfZmluaShm YnByaXYtPmZiY21hKTsNCj4gPiArDQo+ID4gKwlkcm1fbW9kZV9jb25maWdfY2xlYW51cChkcm0p Ow0KPiA+ICsNCj4gPiArCWRybV9kZXZfdW5yZWYoZHJtKTsNCj4gPiArDQo+ID4gKwlkZXZtX2tm cmVlKGRldiwgZmJwcml2KTsNCj4gVGhlIHdob2xlIHBvaW50IG9mIGRldm1fa3phbGxvYygpIGlz IHRoYXQgeW91IGRvbid0IG5lZWQgdG8gZnJlZSB0aGUNCj4gbWVtb3J5IGF0wqANCj4gcmVtb3Zl IHRpbWUuDQo+IA0KPiA+IA0KPiA+ICsNCj4gPiArCXJldHVybiAwOw0KPiA+ICt9DQo+ID4gK0VY UE9SVF9TWU1CT0xfR1BMKGludGVsdmlwZmJfcmVtb3ZlKTsNCj4gPiArDQo+ID4gK01PRFVMRV9B VVRIT1IoIk9uZywgSGVhbi1Mb29uZyA8aGVhbi5sb29uZy5vbmdAaW50ZWwuY29tPiIpOw0KPiA+ ICtNT0RVTEVfREVTQ1JJUFRJT04oIkludGVsIFZJUCBGcmFtZSBCdWZmZXIgSUkgZHJpdmVyIik7 DQo+ID4gK01PRFVMRV9MSUNFTlNFKCJHUEwgdjIiKTsNCj4gPiBkaWZmIC0tZ2l0IGEvZHJpdmVy cy9ncHUvZHJtL2l2aXAvaW50ZWxfdmlwX2Rydi5oDQo+ID4gYi9kcml2ZXJzL2dwdS9kcm0vaXZp cC9pbnRlbF92aXBfZHJ2LmggbmV3IGZpbGUgbW9kZSAxMDA2NDQNCj4gPiBpbmRleCAwMDAwMDAw Li5lYmRiZDUwDQo+ID4gLS0tIC9kZXYvbnVsbA0KPiA+ICsrKyBiL2RyaXZlcnMvZ3B1L2RybS9p dmlwL2ludGVsX3ZpcF9kcnYuaA0KPiA+IEBAIC0wLDAgKzEsNTQgQEANCj4gPiArLyoNCj4gPiAr ICogQ29weXJpZ2h0IChDKSAyMDE3IEludGVsIENvcnBvcmF0aW9uLg0KPiA+ICsgKg0KPiA+ICsg KiBJbnRlbCBWaWRlbyBhbmQgSW1hZ2UgUHJvY2Vzc2luZyhWSVApIEZyYW1lIEJ1ZmZlciBJSSBk cml2ZXIuDQo+ID4gKyAqDQo+ID4gKyAqIFRoaXMgcHJvZ3JhbSBpcyBmcmVlIHNvZnR3YXJlOyB5 b3UgY2FuIHJlZGlzdHJpYnV0ZSBpdCBhbmQvb3INCj4gPiBtb2RpZnkgaXQNCj4gPiArICogdW5k ZXIgdGhlIHRlcm1zIGFuZCBjb25kaXRpb25zIG9mIHRoZSBHTlUgR2VuZXJhbCBQdWJsaWMNCj4g PiBMaWNlbnNlLA0KPiA+ICsgKiB2ZXJzaW9uIDIsIGFzIHB1Ymxpc2hlZCBieSB0aGUgRnJlZSBT b2Z0d2FyZSBGb3VuZGF0aW9uLg0KPiA+ICsgKg0KPiA+ICsgKiBUaGlzIHByb2dyYW0gaXMgZGlz dHJpYnV0ZWQgaW4gdGhlIGhvcGUgaXQgd2lsbCBiZSB1c2VmdWwsIGJ1dA0KPiA+IFdJVEhPVVQN Cj4gPiArICogQU5ZIFdBUlJBTlRZOyB3aXRob3V0IGV2ZW4gdGhlIGltcGxpZWQgd2FycmFudHkg b2YNCj4gPiBNRVJDSEFOVEFCSUxJVFkgb3INCj4gPiArICogRklUTkVTUyBGT1IgQSBQQVJUSUNV TEFSIFBVUlBPU0UuwqDCoFNlZSB0aGUgR05VIEdlbmVyYWwgUHVibGljDQo+ID4gTGljZW5zZQ0K PiA+IGZvciArICogbW9yZSBkZXRhaWxzLg0KPiA+ICsgKg0KPiA+ICsgKiBZb3Ugc2hvdWxkIGhh dmUgcmVjZWl2ZWQgYSBjb3B5IG9mIHRoZSBHTlUgR2VuZXJhbCBQdWJsaWMNCj4gPiBMaWNlbnNl IGFsb25nDQo+ID4gd2l0aCArICogdGhpcyBwcm9ncmFtLsKgwqBJZiBub3QsIHNlZSA8aHR0cDov L3d3dy5nbnUub3JnL2xpY2Vuc2VzLz4uDQo+ID4gKyAqDQo+ID4gKyAqIEF1dGhvcnM6DQo+ID4g KyAqIE9uZywgSGVhbi1Mb29uZyA8aGVhbi5sb29uZy5vbmdAaW50ZWwuY29tPg0KPiA+ICsgKg0K PiA+ICsgKi8NCj4gPiArI2lmbmRlZiBfSU5URUxfVklQX0RSVl9IDQo+ID4gKyNkZWZpbmUgX0lO VEVMX1ZJUF9EUlZfSA0KPiBNaXNzaW5nIGJsYW5rIGxpbmUuDQo+IA0KPiA+IA0KPiA+ICsjaW5j bHVkZSA8bGludXgvaW8uaD4NCj4gPiArI2luY2x1ZGUgPGxpbnV4L2ZiLmg+DQo+IEkgZG9uJ3Qg dGhpbmsgdGhpcyBoZWFkZXIgaXMgbmVlZGVkLg0KPiANCj4gPiANCj4gPiArI2RlZmluZSBEUklW RVJfTkFNRcKgwqDCoMKgImludGVsdmlwZmIiDQo+ID4gKyNkZWZpbmUgQllURVNfUEVSX1BJWEVM wqDCoMKgwqDCoMKgwqDCoDQNCj4gPiArI2RlZmluZSBDUlRDX05VTcKgwqDCoMKgwqDCoMKgwqDC oMKgwqDCoMKgwqDCoDENCj4gPiArI2RlZmluZSBDT05OX05VTcKgwqDCoMKgwqDCoMKgwqDCoMKg wqDCoMKgwqDCoDENCj4gPiArDQo+ID4gKy8qIGNvbnRyb2wgcmVnaXN0ZXJzICovDQo+ID4gKyNk ZWZpbmUgSU5URUxWSVBGQl9DT05UUk9MwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAwDQo+ID4g KyNkZWZpbmUgSU5URUxWSVBGQl9TVEFUVVPCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgMHg0 DQo+ID4gKyNkZWZpbmUgSU5URUxWSVBGQl9JTlRFUlJVUFTCoMKgwqDCoMKgwqDCoMKgwqDCoMKg MHg4DQo+ID4gKyNkZWZpbmUgSU5URUxWSVBGQl9GUkFNRV9DT1VOVEVSwqDCoMKgwqDCoMKgwqAw eEMNCj4gPiArI2RlZmluZSBJTlRFTFZJUEZCX0ZSQU1FX0RST1DCoMKgwqDCoMKgwqDCoMKgwqDC oDB4MTANCj4gPiArI2RlZmluZSBJTlRFTFZJUEZCX0ZSQU1FX0lORk/CoMKgwqDCoMKgwqDCoMKg wqDCoDB4MTQNCj4gPiArI2RlZmluZSBJTlRFTFZJUEZCX0ZSQU1FX1NUQVJUwqDCoMKgwqDCoMKg wqDCoMKgMHgxOA0KPiA+ICsjZGVmaW5lIElOVEVMVklQRkJfRlJBTUVfUkVBREVSwqDCoMKgwqDC oMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAweDFDDQo+ID4gKw0KPiA+ICtpbnQgaW50ZWx2aXBmYl9w cm9iZShzdHJ1Y3QgZGV2aWNlICpkZXYsIHZvaWQgX19pb21lbSAqYmFzZSk7DQo+ID4gK2ludCBp bnRlbHZpcGZiX3JlbW92ZShzdHJ1Y3QgZGV2aWNlICpkZXYpOw0KPiA+ICtpbnQgaW50ZWx2aXBm Yl9zZXR1cF9jcnRjKHN0cnVjdCBkcm1fZGV2aWNlICpkcm0pOw0KPiA+ICtzdHJ1Y3QgZHJtX2Nv bm5lY3RvciAqaW50ZWx2aXBmYl9jb25uX3NldHVwKHN0cnVjdCBkcm1fZGV2aWNlDQo+ID4gKmRy bSk7DQo+ID4gKw0KPiA+ICtzdHJ1Y3QgaW50ZWx2aXBmYl9wcml2IHsNCj4gPiArCXN0cnVjdCBk cm1fc2ltcGxlX2Rpc3BsYXlfcGlwZSBwaXBlOw0KPiA+ICsJc3RydWN0IGRybV9mYmRldl9jbWEg KmZiY21hOw0KPiA+ICsJc3RydWN0IGRybV9kZXZpY2UgKmRybTsNCj4gPiArCXZvaWTCoMKgwqDC oF9faW9tZW0gKmJhc2U7DQo+ID4gK307DQo+ID4gKw0KPiA+ICsjZW5kaWYNCj4gPiBkaWZmIC0t Z2l0IGEvZHJpdmVycy9ncHUvZHJtL2l2aXAvaW50ZWxfdmlwX29mLmMNCj4gPiBiL2RyaXZlcnMv Z3B1L2RybS9pdmlwL2ludGVsX3ZpcF9vZi5jIG5ldyBmaWxlIG1vZGUgMTAwNjQ0DQo+ID4gaW5k ZXggMDAwMDAwMC4uNWE3YzYzYg0KPiA+IC0tLSAvZGV2L251bGwNCj4gPiArKysgYi9kcml2ZXJz L2dwdS9kcm0vaXZpcC9pbnRlbF92aXBfb2YuYw0KPiA+IEBAIC0wLDAgKzEsMjA0IEBADQo+ID4g Ky8qDQo+ID4gKyAqIGludGVsX3ZpcF9vZi5jIC0tIEludGVsIFZpZGVvIGFuZCBJbWFnZSBQcm9j ZXNzaW5nKFZJUCkNCj4gPiArICogRnJhbWUgQnVmZmVyIElJIGRyaXZlcg0KPiA+ICsgKg0KPiA+ ICsgKiBUaGlzIGRyaXZlciBzdXBwb3J0cyB0aGUgSW50ZWwgVklQIEZyYW1lIFJlYWRlciBjb21w b25lbnQuDQo+ID4gKyAqIE1vcmUgaW5mbyBvbiB0aGUgaGFyZHdhcmUgY2FuIGJlIGZvdW5kIGlu IHRoZSBJbnRlbCBWaWRlbw0KPiA+ICsgKiBhbmQgSW1hZ2UgUHJvY2Vzc2luZyBTdWl0ZSBVc2Vy IEd1aWRlIGF0IHRoaXMgYWRkcmVzcw0KPiA+ICsgKiBodHRwOi8vd3d3LmFsdGVyYS5jb20vbGl0 ZXJhdHVyZS91Zy91Z192aXAucGRmLg0KPiA+ICsgKg0KPiA+ICsgKiBUaGlzIHByb2dyYW0gaXMg ZnJlZSBzb2Z0d2FyZTsgeW91IGNhbiByZWRpc3RyaWJ1dGUgaXQgYW5kL29yDQo+ID4gbW9kaWZ5 IGl0DQo+ID4gKyAqIHVuZGVyIHRoZSB0ZXJtcyBhbmQgY29uZGl0aW9ucyBvZiB0aGUgR05VIEdl bmVyYWwgUHVibGljDQo+ID4gTGljZW5zZSwNCj4gPiArICogdmVyc2lvbiAyLCBhcyBwdWJsaXNo ZWQgYnkgdGhlIEZyZWUgU29mdHdhcmUgRm91bmRhdGlvbi4NCj4gPiArICoNCj4gPiArICogVGhp cyBwcm9ncmFtIGlzIGRpc3RyaWJ1dGVkIGluIHRoZSBob3BlIGl0IHdpbGwgYmUgdXNlZnVsLCBi dXQNCj4gPiBXSVRIT1VUDQo+ID4gKyAqIEFOWSBXQVJSQU5UWTsgd2l0aG91dCBldmVuIHRoZSBp bXBsaWVkIHdhcnJhbnR5IG9mDQo+ID4gTUVSQ0hBTlRBQklMSVRZIG9yDQo+ID4gKyAqIEZJVE5F U1MgRk9SIEEgUEFSVElDVUxBUiBQVVJQT1NFLsKgwqBTZWUgdGhlIEdOVSBHZW5lcmFsIFB1Ymxp Yw0KPiA+IExpY2Vuc2UNCj4gPiBmb3INCj4gPiArICogbW9yZSBkZXRhaWxzLg0KPiA+ICsgKg0K PiA+ICsgKiBBdXRob3JzOg0KPiA+ICsgKiBPbmcsIEhlYW4tTG9vbmcgPGhlYW4ubG9vbmcub25n QGludGVsLmNvbT4NCj4gPiArICoNCj4gPiArICovDQo+ID4gKw0KPiA+ICsjaW5jbHVkZSA8bGlu dXgvY29tcG9uZW50Lmg+DQo+ID4gKyNpbmNsdWRlIDxsaW51eC9mYi5oPg0KPiBJIGRvbid0IHRo aW5rIHRob3NlIHR3byBoZWFkZXJzIGFyZSBuZWVkZWQuDQo+IA0KPiA+IA0KPiA+ICsjaW5jbHVk ZSA8bGludXgvaW5pdC5oPg0KPiA+ICsjaW5jbHVkZSA8bGludXgva2VybmVsLmg+DQo+ID4gKyNp bmNsdWRlIDxsaW51eC9tb2R1bGUuaD4NCj4gPiArI2luY2x1ZGUgPGxpbnV4L3BsYXRmb3JtX2Rl dmljZS5oPg0KPiA+ICsNCj4gPiArI2luY2x1ZGUgPGRybS9kcm1fZmJfaGVscGVyLmg+DQo+ID4g KyNpbmNsdWRlIDxkcm0vZHJtX29mLmg+DQo+ID4gKyNpbmNsdWRlIDxkcm0vZHJtX2ZiX2NtYV9o ZWxwZXIuaD4NCj4gPiArI2luY2x1ZGUgPGRybS9kcm1fZ2VtX2NtYV9oZWxwZXIuaD4NCj4gPiAr I2luY2x1ZGUgPGRybS9kcm1fc2ltcGxlX2ttc19oZWxwZXIuaD4NCj4gUGxlYXNlIHNvcnQgdGhl c2UgYWxwaGFiZXRpY2FsbHkuDQo+IA0KPiA+IA0KPiA+ICsNCj4gPiArI2luY2x1ZGUgImludGVs X3ZpcF9kcnYuaCINCj4gPiArDQo+ID4gK0RFRklORV9EUk1fR0VNX0NNQV9GT1BTKGRybV9mb3Bz KTsNCj4gPiArDQo+ID4gK3N0YXRpYyB2b2lkIGludGVsdmlwZmJfbGFzdGNsb3NlKHN0cnVjdCBk cm1fZGV2aWNlICpkcm0pDQo+ID4gK3sNCj4gPiArCXN0cnVjdCBpbnRlbHZpcGZiX3ByaXYgKnBy aXYgPSBkcm0tPmRldl9wcml2YXRlOw0KPiA+ICsNCj4gPiArCWRybV9mYmRldl9jbWFfcmVzdG9y ZV9tb2RlKHByaXYtPmZiY21hKTsNCj4gPiArfQ0KPiA+ICsNCj4gPiArc3RhdGljIHN0cnVjdCBk cm1fZHJpdmVyIGludGVsdmlwZmJfZHJtID0gew0KPiA+ICsJLmRyaXZlcl9mZWF0dXJlcyA9DQo+ ID4gKwkJRFJJVkVSX01PREVTRVQgfCBEUklWRVJfR0VNIHwNCj4gPiArCQlEUklWRVJfUFJJTUUg fCBEUklWRVJfQVRPTUlDLA0KPiA+ICsJLmdlbV9mcmVlX29iamVjdF91bmxvY2tlZCA9IGRybV9n ZW1fY21hX2ZyZWVfb2JqZWN0LA0KPiA+ICsJLmdlbV92bV9vcHMgPSAmZHJtX2dlbV9jbWFfdm1f b3BzLA0KPiA+ICsJLmR1bWJfY3JlYXRlID0gZHJtX2dlbV9jbWFfZHVtYl9jcmVhdGUsDQo+ID4g KwkuZHVtYl9tYXBfb2Zmc2V0ID0gZHJtX2dlbV9jbWFfZHVtYl9tYXBfb2Zmc2V0LA0KPiA+ICsJ LmR1bWJfZGVzdHJveSA9IGRybV9nZW1fZHVtYl9kZXN0cm95LA0KPiA+ICsJLnByaW1lX2hhbmRs ZV90b19mZCA9IGRybV9nZW1fcHJpbWVfaGFuZGxlX3RvX2ZkLA0KPiA+ICsJLnByaW1lX2ZkX3Rv X2hhbmRsZSA9IGRybV9nZW1fcHJpbWVfZmRfdG9faGFuZGxlLA0KPiA+ICsJLmdlbV9wcmltZV9l eHBvcnQgPSBkcm1fZ2VtX3ByaW1lX2V4cG9ydCwNCj4gPiArCS5nZW1fcHJpbWVfaW1wb3J0ID0g ZHJtX2dlbV9wcmltZV9pbXBvcnQsDQo+ID4gKwkuZ2VtX3ByaW1lX2dldF9zZ190YWJsZSA9IGRy bV9nZW1fY21hX3ByaW1lX2dldF9zZ190YWJsZSwNCj4gPiArCS5nZW1fcHJpbWVfaW1wb3J0X3Nn X3RhYmxlID0NCj4gPiBkcm1fZ2VtX2NtYV9wcmltZV9pbXBvcnRfc2dfdGFibGUsDQo+ID4gKwku Z2VtX3ByaW1lX3ZtYXAgPSBkcm1fZ2VtX2NtYV9wcmltZV92bWFwLA0KPiA+ICsJLmdlbV9wcmlt ZV92dW5tYXAgPSBkcm1fZ2VtX2NtYV9wcmltZV92dW5tYXAsDQo+ID4gKwkuZ2VtX3ByaW1lX21t YXAgPSBkcm1fZ2VtX2NtYV9wcmltZV9tbWFwLA0KPiA+ICsJLmxhc3RjbG9zZSA9IGludGVsdmlw ZmJfbGFzdGNsb3NlLA0KPiA+ICsJLm5hbWUgPSBEUklWRVJfTkFNRSwNCj4gPiArCS5kYXRlID0g IjIwMTcwNzI5IiwNCj4gPiArCS5kZXNjID0gIkludGVsIEZQR0EgVklQIFNVSVRFIiwNCj4gPiAr CS5tYWpvciA9IDEsDQo+ID4gKwkubWlub3IgPSAwLA0KPiA+ICsJLmlvY3RscyA9IE5VTEwsDQo+ ID4gKwkucGF0Y2hsZXZlbCA9IDAsDQo+ID4gKwkuZm9wcyA9ICZkcm1fZm9wcywNCj4gPiArfTsN Cj4gPiArDQo+ID4gKy8qDQo+ID4gKyAqIFNldHRpbmcgdXAgaW5mb3JtYXRpb24gZGVyaXZlZCBm cm9tIE9GIERldmljZSBUcmVlIE5vZGVzDQo+ID4gKyAqIG1heC13aWR0aCwgbWF4LWhlaWdodCwg Yml0cyBwZXIgcGl4ZWwsIG1lbW9yeSBwb3J0IHdpZHRoDQo+ID4gKyAqLw0KPiA+ICsNCj4gPiAr c3RhdGljIGludCBpbnRlbHZpcGZiX2RybV9zZXR1cChzdHJ1Y3QgZGV2aWNlICpkZXYsDQo+ID4g KwkJCXN0cnVjdCBpbnRlbHZpcGZiX3ByaXYgKmZicHJpdikNCj4gPiArew0KPiA+ICsJc3RydWN0 IGRybV9kZXZpY2UgKmRybSA9IGZicHJpdi0+ZHJtOw0KPiA+ICsJc3RydWN0IGRldmljZV9ub2Rl ICpucCA9IGRldi0+b2Zfbm9kZTsNCj4gPiArCWludCBtZW1fd29yZF93aWR0aDsNCj4gPiArCWlu dCBtYXhfaCwgbWF4X3c7DQo+ID4gKwlpbnQgYnBwOw0KPiA+ICsJaW50IHJldDsNCj4gPiArDQo+ ID4gKwlyZXQgPSBvZl9wcm9wZXJ0eV9yZWFkX3UzMihucCwgImFsdHIsbWF4LXdpZHRoIiwgJm1h eF93KTsNCj4gPiArCWlmIChyZXQpIHsNCj4gPiArCQlkZXZfZXJyKGRldiwNCj4gPiArCQkiTWlz c2luZyByZXF1aXJlZCBwYXJhbWV0ZXIgJ2FsdHIsbWF4LXdpZHRoJyIpOw0KPiA+ICsJCXJldHVy biByZXQ7DQo+ID4gKwl9DQo+ID4gKw0KPiA+ICsJcmV0ID0gb2ZfcHJvcGVydHlfcmVhZF91MzIo bnAsICJhbHRyLG1heC1oZWlnaHQiLCAmbWF4X2gpOw0KPiA+ICsJaWYgKHJldCkgew0KPiA+ICsJ CWRldl9lcnIoZGV2LA0KPiA+ICsJCSJNaXNzaW5nIHJlcXVpcmVkIHBhcmFtZXRlciAnYWx0cixt YXgtaGVpZ2h0JyIpOw0KPiA+ICsJCXJldHVybiByZXQ7DQo+ID4gKwl9DQo+ID4gKw0KPiA+ICsJ cmV0ID0gb2ZfcHJvcGVydHlfcmVhZF91MzIobnAsICJhbHRyLGJpdHMtcGVyLXN5bWJvbCIsDQo+ ID4gJmJwcCk7DQo+IFRoaXMgcHJvcGVydHkgaXMgbm90IGRvY3VtZW50ZWQgaW4gcGF0Y2ggMS8z Lg0KPiANCj4gPiANCj4gPiArCWlmIChyZXQpIHsNCj4gPiArCQlkZXZfZXJyKGRldiwNCj4gPiAr CQkiTWlzc2luZyByZXF1aXJlZCBwYXJhbWV0ZXIgJ2FsdHIsYml0cy1wZXItDQo+ID4gc3ltYm9s JyIpOw0KPiA+ICsJCXJldHVybiByZXQ7DQo+ID4gKwl9DQo+ID4gKw0KPiA+ICsJcmV0ID0gb2Zf cHJvcGVydHlfcmVhZF91MzIobnAsICJhbHRyLG1lbS1wb3J0LXdpZHRoIizCoA0KPiAmbWVtX3dv cmRfd2lkdGgpOw0KPiA+IA0KPiA+ICsJaWYgKHJldCkgew0KPiA+ICsJCWRldl9lcnIoZGV2LCAi TWlzc2luZyByZXF1aXJlZCBwYXJhbWV0ZXINCj4gPiAnYWx0cixtZW0tcG9ydC13aWR0aMKgDQo+ ICciKTsNCj4gPiANCj4gPiArCQlyZXR1cm4gcmV0Ow0KPiA+ICsJfQ0KPiA+ICsNCj4gPiArCWlm ICghKG1lbV93b3JkX3dpZHRoID49IDMyICYmIG1lbV93b3JkX3dpZHRoICUgMzIgPT0gMCkpIHsN Cj4gPiArCQlkZXZfZXJyKGRldiwNCj4gPiArCQkibWVtLXdvcmQtd2lkdGggaXMgc2V0IHRvICVp LiBtdXN0IGJlID49IDMyIGFuZA0KPiA+IG11bHRpcGxlIG9mwqANCj4gMzIuIiwNCj4gPiANCj4g PiArCQltZW1fd29yZF93aWR0aCk7DQo+ID4gKwkJcmV0dXJuIC1FTk9ERVY7DQo+ID4gKwl9DQo+ ID4gKw0KPiA+ICsJZHJtLT5tb2RlX2NvbmZpZy5taW5fd2lkdGggPSA2NDA7DQo+ID4gKwlkcm0t Pm1vZGVfY29uZmlnLm1pbl9oZWlnaHQgPSA0ODA7DQo+ID4gKwlkcm0tPm1vZGVfY29uZmlnLm1h eF93aWR0aCA9IG1heF93Ow0KPiA+ICsJZHJtLT5tb2RlX2NvbmZpZy5tYXhfaGVpZ2h0ID0gbWF4 X2g7DQo+ID4gKwlkcm0tPm1vZGVfY29uZmlnLnByZWZlcnJlZF9kZXB0aCA9IGJwcCAqIEJZVEVT X1BFUl9QSVhFTDsNCj4gPiArDQo+ID4gKwlyZXR1cm4gMDsNCj4gPiArfQpfX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0 CmRyaS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3Rv cC5vcmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751925AbdHBC2b (ORCPT ); Tue, 1 Aug 2017 22:28:31 -0400 Received: from mga03.intel.com ([134.134.136.65]:49377 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751775AbdHBC22 (ORCPT ); Tue, 1 Aug 2017 22:28:28 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.41,309,1498546800"; d="scan'208";a="134810810" From: "Ong, Hean Loong" To: "dri-devel@lists.freedesktop.org" , "laurent.pinchart@ideasonboard.com" CC: "linux-kernel@vger.kernel.org" , "dinguyen@kernel.org" , "Ong@freedesktop.org" , "Vetter, Daniel" , "robh+dt@kernel.org" , "devicetree@vger.kernel.org" Subject: Re: [PATCHv4 3/3] DRM:ivip Intel FPGA Video and Image Processing Suite Thread-Topic: [PATCHv4 3/3] DRM:ivip Intel FPGA Video and Image Processing Suite Thread-Index: AQHTCm7Zs5NMfUTrU0WnVCrev+g41aJvCoAAgADIioA= Date: Wed, 2 Aug 2017 02:28:23 +0000 Message-ID: <1501640901.3757.3.camel@intel.com> References: <1501554694-3378-1-git-send-email-hean.loong.ong@intel.com> <1501554694-3378-4-git-send-email-hean.loong.ong@intel.com> <2323445.Hdzqrs3Ziv@avalon> In-Reply-To: <2323445.Hdzqrs3Ziv@avalon> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.226.242.95] Content-Type: text/plain; charset="utf-8" Content-ID: <9AE5F7210DF5F54BBC7314A92976C648@intel.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by nfs id v722ScM3013857 On Tue, 2017-08-01 at 17:30 +0300, Laurent Pinchart wrote: > Hi Hean Loong, > > Thank you for the patch. > > On Tuesday 01 Aug 2017 10:31:34 Hean Loong, Ong wrote: > > > > From: Ong Hean Loong > > > > Driver for Intel FPGA Video and Image Processing > > Suite Frame Buffer II. The driver only supports the Intel > > Arria10 devkit and its variants. This driver can be either > > loaded staticlly or in modules. The OF device tree binding > > is located at: > > Documentation/devicetree/bindings/display/altr,vip-fb2.txt > > > > Signed-off-by: Ong, Hean Loong > > --- > > V3: > > *Changes to fixing drm_simple_pipe > > *Used drm_fb_cma_get_gem_addr > > > > V2: > > *Adding drm_simple_display_pipe_init > > --- > >  drivers/gpu/drm/Kconfig               |   2 + > >  drivers/gpu/drm/Makefile              |   1 + > >  drivers/gpu/drm/ivip/Kconfig          |  13 +++ > >  drivers/gpu/drm/ivip/Makefile         |   9 ++ > >  drivers/gpu/drm/ivip/intel_vip_conn.c |  96 ++++++++++++++++ > >  drivers/gpu/drm/ivip/intel_vip_core.c | 183 > > ++++++++++++++++++++++++++++++ > >  drivers/gpu/drm/ivip/intel_vip_drv.h  |  54 +++++++++ > >  drivers/gpu/drm/ivip/intel_vip_of.c   | 204 > > +++++++++++++++++++++++++++++++ > >  8 files changed, 562 insertions(+) > >  create mode 100644 drivers/gpu/drm/ivip/Kconfig > >  create mode 100644 drivers/gpu/drm/ivip/Makefile > >  create mode 100644 drivers/gpu/drm/ivip/intel_vip_conn.c > >  create mode 100644 drivers/gpu/drm/ivip/intel_vip_core.c > >  create mode 100644 drivers/gpu/drm/ivip/intel_vip_drv.h > >  create mode 100644 drivers/gpu/drm/ivip/intel_vip_of.c > [snip] > > > > > diff --git a/drivers/gpu/drm/ivip/Kconfig > > b/drivers/gpu/drm/ivip/Kconfig > > new file mode 100644 > > index 0000000..9a8c5ce > > --- /dev/null > > +++ b/drivers/gpu/drm/ivip/Kconfig > > @@ -0,0 +1,13 @@ > > +config DRM_IVIP > > +  tristate "Intel FGPA Video and Image Processing" > > +  depends on DRM && OF > > +  select DRM_GEM_CMA_HELPER > > +  select DRM_KMS_HELPER > > +  select DRM_KMS_FB_HELPER > > +  select DRM_KMS_CMA_HELPER > > +  help > > +      Choose this option if you have a Intel FPGA Arria 10 > > system > > +      and above with a Display Port IP. This does not > > support legacy > > +      Intel FPGA Cyclone V display port. Currently only > > single frame > > +      buffer is supported. > I think this should be fixed to upstream this driver. > > > > > Note that ACPI and X_86 architecture is yet > ACPI on FPGA... I wonder if it could get any crazier than that :-) > The driver is meant for the product Intel FPGA Arria10 devkit. We  do not have plans for the devkit to be shipped with ACPI and X_86 in a forseeable future. Currently most the commercial SoC devkits are shipped with ARM + FPGA. > > > > +      to be supported.If M is selected the module would be > > called ivip. > s/.If/. If/ > > [snip] > > > > > diff --git a/drivers/gpu/drm/ivip/intel_vip_core.c > > b/drivers/gpu/drm/ivip/intel_vip_core.c new file mode 100644 > > index 0000000..ea85715 > > --- /dev/null > > +++ b/drivers/gpu/drm/ivip/intel_vip_core.c > > @@ -0,0 +1,183 @@ > > +/* > > + * intel_vip_core.c -- Intel Video and Image Processing(VIP) > > + * Frame Buffer II driver > > + * > > + * This driver supports the Intel VIP Frame Reader component. > > + * More info on the hardware can be found in the Intel Video > > + * and Image Processing Suite User Guide at this address > > + * http://www.altera.com/literature/ug/ug_vip.pdf. > > + * > > + * This program is free software; you can redistribute it and/or > > modify it > > + * under the terms and conditions of the GNU General Public > > License, > > + * version 2, as published by the Free Software Foundation. > > + * > > + * This program is distributed in the hope it will be useful, but > > WITHOUT > > + * ANY WARRANTY; without even the implied warranty of > > MERCHANTABILITY or > > + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public > > License > > for + * more details. > > + * > > + * Authors: > > + * Ong, Hean-Loong > > + * > > + */ > > + > > +#include > > +#include > > +#include > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#include "intel_vip_drv.h" > > + > > +static void intelvipfb_enable(struct drm_simple_display_pipe > > *pipe, > > + struct drm_crtc_state *crtc_state) > > +{ > > + /* > > +  * The frameinfo variable has to correspond to the size of > > the VIP  > Suite > > > > +  * Frame Reader register 7 which will determine the > > maximum size used > > +  * in this frameinfo > > +  */ > > + > > + u32 frameinfo; > > + struct intelvipfb_priv *priv = pipe->plane.dev- > > >dev_private; > > + void __iomem *base = priv->base; > > + struct drm_plane_state *state = pipe->plane.state; > > + dma_addr_t addr; > > + > > + addr = drm_fb_cma_get_gem_addr(state->fb, state, 0); > > + > > + dev_info(pipe->plane.dev->dev, "Address 0x%x\n", addr); > > + > > + frameinfo = > > +   readl(base + INTELVIPFB_FRAME_READER) & > > 0x00ffffff; > > + writel(frameinfo, base + INTELVIPFB_FRAME_INFO); > > + writel(addr, base + INTELVIPFB_FRAME_START); > > + /* Finally set the control register to 1 to start > > streaming */ > > + writel(1, base + INTELVIPFB_CONTROL); > > +} > > + > > +static void intelvipfb_disable(struct drm_simple_display_pipe > > *pipe) > > +{ > > + struct intelvipfb_priv *priv = pipe->plane.dev- > > >dev_private; > > + void __iomem *base = priv->base; > Missing blank line. > > > > > + /* set the control register to 0 to stop streaming */ > > + writel(0, base + INTELVIPFB_CONTROL); > > +} > > + > > +static const struct drm_mode_config_funcs > > intelvipfb_mode_config_funcs = { > > + .fb_create = drm_fb_cma_create, > > + .atomic_check = drm_atomic_helper_check, > > + .atomic_commit = drm_atomic_helper_commit, > > +}; > > + > > +static void intelvipfb_setup_mode_config(struct drm_device *drm) > > +{ > > + drm_mode_config_init(drm); > > + drm->mode_config.funcs = &intelvipfb_mode_config_funcs; > > +} > > + > > +static int intelvipfb_pipe_prepare_fb(struct > > drm_simple_display_pipe *pipe, > > + struct drm_plane_state *plane_state) > > +{ > > + return drm_fb_cma_prepare_fb(&pipe->plane, plane_state); > > +} > > + > > +static void intelvipfb_update(struct drm_simple_display_pipe > > *pipe, > > + struct drm_plane_state *old_state) > > +{ > > + struct drm_crtc *crtc = &pipe->crtc; > > + > > + if (crtc->state->event) { > > + spin_lock_irq(&crtc->dev->event_lock); > > + drm_crtc_send_vblank_event(crtc, crtc->state- > > >event); > > + spin_unlock_irq(&crtc->dev->event_lock); > > + crtc->state->event = NULL; > > + } > This is not quite right. Userspace expects the driver to perform a > page flip  > here, and you just signal page flip completion without doing > anything. > > > > > +} > > + > > +static struct drm_simple_display_pipe_funcs fbpriv_funcs = { > > + .prepare_fb = intelvipfb_pipe_prepare_fb, > > + .update = intelvipfb_update, > > + .enable = intelvipfb_enable, > > + .disable = intelvipfb_disable > > +}; > > + > > +int intelvipfb_probe(struct device *dev, void __iomem *base) > You don't use the base argument, you can remove it. > > > > > +{ > > + int retval; > > + struct drm_device *drm; > > + struct intelvipfb_priv *fbpriv = dev_get_drvdata(dev); > > + struct drm_connector *connector; > > + > Extra blank line. > > > > > + u32 formats[] = {DRM_FORMAT_XRGB8888}; > > + > > + dev_set_drvdata(dev, fbpriv); > As fbpriv is obtained by a call to dev_get_drvdata(), this isn't > needed. > > A better option would be to pass the intelvipfb_priv pointer as an > argument to  > this function. > > > > > + drm = fbpriv->drm; > > + > > + drm->dev_private = fbpriv; > > + > > + intelvipfb_setup_mode_config(drm); > > + > > + connector = intelvipfb_conn_setup(drm); > > + if (!connector) { > > + dev_err(drm->dev, "Connector setup failed\n"); > > + goto err_mode_config; > > + } > > + > > + retval = drm_simple_display_pipe_init(drm, &fbpriv->pipe, > > + &fbpriv_funcs, formats, > > + ARRAY_SIZE(formats), connector); > > + if (retval < 0) { > > + dev_err(drm->dev, "Cannot setup simple display > > pipe\n"); > > + goto err_mode_config; > > + } > > + > > + fbpriv->fbcma = drm_fbdev_cma_init(drm, > > + drm->mode_config.preferred_depth, > > + drm->mode_config.num_connector); > > + > > + drm_mode_config_reset(drm); > > + > > + drm_dev_register(drm, 0); > > + > > + return retval; > > + > > +err_mode_config: > > + > > + drm_mode_config_cleanup(drm); > > + return -ENODEV; > > +} > > +EXPORT_SYMBOL_GPL(intelvipfb_probe); > Why do you need to export this symbol ? > > > > > +int intelvipfb_remove(struct device *dev) > > +{ > > + struct intelvipfb_priv *fbpriv = dev_get_drvdata(dev); > > + struct drm_device *drm =  fbpriv->drm; > > + > > + drm_dev_unregister(drm); > > + > > + if (fbpriv->fbcma) > > + drm_fbdev_cma_fini(fbpriv->fbcma); > > + > > + drm_mode_config_cleanup(drm); > > + > > + drm_dev_unref(drm); > > + > > + devm_kfree(dev, fbpriv); > The whole point of devm_kzalloc() is that you don't need to free the > memory at  > remove time. > > > > > + > > + return 0; > > +} > > +EXPORT_SYMBOL_GPL(intelvipfb_remove); > > + > > +MODULE_AUTHOR("Ong, Hean-Loong "); > > +MODULE_DESCRIPTION("Intel VIP Frame Buffer II driver"); > > +MODULE_LICENSE("GPL v2"); > > diff --git a/drivers/gpu/drm/ivip/intel_vip_drv.h > > b/drivers/gpu/drm/ivip/intel_vip_drv.h new file mode 100644 > > index 0000000..ebdbd50 > > --- /dev/null > > +++ b/drivers/gpu/drm/ivip/intel_vip_drv.h > > @@ -0,0 +1,54 @@ > > +/* > > + * Copyright (C) 2017 Intel Corporation. > > + * > > + * Intel Video and Image Processing(VIP) Frame Buffer II driver. > > + * > > + * This program is free software; you can redistribute it and/or > > modify it > > + * under the terms and conditions of the GNU General Public > > License, > > + * version 2, as published by the Free Software Foundation. > > + * > > + * This program is distributed in the hope it will be useful, but > > WITHOUT > > + * ANY WARRANTY; without even the implied warranty of > > MERCHANTABILITY or > > + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public > > License > > for + * more details. > > + * > > + * You should have received a copy of the GNU General Public > > License along > > with + * this program.  If not, see . > > + * > > + * Authors: > > + * Ong, Hean-Loong > > + * > > + */ > > +#ifndef _INTEL_VIP_DRV_H > > +#define _INTEL_VIP_DRV_H > Missing blank line. > > > > > +#include > > +#include > I don't think this header is needed. > > > > > +#define DRIVER_NAME    "intelvipfb" > > +#define BYTES_PER_PIXEL        4 > > +#define CRTC_NUM               1 > > +#define CONN_NUM               1 > > + > > +/* control registers */ > > +#define INTELVIPFB_CONTROL             0 > > +#define INTELVIPFB_STATUS              0x4 > > +#define INTELVIPFB_INTERRUPT           0x8 > > +#define INTELVIPFB_FRAME_COUNTER       0xC > > +#define INTELVIPFB_FRAME_DROP          0x10 > > +#define INTELVIPFB_FRAME_INFO          0x14 > > +#define INTELVIPFB_FRAME_START         0x18 > > +#define INTELVIPFB_FRAME_READER                0x1C > > + > > +int intelvipfb_probe(struct device *dev, void __iomem *base); > > +int intelvipfb_remove(struct device *dev); > > +int intelvipfb_setup_crtc(struct drm_device *drm); > > +struct drm_connector *intelvipfb_conn_setup(struct drm_device > > *drm); > > + > > +struct intelvipfb_priv { > > + struct drm_simple_display_pipe pipe; > > + struct drm_fbdev_cma *fbcma; > > + struct drm_device *drm; > > + void    __iomem *base; > > +}; > > + > > +#endif > > diff --git a/drivers/gpu/drm/ivip/intel_vip_of.c > > b/drivers/gpu/drm/ivip/intel_vip_of.c new file mode 100644 > > index 0000000..5a7c63b > > --- /dev/null > > +++ b/drivers/gpu/drm/ivip/intel_vip_of.c > > @@ -0,0 +1,204 @@ > > +/* > > + * intel_vip_of.c -- Intel Video and Image Processing(VIP) > > + * Frame Buffer II driver > > + * > > + * This driver supports the Intel VIP Frame Reader component. > > + * More info on the hardware can be found in the Intel Video > > + * and Image Processing Suite User Guide at this address > > + * http://www.altera.com/literature/ug/ug_vip.pdf. > > + * > > + * This program is free software; you can redistribute it and/or > > modify it > > + * under the terms and conditions of the GNU General Public > > License, > > + * version 2, as published by the Free Software Foundation. > > + * > > + * This program is distributed in the hope it will be useful, but > > WITHOUT > > + * ANY WARRANTY; without even the implied warranty of > > MERCHANTABILITY or > > + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public > > License > > for > > + * more details. > > + * > > + * Authors: > > + * Ong, Hean-Loong > > + * > > + */ > > + > > +#include > > +#include > I don't think those two headers are needed. > > > > > +#include > > +#include > > +#include > > +#include > > + > > +#include > > +#include > > +#include > > +#include > > +#include > Please sort these alphabetically. > > > > > + > > +#include "intel_vip_drv.h" > > + > > +DEFINE_DRM_GEM_CMA_FOPS(drm_fops); > > + > > +static void intelvipfb_lastclose(struct drm_device *drm) > > +{ > > + struct intelvipfb_priv *priv = drm->dev_private; > > + > > + drm_fbdev_cma_restore_mode(priv->fbcma); > > +} > > + > > +static struct drm_driver intelvipfb_drm = { > > + .driver_features = > > + DRIVER_MODESET | DRIVER_GEM | > > + DRIVER_PRIME | DRIVER_ATOMIC, > > + .gem_free_object_unlocked = drm_gem_cma_free_object, > > + .gem_vm_ops = &drm_gem_cma_vm_ops, > > + .dumb_create = drm_gem_cma_dumb_create, > > + .dumb_map_offset = drm_gem_cma_dumb_map_offset, > > + .dumb_destroy = drm_gem_dumb_destroy, > > + .prime_handle_to_fd = drm_gem_prime_handle_to_fd, > > + .prime_fd_to_handle = drm_gem_prime_fd_to_handle, > > + .gem_prime_export = drm_gem_prime_export, > > + .gem_prime_import = drm_gem_prime_import, > > + .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, > > + .gem_prime_import_sg_table = > > drm_gem_cma_prime_import_sg_table, > > + .gem_prime_vmap = drm_gem_cma_prime_vmap, > > + .gem_prime_vunmap = drm_gem_cma_prime_vunmap, > > + .gem_prime_mmap = drm_gem_cma_prime_mmap, > > + .lastclose = intelvipfb_lastclose, > > + .name = DRIVER_NAME, > > + .date = "20170729", > > + .desc = "Intel FPGA VIP SUITE", > > + .major = 1, > > + .minor = 0, > > + .ioctls = NULL, > > + .patchlevel = 0, > > + .fops = &drm_fops, > > +}; > > + > > +/* > > + * Setting up information derived from OF Device Tree Nodes > > + * max-width, max-height, bits per pixel, memory port width > > + */ > > + > > +static int intelvipfb_drm_setup(struct device *dev, > > + struct intelvipfb_priv *fbpriv) > > +{ > > + struct drm_device *drm = fbpriv->drm; > > + struct device_node *np = dev->of_node; > > + int mem_word_width; > > + int max_h, max_w; > > + int bpp; > > + int ret; > > + > > + ret = of_property_read_u32(np, "altr,max-width", &max_w); > > + if (ret) { > > + dev_err(dev, > > + "Missing required parameter 'altr,max-width'"); > > + return ret; > > + } > > + > > + ret = of_property_read_u32(np, "altr,max-height", &max_h); > > + if (ret) { > > + dev_err(dev, > > + "Missing required parameter 'altr,max-height'"); > > + return ret; > > + } > > + > > + ret = of_property_read_u32(np, "altr,bits-per-symbol", > > &bpp); > This property is not documented in patch 1/3. > > > > > + if (ret) { > > + dev_err(dev, > > + "Missing required parameter 'altr,bits-per- > > symbol'"); > > + return ret; > > + } > > + > > + ret = of_property_read_u32(np, "altr,mem-port-width",  > &mem_word_width); > > > > + if (ret) { > > + dev_err(dev, "Missing required parameter > > 'altr,mem-port-width  > '"); > > > > + return ret; > > + } > > + > > + if (!(mem_word_width >= 32 && mem_word_width % 32 == 0)) { > > + dev_err(dev, > > + "mem-word-width is set to %i. must be >= 32 and > > multiple of  > 32.", > > > > + mem_word_width); > > + return -ENODEV; > > + } > > + > > + drm->mode_config.min_width = 640; > > + drm->mode_config.min_height = 480; > > + drm->mode_config.max_width = max_w; > > + drm->mode_config.max_height = max_h; > > + drm->mode_config.preferred_depth = bpp * BYTES_PER_PIXEL; > > + > > + return 0; > > +}