diff for duplicates of <1502198950.4296.59.camel@intel.com> diff --git a/a/1.txt b/N1/1.txt index 215aa42..c3cea66 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -6,31 +6,31 @@ On Tue, 2017-08-01 at 17:04 +0900, Kunihiko Hayashi wrote: > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > --- -> drivers/thermal/Kconfig | 8 + -> drivers/thermal/Makefile | 1 + -> drivers/thermal/uniphier_thermal.c | 384 +> ?drivers/thermal/Kconfig????????????|???8 + +> ?drivers/thermal/Makefile???????????|???1 + +> ?drivers/thermal/uniphier_thermal.c | 384 > +++++++++++++++++++++++++++++++++++++ -> 3 files changed, 393 insertions(+) -> create mode 100644 drivers/thermal/uniphier_thermal.c +> ?3 files changed, 393 insertions(+) +> ?create mode 100644 drivers/thermal/uniphier_thermal.c > > diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig > index b5b5fac..b9f2365 100644 > --- a/drivers/thermal/Kconfig > +++ b/drivers/thermal/Kconfig > @@ -473,4 +473,12 @@ config ZX2967_THERMAL -> the primitive temperature sensor embedded in zx2967 SoCs. -> This sensor generates the real time die temperature. -> +> ? ??the primitive temperature sensor embedded in zx2967 SoCs. +> ? ??This sensor generates the real time die temperature. +> ? > +config UNIPHIER_THERMAL > + tristate "Socionext UniPhier thermal driver" > + depends on ARCH_UNIPHIER || COMPILE_TEST > + depends on THERMAL_OF && MFD_SYSCON > + help -> + Enable this to plug in UniPhier on-chip PVT thermal driver +> + ??Enable this to plug in UniPhier on-chip PVT thermal driver > into the -> + thermal framework. The driver supports CPU thermal zone +> + ??thermal framework. The driver supports CPU thermal zone > temperature -> + reporting and a couple of trip points. +> + ??reporting and a couple of trip points. just one minor comments. @@ -39,15 +39,15 @@ you mentioned trip points here, but I don't find the code support. thanks, rui -> endif +> ?endif > diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile > index 094d703..8b79bca 100644 > --- a/drivers/thermal/Makefile > +++ b/drivers/thermal/Makefile -> @@ -59,3 +59,4 @@ obj-$(CONFIG_HISI_THERMAL) += hisi_thermal.o -> obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o -> obj-$(CONFIG_GENERIC_ADC_THERMAL) += thermal-generic-adc.o -> obj-$(CONFIG_ZX2967_THERMAL) += zx2967_thermal.o +> @@ -59,3 +59,4 @@ obj-$(CONFIG_HISI_THERMAL)?????+= hisi_thermal.o +> ?obj-$(CONFIG_MTK_THERMAL) += mtk_thermal.o +> ?obj-$(CONFIG_GENERIC_ADC_THERMAL) += thermal-generic-adc.o +> ?obj-$(CONFIG_ZX2967_THERMAL) += zx2967_thermal.o > +obj-$(CONFIG_UNIPHIER_THERMAL) += uniphier_thermal.o > diff --git a/drivers/thermal/uniphier_thermal.c > b/drivers/thermal/uniphier_thermal.c @@ -59,7 +59,7 @@ rui > +/** > + * uniphier_thermal.c - Socionext UniPhier thermal driver > + * -> + * Copyright 2014 Panasonic Corporation +> + * Copyright 2014??????Panasonic Corporation > + * Copyright 2016-2017 Socionext Inc. > + * All rights reserved. > + * @@ -69,12 +69,12 @@ rui > + * This program is free software: you can redistribute it and/or > modify > + * it under the terms of the GNU General Public License version -> 2 of +> 2??of > + * the License as published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of -> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.??See the > + * GNU General Public License for more details. > + */ > + @@ -128,7 +128,7 @@ rui > +#define PMALERTINTCTL_EN(ch) BIT(4 * (ch) + 0) > +#define PMALERTINTCTL_MASK (GENMASK(10, 8) | > GENMASK(6, 4) | \ -> + GENMASK(2, 0)) +> + ?GENMASK(2, 0)) > + > +#define TMOD 0x0928 > +#define TMOD_WIDTH 9 @@ -172,17 +172,17 @@ rui > + > + /* stop PVT */ > + regmap_write_bits(map, tdev->data->block_base + PVTCTLEN, -> + PVTCTLEN_EN, 0); +> + ??PVTCTLEN_EN, 0); > + > + /* -> + * Since SoC has a calibrated value that was set in advance, -> + * TMODCOEF shows non-zero and PVT refers the value +> + ?* Since SoC has a calibrated value that was set in advance, +> + ?* TMODCOEF shows non-zero and PVT refers the value > internally. -> + * -> + * If TMODCOEF shows zero, the boards don't have the +> + ?* +> + ?* If TMODCOEF shows zero, the boards don't have the > calibrated -> + * value, and the driver has to set default value from DT. -> + */ +> + ?* value, and the driver has to set default value from DT. +> + ?*/ > + ret = regmap_read(map, tdev->data->map_base + TMODCOEF, > &val); > + if (ret) @@ -190,10 +190,10 @@ rui > + if (!val) { > + /* look for the default values in DT */ > + ret = of_property_read_u32_array(tdev->dev->of_node, -> + "socionext,tmod- +> + ?"socionext,tmod- > calibration", -> + tmod_calib, -> + ARRAY_SIZE(tmod_cal +> + ?tmod_calib, +> + ?ARRAY_SIZE(tmod_cal > ib)); > + if (ret) > + return ret; @@ -207,33 +207,33 @@ rui > + > + /* select temperature mode */ > + regmap_write_bits(map, tdev->data->block_base + PVTCTLMODE, -> + PVTCTLMODE_MASK, PVTCTLMODE_TEMPMON); +> + ??PVTCTLMODE_MASK, PVTCTLMODE_TEMPMON); > + > + /* set monitoring period */ > + regmap_write_bits(map, tdev->data->block_base + EMONREPEAT, -> + EMONREPEAT_ENDLESS | EMONREPEAT_PERIOD, -> + EMONREPEAT_ENDLESS | +> + ??EMONREPEAT_ENDLESS | EMONREPEAT_PERIOD, +> + ??EMONREPEAT_ENDLESS | > EMONREPEAT_PERIOD_1000000); > + > + /* set monitor mode */ > + regmap_write_bits(map, tdev->data->map_base + PVTCTLSEL, -> + PVTCTLSEL_MASK, PVTCTLSEL_MONITOR); +> + ??PVTCTLSEL_MASK, PVTCTLSEL_MONITOR); > + > + return 0; > +} > + > +static void uniphier_tm_set_alert(struct uniphier_tm_dev *tdev, u32 > ch, -> + u32 temp) +> + ??u32 temp) > +{ > + struct regmap *map = tdev->regmap; > + > + /* set alert temperature */ > + regmap_write_bits(map, tdev->data->map_base + SETALERT0 + > (ch << 2), -> + SETALERT_EN | SETALERT_TEMP_OVF, -> + SETALERT_EN | -> + SETALERT_TEMP_OVF_VALUE(temp / 1000)); +> + ??SETALERT_EN | SETALERT_TEMP_OVF, +> + ??SETALERT_EN | +> + ??SETALERT_TEMP_OVF_VALUE(temp / 1000)); > +} > + > +static void uniphier_tm_enable_sensor(struct uniphier_tm_dev *tdev) @@ -248,11 +248,11 @@ rui > + > + /* enable alert interrupt */ > + regmap_write_bits(map, tdev->data->map_base + PMALERTINTCTL, -> + PMALERTINTCTL_MASK, bits); +> + ??PMALERTINTCTL_MASK, bits); > + > + /* start PVT */ > + regmap_write_bits(map, tdev->data->block_base + PVTCTLEN, -> + PVTCTLEN_EN, PVTCTLEN_EN); +> + ??PVTCTLEN_EN, PVTCTLEN_EN); > + > + usleep_range(700, 1500); /* The spec note says at > least 700us */ @@ -264,11 +264,11 @@ rui > + > + /* disable alert interrupt */ > + regmap_write_bits(map, tdev->data->map_base + PMALERTINTCTL, -> + PMALERTINTCTL_MASK, 0); +> + ??PMALERTINTCTL_MASK, 0); > + > + /* stop PVT */ > + regmap_write_bits(map, tdev->data->block_base + PVTCTLEN, -> + PVTCTLEN_EN, 0); +> + ??PVTCTLEN_EN, 0); > + > + usleep_range(1000, 2000); /* The spec note says at > least 1ms */ @@ -309,7 +309,7 @@ rui > + > + /* clear alert interrupt */ > + regmap_write_bits(tdev->regmap, -> + tdev->data->map_base + PMALERTINTCTL, +> + ??tdev->data->map_base + PMALERTINTCTL, > mask, bits); > +} > + @@ -404,7 +404,7 @@ rui > + /* set alert temperatures */ > + for (i = 0; i < ntrips; i++) { > + if (trips[i].type == THERMAL_TRIP_CRITICAL && -> + trips[i].temperature < crit_temp) +> + ????trips[i].temperature < crit_temp) > + crit_temp = trips[i].temperature; > + uniphier_tm_set_alert(tdev, i, > trips[i].temperature); @@ -433,25 +433,25 @@ rui > +} > + > +static const struct uniphier_tm_soc_data uniphier_pxs2_tm_data = { -> + .map_base = 0xe000, -> + .block_base = 0xe000, +> + .map_base????????= 0xe000, +> + .block_base??????= 0xe000, > + .tmod_setup_addr = 0xe904, > +}; > + > +static const struct uniphier_tm_soc_data uniphier_ld20_tm_data = { -> + .map_base = 0xe000, -> + .block_base = 0xe800, +> + .map_base????????= 0xe000, +> + .block_base??????= 0xe800, > + .tmod_setup_addr = 0xe938, > +}; > + > +static const struct of_device_id uniphier_tm_dt_ids[] = { > + { > + .compatible = "socionext,uniphier-pxs2-thermal", -> + .data = &uniphier_pxs2_tm_data, +> + .data???????= &uniphier_pxs2_tm_data, > + }, > + { > + .compatible = "socionext,uniphier-ld20-thermal", -> + .data = &uniphier_ld20_tm_data, +> + .data???????= &uniphier_ld20_tm_data, > + }, > + { /* sentinel */ } > +}; diff --git a/a/content_digest b/N1/content_digest index 47e22bc..0177750 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,18 +1,9 @@ "ref\01501574691-8961-1-git-send-email-hayashi.kunihiko@socionext.com\0" "ref\01501574691-8961-3-git-send-email-hayashi.kunihiko@socionext.com\0" - "From\0Zhang Rui <rui.zhang@intel.com>\0" - "Subject\0Re: [PATCH v6 2/2] thermal: uniphier: add UniPhier thermal driver\0" + "From\0rui.zhang@intel.com (Zhang Rui)\0" + "Subject\0[PATCH v6 2/2] thermal: uniphier: add UniPhier thermal driver\0" "Date\0Tue, 08 Aug 2017 21:29:10 +0800\0" - "To\0Kunihiko Hayashi <hayashi.kunihiko@socionext.com>" - " edubezval@gmail.com\0" - "Cc\0linux-pm@vger.kernel.org" - linux-arm-kernel@lists.infradead.org - linux-kernel@vger.kernel.org - robh+dt@kernel.org - mark.rutland@arm.com - yamada.masahiro@socionext.com - masami.hiramatsu@linaro.org - " jaswinder.singh@linaro.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Tue, 2017-08-01 at 17:04 +0900, Kunihiko Hayashi wrote:\n" @@ -23,31 +14,31 @@ "> \n" "> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>\n" "> ---\n" - "> \302\240drivers/thermal/Kconfig\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240\302\2408 +\n" - "> \302\240drivers/thermal/Makefile\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240\302\2401 +\n" - "> \302\240drivers/thermal/uniphier_thermal.c | 384\n" + "> ?drivers/thermal/Kconfig????????????|???8 +\n" + "> ?drivers/thermal/Makefile???????????|???1 +\n" + "> ?drivers/thermal/uniphier_thermal.c | 384\n" "> +++++++++++++++++++++++++++++++++++++\n" - "> \302\2403 files changed, 393 insertions(+)\n" - "> \302\240create mode 100644 drivers/thermal/uniphier_thermal.c\n" + "> ?3 files changed, 393 insertions(+)\n" + "> ?create mode 100644 drivers/thermal/uniphier_thermal.c\n" "> \n" "> diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig\n" "> index b5b5fac..b9f2365 100644\n" "> --- a/drivers/thermal/Kconfig\n" "> +++ b/drivers/thermal/Kconfig\n" "> @@ -473,4 +473,12 @@ config ZX2967_THERMAL\n" - "> \302\240\t\302\240\302\240the primitive temperature sensor embedded in zx2967 SoCs.\n" - "> \302\240\t\302\240\302\240This sensor generates the real time die temperature.\n" - "> \302\240\n" + "> ?\t??the primitive temperature sensor embedded in zx2967 SoCs.\n" + "> ?\t??This sensor generates the real time die temperature.\n" + "> ?\n" "> +config UNIPHIER_THERMAL\n" "> +\ttristate \"Socionext UniPhier thermal driver\"\n" "> +\tdepends on ARCH_UNIPHIER || COMPILE_TEST\n" "> +\tdepends on THERMAL_OF && MFD_SYSCON\n" "> +\thelp\n" - "> +\t\302\240\302\240Enable this to plug in UniPhier on-chip PVT thermal driver\n" + "> +\t??Enable this to plug in UniPhier on-chip PVT thermal driver\n" "> into the\n" - "> +\t\302\240\302\240thermal framework. The driver supports CPU thermal zone\n" + "> +\t??thermal framework. The driver supports CPU thermal zone\n" "> temperature\n" - "> +\t\302\240\302\240reporting and a couple of trip points.\n" + "> +\t??reporting and a couple of trip points.\n" "\n" "just one minor comments.\n" "\n" @@ -56,15 +47,15 @@ "thanks,\n" "rui\n" "\n" - "> \302\240endif\n" + "> ?endif\n" "> diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile\n" "> index 094d703..8b79bca 100644\n" "> --- a/drivers/thermal/Makefile\n" "> +++ b/drivers/thermal/Makefile\n" - "> @@ -59,3 +59,4 @@ obj-$(CONFIG_HISI_THERMAL)\302\240\302\240\302\240\302\240\302\240+= hisi_thermal.o\n" - "> \302\240obj-$(CONFIG_MTK_THERMAL)\t+= mtk_thermal.o\n" - "> \302\240obj-$(CONFIG_GENERIC_ADC_THERMAL)\t+= thermal-generic-adc.o\n" - "> \302\240obj-$(CONFIG_ZX2967_THERMAL)\t+= zx2967_thermal.o\n" + "> @@ -59,3 +59,4 @@ obj-$(CONFIG_HISI_THERMAL)?????+= hisi_thermal.o\n" + "> ?obj-$(CONFIG_MTK_THERMAL)\t+= mtk_thermal.o\n" + "> ?obj-$(CONFIG_GENERIC_ADC_THERMAL)\t+= thermal-generic-adc.o\n" + "> ?obj-$(CONFIG_ZX2967_THERMAL)\t+= zx2967_thermal.o\n" "> +obj-$(CONFIG_UNIPHIER_THERMAL)\t+= uniphier_thermal.o\n" "> diff --git a/drivers/thermal/uniphier_thermal.c\n" "> b/drivers/thermal/uniphier_thermal.c\n" @@ -76,7 +67,7 @@ "> +/**\n" "> + * uniphier_thermal.c - Socionext UniPhier thermal driver\n" "> + *\n" - "> + * Copyright 2014\302\240\302\240\302\240\302\240\302\240\302\240Panasonic Corporation\n" + "> + * Copyright 2014??????Panasonic Corporation\n" "> + * Copyright 2016-2017 Socionext Inc.\n" "> + * All rights reserved.\n" "> + *\n" @@ -86,12 +77,12 @@ "> + * This program is free software: you can redistribute it and/or\n" "> modify\n" "> + * it under the terms of the GNU General Public License version\n" - "> 2\302\240\302\240of\n" + "> 2??of\n" "> + * the License as published by the Free Software Foundation.\n" "> + *\n" "> + * This program is distributed in the hope that it will be useful,\n" "> + * but WITHOUT ANY WARRANTY; without even the implied warranty of\n" - "> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.\302\240\302\240See the\n" + "> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.??See the\n" "> + * GNU General Public License for more details.\n" "> + */\n" "> +\n" @@ -145,7 +136,7 @@ "> +#define PMALERTINTCTL_EN(ch)\t\tBIT(4 * (ch) + 0)\n" "> +#define PMALERTINTCTL_MASK\t\t(GENMASK(10, 8) |\n" "> GENMASK(6, 4) | \\\n" - "> +\t\t\t\t\t\302\240GENMASK(2, 0))\n" + "> +\t\t\t\t\t?GENMASK(2, 0))\n" "> +\n" "> +#define TMOD\t\t\t\t0x0928\n" "> +#define TMOD_WIDTH\t\t\t9\n" @@ -189,17 +180,17 @@ "> +\n" "> +\t/* stop PVT */\n" "> +\tregmap_write_bits(map, tdev->data->block_base + PVTCTLEN,\n" - "> +\t\t\t\302\240\302\240PVTCTLEN_EN, 0);\n" + "> +\t\t\t??PVTCTLEN_EN, 0);\n" "> +\n" "> +\t/*\n" - "> +\t\302\240* Since SoC has a calibrated value that was set in advance,\n" - "> +\t\302\240* TMODCOEF shows non-zero and PVT refers the value\n" + "> +\t?* Since SoC has a calibrated value that was set in advance,\n" + "> +\t?* TMODCOEF shows non-zero and PVT refers the value\n" "> internally.\n" - "> +\t\302\240*\n" - "> +\t\302\240* If TMODCOEF shows zero, the boards don't have the\n" + "> +\t?*\n" + "> +\t?* If TMODCOEF shows zero, the boards don't have the\n" "> calibrated\n" - "> +\t\302\240* value, and the driver has to set default value from DT.\n" - "> +\t\302\240*/\n" + "> +\t?* value, and the driver has to set default value from DT.\n" + "> +\t?*/\n" "> +\tret = regmap_read(map, tdev->data->map_base + TMODCOEF,\n" "> &val);\n" "> +\tif (ret)\n" @@ -207,10 +198,10 @@ "> +\tif (!val) {\n" "> +\t\t/* look for the default values in DT */\n" "> +\t\tret = of_property_read_u32_array(tdev->dev->of_node,\n" - "> +\t\t\t\t\t\t\302\240\"socionext,tmod-\n" + "> +\t\t\t\t\t\t?\"socionext,tmod-\n" "> calibration\",\n" - "> +\t\t\t\t\t\t\302\240tmod_calib,\n" - "> +\t\t\t\t\t\t\302\240ARRAY_SIZE(tmod_cal\n" + "> +\t\t\t\t\t\t?tmod_calib,\n" + "> +\t\t\t\t\t\t?ARRAY_SIZE(tmod_cal\n" "> ib));\n" "> +\t\tif (ret)\n" "> +\t\t\treturn ret;\n" @@ -224,33 +215,33 @@ "> +\n" "> +\t/* select temperature mode */\n" "> +\tregmap_write_bits(map, tdev->data->block_base + PVTCTLMODE,\n" - "> +\t\t\t\302\240\302\240PVTCTLMODE_MASK, PVTCTLMODE_TEMPMON);\n" + "> +\t\t\t??PVTCTLMODE_MASK, PVTCTLMODE_TEMPMON);\n" "> +\n" "> +\t/* set monitoring period */\n" "> +\tregmap_write_bits(map, tdev->data->block_base + EMONREPEAT,\n" - "> +\t\t\t\302\240\302\240EMONREPEAT_ENDLESS | EMONREPEAT_PERIOD,\n" - "> +\t\t\t\302\240\302\240EMONREPEAT_ENDLESS |\n" + "> +\t\t\t??EMONREPEAT_ENDLESS | EMONREPEAT_PERIOD,\n" + "> +\t\t\t??EMONREPEAT_ENDLESS |\n" "> EMONREPEAT_PERIOD_1000000);\n" "> +\n" "> +\t/* set monitor mode */\n" "> +\tregmap_write_bits(map, tdev->data->map_base + PVTCTLSEL,\n" - "> +\t\t\t\302\240\302\240PVTCTLSEL_MASK, PVTCTLSEL_MONITOR);\n" + "> +\t\t\t??PVTCTLSEL_MASK, PVTCTLSEL_MONITOR);\n" "> +\n" "> +\treturn 0;\n" "> +}\n" "> +\n" "> +static void uniphier_tm_set_alert(struct uniphier_tm_dev *tdev, u32\n" "> ch,\n" - "> +\t\t\t\t\302\240\302\240u32 temp)\n" + "> +\t\t\t\t??u32 temp)\n" "> +{\n" "> +\tstruct regmap *map = tdev->regmap;\n" "> +\n" "> +\t/* set alert temperature */\n" "> +\tregmap_write_bits(map, tdev->data->map_base + SETALERT0 +\n" "> (ch << 2),\n" - "> +\t\t\t\302\240\302\240SETALERT_EN | SETALERT_TEMP_OVF,\n" - "> +\t\t\t\302\240\302\240SETALERT_EN |\n" - "> +\t\t\t\302\240\302\240SETALERT_TEMP_OVF_VALUE(temp / 1000));\n" + "> +\t\t\t??SETALERT_EN | SETALERT_TEMP_OVF,\n" + "> +\t\t\t??SETALERT_EN |\n" + "> +\t\t\t??SETALERT_TEMP_OVF_VALUE(temp / 1000));\n" "> +}\n" "> +\n" "> +static void uniphier_tm_enable_sensor(struct uniphier_tm_dev *tdev)\n" @@ -265,11 +256,11 @@ "> +\n" "> +\t/* enable alert interrupt */\n" "> +\tregmap_write_bits(map, tdev->data->map_base + PMALERTINTCTL,\n" - "> +\t\t\t\302\240\302\240PMALERTINTCTL_MASK, bits);\n" + "> +\t\t\t??PMALERTINTCTL_MASK, bits);\n" "> +\n" "> +\t/* start PVT */\n" "> +\tregmap_write_bits(map, tdev->data->block_base + PVTCTLEN,\n" - "> +\t\t\t\302\240\302\240PVTCTLEN_EN, PVTCTLEN_EN);\n" + "> +\t\t\t??PVTCTLEN_EN, PVTCTLEN_EN);\n" "> +\n" "> +\tusleep_range(700, 1500);\t/* The spec note says at\n" "> least 700us */\n" @@ -281,11 +272,11 @@ "> +\n" "> +\t/* disable alert interrupt */\n" "> +\tregmap_write_bits(map, tdev->data->map_base + PMALERTINTCTL,\n" - "> +\t\t\t\302\240\302\240PMALERTINTCTL_MASK, 0);\n" + "> +\t\t\t??PMALERTINTCTL_MASK, 0);\n" "> +\n" "> +\t/* stop PVT */\n" "> +\tregmap_write_bits(map, tdev->data->block_base + PVTCTLEN,\n" - "> +\t\t\t\302\240\302\240PVTCTLEN_EN, 0);\n" + "> +\t\t\t??PVTCTLEN_EN, 0);\n" "> +\n" "> +\tusleep_range(1000, 2000);\t/* The spec note says at\n" "> least 1ms */\n" @@ -326,7 +317,7 @@ "> +\n" "> +\t/* clear alert interrupt */\n" "> +\tregmap_write_bits(tdev->regmap,\n" - "> +\t\t\t\302\240\302\240tdev->data->map_base + PMALERTINTCTL,\n" + "> +\t\t\t??tdev->data->map_base + PMALERTINTCTL,\n" "> mask, bits);\n" "> +}\n" "> +\n" @@ -421,7 +412,7 @@ "> +\t/* set alert temperatures */\n" "> +\tfor (i = 0; i < ntrips; i++) {\n" "> +\t\tif (trips[i].type == THERMAL_TRIP_CRITICAL &&\n" - "> +\t\t\302\240\302\240\302\240\302\240trips[i].temperature < crit_temp)\n" + "> +\t\t????trips[i].temperature < crit_temp)\n" "> +\t\t\tcrit_temp = trips[i].temperature;\n" "> +\t\tuniphier_tm_set_alert(tdev, i,\n" "> trips[i].temperature);\n" @@ -450,25 +441,25 @@ "> +}\n" "> +\n" "> +static const struct uniphier_tm_soc_data uniphier_pxs2_tm_data = {\n" - "> +\t.map_base\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240= 0xe000,\n" - "> +\t.block_base\302\240\302\240\302\240\302\240\302\240\302\240= 0xe000,\n" + "> +\t.map_base????????= 0xe000,\n" + "> +\t.block_base??????= 0xe000,\n" "> +\t.tmod_setup_addr = 0xe904,\n" "> +};\n" "> +\n" "> +static const struct uniphier_tm_soc_data uniphier_ld20_tm_data = {\n" - "> +\t.map_base\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240= 0xe000,\n" - "> +\t.block_base\302\240\302\240\302\240\302\240\302\240\302\240= 0xe800,\n" + "> +\t.map_base????????= 0xe000,\n" + "> +\t.block_base??????= 0xe800,\n" "> +\t.tmod_setup_addr = 0xe938,\n" "> +};\n" "> +\n" "> +static const struct of_device_id uniphier_tm_dt_ids[] = {\n" "> +\t{\n" "> +\t\t.compatible = \"socionext,uniphier-pxs2-thermal\",\n" - "> +\t\t.data\302\240\302\240\302\240\302\240\302\240\302\240\302\240= &uniphier_pxs2_tm_data,\n" + "> +\t\t.data???????= &uniphier_pxs2_tm_data,\n" "> +\t},\n" "> +\t{\n" "> +\t\t.compatible = \"socionext,uniphier-ld20-thermal\",\n" - "> +\t\t.data\302\240\302\240\302\240\302\240\302\240\302\240\302\240= &uniphier_ld20_tm_data,\n" + "> +\t\t.data???????= &uniphier_ld20_tm_data,\n" "> +\t},\n" "> +\t{ /* sentinel */ }\n" "> +};\n" @@ -488,4 +479,4 @@ "> +MODULE_DESCRIPTION(\"UniPhier thermal driver\");\n" "> +MODULE_LICENSE(\"GPL v2\");" -1934c6d0dcc281926c4257cfed2fc2378270ca570975dd8a48497e266a19c9e7 +db11f16158698a7eddfaf0361a30dd291b1d7e203b79879e0295c0929175f037
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