From: Chee, Tien Fong <tien.fong.chee@intel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2 5/5] arm: socfpga: Enable cff driver build
Date: Wed, 9 Aug 2017 04:28:35 +0000 [thread overview]
Message-ID: <1502252913.2162.0.camel@intel.com> (raw)
In-Reply-To: <1b168c18-bfd6-c737-fbb4-e255d0c0483e@denx.de>
On Sel, 2017-08-08 at 11:32 +0200, Marek Vasut wrote:
> On 08/08/2017 11:12 AM, tien.fong.chee at intel.com wrote:
> >
> > From: Tien Fong Chee <tien.fong.chee@intel.com>
> >
> > Enable cff driver build which is needed as intermediate driver for
> > handling
> > operation of FPGA program between feeding FPGA design from flash
> > into FPGA
> > manager.
> >
> > Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
> > ---
> > arch/arm/mach-socfpga/Makefile | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm/mach-socfpga/Makefile b/arch/arm/mach-
> > socfpga/Makefile
> > index 286bfef..23fb322 100644
> > --- a/arch/arm/mach-socfpga/Makefile
> > +++ b/arch/arm/mach-socfpga/Makefile
> > @@ -28,6 +28,7 @@ obj-y += clock_manager_arria10.o
> > obj-y += misc_arria10.o
> > obj-y += pinmux_arria10.o
> > obj-y += reset_manager_arria10.o
> > +obj-y += cff.o
> Keep the list sorted ...
>
Okay.
> >
> > endif
> >
> > ifdef CONFIG_SPL_BUILD
> >
>
prev parent reply other threads:[~2017-08-09 4:28 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-08 9:12 [U-Boot] [PATCH v2 0/5] Add flash to fpga intermediate driver tien.fong.chee at intel.com
2017-08-08 9:12 ` [U-Boot] [PATCH v2 1/5] arm: socfpga: Make spl_boot_device accessible to U-boot tien.fong.chee at intel.com
2017-08-08 9:12 ` [U-Boot] [PATCH v2 2/5] arm: socfpga: Add checking function on FPGA setting in FDT tien.fong.chee at intel.com
2017-08-08 9:29 ` Marek Vasut
2017-08-09 5:07 ` Chee, Tien Fong
2017-08-09 8:20 ` Marek Vasut
2017-08-10 4:51 ` Chee, Tien Fong
2017-08-11 15:01 ` Marek Vasut
2017-08-12 8:05 ` Chee, Tien Fong
2017-08-12 16:43 ` Marek Vasut
2017-08-08 9:12 ` [U-Boot] [PATCH v2 3/5] configs: Add FPGA loadfs config for Arria 10 tien.fong.chee at intel.com
2017-08-08 9:12 ` [U-Boot] [PATCH v2 4/5] arm: socfpga: Add intermediate driver between flash and FPGA manager tien.fong.chee at intel.com
2017-08-08 9:32 ` Marek Vasut
2017-08-08 10:06 ` Chee, Tien Fong
2017-08-08 10:11 ` Marek Vasut
2017-08-09 4:50 ` Chee, Tien Fong
2017-08-09 8:29 ` Marek Vasut
2017-08-10 4:43 ` Chee, Tien Fong
2017-08-11 15:09 ` Marek Vasut
2017-08-12 8:03 ` Chee, Tien Fong
2017-08-12 16:49 ` Marek Vasut
2017-08-14 3:58 ` Chee, Tien Fong
2017-08-15 9:47 ` Marek Vasut
2017-08-08 9:12 ` [U-Boot] [PATCH v2 5/5] arm: socfpga: Enable cff driver build tien.fong.chee at intel.com
2017-08-08 9:32 ` Marek Vasut
2017-08-09 4:28 ` Chee, Tien Fong [this message]
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