From: Chao Peng <chao.p.peng@linux.intel.com>
To: Yi Sun <yi.y.sun@linux.intel.com>, xen-devel@lists.xenproject.org
Cc: kevin.tian@intel.com, wei.liu2@citrix.com,
andrew.cooper3@citrix.com, dario.faggioli@citrix.com,
ian.jackson@eu.citrix.com, julien.grall@arm.com,
mengxu@cis.upenn.edu, jbeulich@suse.com, roger.pau@citrix.com
Subject: Re: [PATCH v1 01/13] docs: create Memory Bandwidth Allocation (MBA) feature document
Date: Mon, 14 Aug 2017 15:35:38 +0800 [thread overview]
Message-ID: <1502696138.3039.19.camel@linux.intel.com> (raw)
In-Reply-To: <1502264512-4648-2-git-send-email-yi.y.sun@linux.intel.com>
> + Linear mode: the input precision is defined as 100-(MBA_MAX).
> For instance,
> + if the MBA_MAX value is 90, the input precision is 10%. Values
> not an even
> + multiple of the precision (e.g., 12%) will be rounded down
> (e.g., to 10%
> + delay applied) by HW automatically.
No sure if all people unterstand HW, if not then I prefer Hardware. If
you do this then all places though the document should be replaced.
> + When context switch happens, the COS ID of VCPU is written to per-
> thread MSR
COS ID is per-domain other than per-vCPU at this time. So 'COS ID of
domain' is more accurate.
> + `IA32_PQR_ASSOC`, and then hardware enforces bandwidth allocation
> according
> + to the throttling value stored in the COS register.
There is no COS register in fact. COS exists just a concept.
> +For example:
> + root@:~$ xl psr-hwinfo --mba
> + Memory Bandwidth Allocation (MBA):
> + Socket ID : 0
> + Linear Mode : Enabled
> + Maximum COS : 7
> + Maximum Throttling Value: 90
> + Default Throttling Value: 0
> +
> + root@:~$ xl psr-mba-set 1 0xa
> +
> + root@:~$ xl psr-mba-show 1
> + Socket ID : 0
> + Default THRTL : 0
> + ID NAME THRTL
> + 1 ubuntu14 0xa
> +
> +# Areas for improvement
> +
> +A hexadecimal number is used to show THRTL for a domain now. It may
> not be user-
> +friendly.
> +
> +To improve this, the libxl interfaces can be wrapped in libvirt to
> provide more
> +usr-friendly interfaces to user, e.g. a percentage number to show for
> linear
> +mode.
I suggest we can do this even for 'xl psr-mba-show', as we know we are
in linear mode or not. A hex number is just not easy to understand for
people. And for 'xl psr-mba-set' it is also much straighforward to set a
percentage number in linear mode.
Chao
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
next prev parent reply other threads:[~2017-08-14 7:35 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-09 7:41 [PATCH v1 00/13] Enable Memory Bandwidth Allocation in Xen Yi Sun
2017-08-09 7:41 ` [PATCH v1 01/13] docs: create Memory Bandwidth Allocation (MBA) feature document Yi Sun
2017-08-14 7:35 ` Chao Peng [this message]
2017-08-14 8:23 ` Yi Sun
2017-08-14 9:36 ` Chao Peng
2017-08-15 10:08 ` Wei Liu
2017-08-16 2:51 ` Yi Sun
2017-08-09 7:41 ` [PATCH v1 02/13] Rename PSR sysctl/domctl interfaces and xsm policy to make them be general Yi Sun
2017-08-15 10:12 ` Wei Liu
2017-08-16 2:48 ` Yi Sun
2017-08-15 14:03 ` Daniel De Graaf
2017-08-09 7:41 ` [PATCH v1 03/13] x86: rename 'cbm_type' to 'psr_val_type' to make it general Yi Sun
2017-08-15 10:13 ` Wei Liu
2017-08-16 2:17 ` Chao Peng
2017-08-09 7:41 ` [PATCH v1 04/13] x86: implement data structure and CPU init flow for MBA Yi Sun
2017-08-15 10:50 ` Wei Liu
2017-08-16 7:18 ` Yi Sun
2017-08-17 9:49 ` Wei Liu
2017-08-16 3:14 ` Chao Peng
2017-08-09 7:41 ` [PATCH v1 05/13] x86: implement get hw info " Yi Sun
2017-08-16 3:23 ` Chao Peng
2017-08-09 7:41 ` [PATCH v1 06/13] x86: implement get value interface " Yi Sun
2017-08-16 6:38 ` Chao Peng
2017-08-16 6:43 ` Yi Sun
2017-08-17 7:51 ` Chao Peng
2017-08-09 7:41 ` [PATCH v1 07/13] x86: implement set value flow " Yi Sun
2017-08-18 3:32 ` Chao Peng
2017-08-18 9:25 ` Yi Sun
2017-08-21 7:54 ` Chao Peng
2017-08-09 7:41 ` [PATCH v1 08/13] tools: create general interfaces to support psr allocation features Yi Sun
2017-08-21 10:12 ` Chao Peng
2017-08-22 2:38 ` Yi Sun
2017-08-22 6:42 ` Chao Peng
2017-08-09 7:41 ` [PATCH v1 09/13] tools: implement the new get hw info interface suitable to all " Yi Sun
2017-08-15 11:14 ` Wei Liu
2017-08-21 10:13 ` Chao Peng
2017-08-22 2:38 ` Yi Sun
2017-08-09 7:41 ` [PATCH v1 10/13] tools: rename 'xc_psr_cat_type' to 'xc_psr_val_type' Yi Sun
2017-08-15 11:15 ` Wei Liu
2017-08-21 10:13 ` Chao Peng
2017-08-09 7:41 ` [PATCH v1 11/13] tools: implemet new get value interface suitable for all psr allocation features Yi Sun
2017-08-15 11:24 ` Wei Liu
2017-08-21 10:14 ` Chao Peng
2017-08-22 2:24 ` Yi Sun
2017-08-22 6:44 ` Chao Peng
2017-08-09 7:41 ` [PATCH v1 12/13] tools: implemet new set " Yi Sun
2017-08-15 11:25 ` Wei Liu
2017-08-21 10:15 ` Chao Peng
2017-08-09 7:41 ` [PATCH v1 13/13] docs: add MBA description in docs Yi Sun
2017-08-15 11:26 ` Wei Liu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1502696138.3039.19.camel@linux.intel.com \
--to=chao.p.peng@linux.intel.com \
--cc=andrew.cooper3@citrix.com \
--cc=dario.faggioli@citrix.com \
--cc=ian.jackson@eu.citrix.com \
--cc=jbeulich@suse.com \
--cc=julien.grall@arm.com \
--cc=kevin.tian@intel.com \
--cc=mengxu@cis.upenn.edu \
--cc=roger.pau@citrix.com \
--cc=wei.liu2@citrix.com \
--cc=xen-devel@lists.xenproject.org \
--cc=yi.y.sun@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.