From: Abhishek Sahu <absahu@codeaurora.org>
To: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
Marek Vasut <marek.vasut@gmail.com>,
Richard Weinberger <richard@nod.at>,
Cyrille Pitchen <cyrille.pitchen@wedev4u.fr>,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mtd@lists.infradead.org, Andy Gross <andy.gross@linaro.org>,
Archit Taneja <architt@codeaurora.org>,
Sricharan R <sricharan@codeaurora.org>,
Abhishek Sahu <absahu@codeaurora.org>
Subject: [PATCH v5 16/16] mtd: nand: qcom: Support for IPQ8074 QPIC NAND controller
Date: Thu, 17 Aug 2017 17:37:54 +0530 [thread overview]
Message-ID: <1502971674-13810-17-git-send-email-absahu@codeaurora.org> (raw)
In-Reply-To: <1502971674-13810-1-git-send-email-absahu@codeaurora.org>
Add the compatible string for IPQ8074 QPIC NAND controller
version 1.5.0 which uses BAM DMA and its FLASH_DEV_CMD registers
starting offset is 0x7000.
Reviewed-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
---
* Changes from v4: None
drivers/mtd/nand/qcom_nandc.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/mtd/nand/qcom_nandc.c b/drivers/mtd/nand/qcom_nandc.c
index 84fcdb3..97ce16a 100644
--- a/drivers/mtd/nand/qcom_nandc.c
+++ b/drivers/mtd/nand/qcom_nandc.c
@@ -2872,6 +2872,12 @@ static int qcom_nandc_remove(struct platform_device *pdev)
.dev_cmd_reg_start = 0x0,
};
+static const struct qcom_nandc_props ipq8074_nandc_props = {
+ .ecc_modes = (ECC_BCH_4BIT | ECC_BCH_8BIT),
+ .is_bam = true,
+ .dev_cmd_reg_start = 0x7000,
+};
+
/*
* data will hold a struct pointer containing more differences once we support
* more controller variants
@@ -2885,6 +2891,10 @@ static int qcom_nandc_remove(struct platform_device *pdev)
.compatible = "qcom,ipq4019-nand",
.data = &ipq4019_nandc_props,
},
+ {
+ .compatible = "qcom,ipq8074-nand",
+ .data = &ipq8074_nandc_props,
+ },
{}
};
MODULE_DEVICE_TABLE(of, qcom_nandc_of_match);
--
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
next prev parent reply other threads:[~2017-08-17 12:07 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-17 12:07 [PATCH v5 00/16] Add QCOM QPIC NAND support Abhishek Sahu
2017-08-17 12:07 ` [PATCH v5 01/16] mtd: nand: qcom: DMA mapping support for register read buffer Abhishek Sahu
2017-08-17 12:07 ` [PATCH v5 02/16] mtd: nand: qcom: allocate BAM transaction Abhishek Sahu
2017-08-17 12:07 ` [PATCH v5 03/16] mtd: nand: qcom: add BAM DMA descriptor handling Abhishek Sahu
2017-08-17 12:07 ` [PATCH v5 04/16] mtd: nand: qcom: support for passing flags in DMA helper functions Abhishek Sahu
2017-08-17 12:07 ` Abhishek Sahu
2017-08-17 12:07 ` [PATCH v5 05/16] mtd: nand: qcom: support for read location registers Abhishek Sahu
2017-08-17 12:07 ` [PATCH v5 06/16] mtd: nand: qcom: erased codeword detection configuration Abhishek Sahu
2017-08-17 12:07 ` [PATCH v5 07/16] mtd: nand: qcom: enable BAM or ADM mode Abhishek Sahu
2017-08-17 12:07 ` [PATCH v5 08/16] mtd: nand: qcom: QPIC data descriptors handling Abhishek Sahu
2017-08-17 12:07 ` [PATCH v5 09/16] mtd: nand: qcom: support for different DEV_CMD register offsets Abhishek Sahu
2017-08-17 12:07 ` [PATCH v5 10/16] mtd: nand: qcom: add command elements in BAM transaction Abhishek Sahu
2017-08-19 9:32 ` Abhishek Sahu
2017-08-17 12:07 ` [PATCH v5 11/16] mtd: nand: qcom: support for command descriptor formation Abhishek Sahu
2017-08-19 9:47 ` Abhishek Sahu
2017-08-19 20:38 ` Boris Brezillon
2017-08-17 12:07 ` [PATCH v5 12/16] dt-bindings: qcom_nandc: fix the ipq806x device tree example Abhishek Sahu
2017-08-17 12:07 ` [PATCH v5 13/16] dt-bindings: qcom_nandc: IPQ4019 QPIC NAND documentation Abhishek Sahu
2017-08-17 12:07 ` [PATCH v5 14/16] dt-bindings: qcom_nandc: IPQ8074 " Abhishek Sahu
[not found] ` <1502971674-13810-15-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-08-22 2:21 ` Rob Herring
2017-08-22 2:21 ` Rob Herring
2017-08-17 12:07 ` [PATCH v5 15/16] mtd: nand: qcom: support for IPQ4019 QPIC NAND controller Abhishek Sahu
2017-08-17 12:07 ` Abhishek Sahu [this message]
2017-08-21 20:15 ` [PATCH v5 00/16] Add QCOM QPIC NAND support Boris Brezillon
2017-08-22 6:32 ` Abhishek Sahu
2017-09-25 8:09 ` Abhishek Sahu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1502971674-13810-17-git-send-email-absahu@codeaurora.org \
--to=absahu@codeaurora.org \
--cc=andy.gross@linaro.org \
--cc=architt@codeaurora.org \
--cc=boris.brezillon@free-electrons.com \
--cc=computersforpeace@gmail.com \
--cc=cyrille.pitchen@wedev4u.fr \
--cc=dwmw2@infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=marek.vasut@gmail.com \
--cc=richard@nod.at \
--cc=sricharan@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.