From: Michael Neuling <mikey@neuling.org>
To: Paul Mackerras <paulus@ozlabs.org>, linuxppc-dev@ozlabs.org
Subject: Re: [PATCH RFC 2/7] powerpc: Change analyse_instr so it doesn't modify *regs
Date: Wed, 23 Aug 2017 19:23:54 +1000 [thread overview]
Message-ID: <1503480234.25055.20.camel@neuling.org> (raw)
In-Reply-To: <1503445683-12011-3-git-send-email-paulus@ozlabs.org>
On Wed, 2017-08-23 at 09:47 +1000, Paul Mackerras wrote:
> The analyse_instr function currently doesn't just work out what an
> instruction does, it also executes those instructions whose effect
> is only to update CPU registers that are stored in struct pt_regs.
> This is undesirable because optprobes uses analyse_instr to work out
> if an instruction could be successfully emulated in future.
>=20
> This changes analyse_instr so it doesn't modify *regs; instead it
> stores information in the instruction_op structure to indicate what
> registers (GPRs, CR, XER, LR) would be set and what value they would
> be set to.=C2=A0=C2=A0A companion function called emulate_update_regs() c=
an
> then use that information to update a pt_regs struct appropriately.
>=20
> As a minor cleanup, this replaces inline asm using the cntlzw and
> cntlzd instructions with calls to __builtin_clz() and __builtin_clzl().
+1 ! This is super useful!
As mentioned offline, this clashes with the recent changes to sstep.c in po=
werpc
next. In fact, the new instructions added there need to have these changes
applied.
Mikey
next prev parent reply other threads:[~2017-08-23 9:23 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-22 23:47 [PATCH RFC 0/7] powerpc: Beef up single-stepping/instruction emulation infrastructure Paul Mackerras
2017-08-22 23:47 ` [PATCH RFC 1/7] powerpc: Extend instruction " Paul Mackerras
2017-08-22 23:47 ` [PATCH RFC 2/7] powerpc: Change analyse_instr so it doesn't modify *regs Paul Mackerras
2017-08-23 9:23 ` Michael Neuling [this message]
2017-08-22 23:47 ` [PATCH RFC 3/7] powerpc: Make load/store emulation use larger memory accesses Paul Mackerras
2017-08-22 23:48 ` [PATCH RFC 4/7] powerpc: Emulate FP/vector/VSX loads/stores correctly when regs not live Paul Mackerras
2017-08-22 23:48 ` [PATCH RFC 5/7] powerpc: Handle vector element load/stores in emulation code Paul Mackerras
2017-08-22 23:48 ` [PATCH RFC 6/7] powerpc: Emulate load/store floating double pair instructions Paul Mackerras
2017-08-22 23:48 ` [PATCH RFC 7/7] powerpc: Handle opposite-endian processes in emulation code Paul Mackerras
2017-08-23 9:27 ` [PATCH RFC 0/7] powerpc: Beef up single-stepping/instruction emulation infrastructure Michael Neuling
2017-08-23 11:42 ` Michael Ellerman
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1503480234.25055.20.camel@neuling.org \
--to=mikey@neuling.org \
--cc=linuxppc-dev@ozlabs.org \
--cc=paulus@ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.