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From: <gregkh@linuxfoundation.org>
To: kuninori.morimoto.gx@renesas.com, broonie@kernel.org,
	gregkh@linuxfoundation.org, nhan.nguyen.yb@renesas.com,
	thong.ho.px@rvc.renesas.com
Cc: <stable@vger.kernel.org>, <stable-commits@vger.kernel.org>
Subject: Patch "ASoC: rsnd: ssi: 24bit data needs right-aligned settings" has been added to the 4.4-stable tree
Date: Mon, 28 Aug 2017 09:01:36 +0200	[thread overview]
Message-ID: <150390369657223@kroah.com> (raw)


This is a note to let you know that I've just added the patch titled

    ASoC: rsnd: ssi: 24bit data needs right-aligned settings

to the 4.4-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     asoc-rsnd-ssi-24bit-data-needs-right-aligned-settings.patch
and it can be found in the queue-4.4 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


>From f46a93b820eb3707faf238cd769a004e2504515f Mon Sep 17 00:00:00 2001
From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Date: Tue, 17 Nov 2015 08:28:11 +0000
Subject: ASoC: rsnd: ssi: 24bit data needs right-aligned settings

From: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>

commit f46a93b820eb3707faf238cd769a004e2504515f upstream.

Data left/right aligned is controlled by PDTA bit on SSICR.
But default is left-aligned. Thus 24bit sound will be very small sound
without this patch.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Thong Ho <thong.ho.px@rvc.renesas.com>
Signed-off-by: Nhan Nguyen <nhan.nguyen.yb@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

---
 sound/soc/sh/rcar/ssi.c |    3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

--- a/sound/soc/sh/rcar/ssi.c
+++ b/sound/soc/sh/rcar/ssi.c
@@ -39,6 +39,7 @@
 #define	SCKP		(1 << 13)	/* Serial Bit Clock Polarity */
 #define	SWSP		(1 << 12)	/* Serial WS Polarity */
 #define	SDTA		(1 << 10)	/* Serial Data Alignment */
+#define	PDTA		(1 <<  9)	/* Parallel Data Alignment */
 #define	DEL		(1 <<  8)	/* Serial Data Delay */
 #define	CKDV(v)		(v <<  4)	/* Serial Clock Division Ratio */
 #define	TRMD		(1 <<  1)	/* Transmit/Receive Mode Select */
@@ -286,7 +287,7 @@ static int rsnd_ssi_init(struct rsnd_mod
 	struct snd_pcm_runtime *runtime = rsnd_io_to_runtime(io);
 	u32 cr;
 
-	cr = FORCE;
+	cr = FORCE | PDTA;
 
 	/*
 	 * always use 32bit system word for easy clock calculation.


Patches currently in stable-queue which might be from kuninori.morimoto.gx@renesas.com are

queue-4.4/asoc-rsnd-add-missing-initialization-of-adg-req_rate.patch
queue-4.4/asoc-rsnd-avoid-pointless-loop-in-rsnd_mod_interrupt.patch
queue-4.4/asoc-rsnd-disable-src.out-only-when-stop-timing.patch
queue-4.4/asoc-rsnd-don-t-call-update-callback-if-it-was-null.patch
queue-4.4/asoc-rsnd-ssi-24bit-data-needs-right-aligned-settings.patch

                 reply	other threads:[~2017-08-28  7:01 UTC|newest]

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