From mboxrd@z Thu Jan 1 00:00:00 1970 From: embed3d@gmail.com (Philipp Rossak) Date: Fri, 1 Sep 2017 18:30:00 +0200 Subject: [PATCH v2 1/2] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus In-Reply-To: <1504283401-4263-1-git-send-email-embed3d@gmail.com> References: <1504283401-4263-1-git-send-email-embed3d@gmail.com> Message-ID: <1504283401-4263-2-git-send-email-embed3d@gmail.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org From: Philipp Rossak The WiFi side of the AP6212 WiFi/BT combo module is connected to mmc1. There are also GPIOs for enable and interrupts. Enable WiFi on this board by enabling mmc1 and adding the power sequencing clocks and GPIO, as well as the chip's interrupt line. Signed-off-by: Philipp Rossak --- arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts index 6256f55..7d18c35 100644 --- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts @@ -48,6 +48,13 @@ aliases { serial1 = &uart3; + ethernet1 = &sdio_wifi; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ }; }; @@ -65,6 +72,24 @@ status = "okay"; }; +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_vcc3v3>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + sdio_wifi: sdio_wifi at 1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + interrupt-parent = <&pio>; + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ + interrupt-names = "host-wake"; + }; +}; + &ohci1 { status = "okay"; }; -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Philipp Rossak Subject: [PATCH v2 1/2] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus Date: Fri, 1 Sep 2017 18:30:00 +0200 Message-ID: <1504283401-4263-2-git-send-email-embed3d@gmail.com> References: <1504283401-4263-1-git-send-email-embed3d@gmail.com> Reply-To: embed3d-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <1504283401-4263-1-git-send-email-embed3d-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org, maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org, wens-jdAy2FN1RRM@public.gmane.org Cc: Philipp Rossak , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org From: Philipp Rossak The WiFi side of the AP6212 WiFi/BT combo module is connected to mmc1. There are also GPIOs for enable and interrupts. Enable WiFi on this board by enabling mmc1 and adding the power sequencing clocks and GPIO, as well as the chip's interrupt line. Signed-off-by: Philipp Rossak --- arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts index 6256f55..7d18c35 100644 --- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts @@ -48,6 +48,13 @@ aliases { serial1 = &uart3; + ethernet1 = &sdio_wifi; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ }; }; @@ -65,6 +72,24 @@ status = "okay"; }; +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_vcc3v3>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + sdio_wifi: sdio_wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + interrupt-parent = <&pio>; + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ + interrupt-names = "host-wake"; + }; +}; + &ohci1 { status = "okay"; }; -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752173AbdIAQaj (ORCPT ); Fri, 1 Sep 2017 12:30:39 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:35643 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751973AbdIAQag (ORCPT ); Fri, 1 Sep 2017 12:30:36 -0400 X-Google-Smtp-Source: ADKCNb4qlIiQMORAtrmeRzj8DXWSa6tQLWG+3sX+SDqTFiV3y3eltlwVDAWsldskHVcX9hOZaJc4KQ== From: Philipp Rossak X-Google-Original-From: Philipp Rossak < embed3d@gmail.com > To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, maxime.ripard@free-electrons.com, wens@csie.org Cc: Philipp Rossak , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: [PATCH v2 1/2] ARM: dts: sun8i: h3: Enable AP6212 WiFi on mmc1 on Nanopi M1 Plus Date: Fri, 1 Sep 2017 18:30:00 +0200 Message-Id: <1504283401-4263-2-git-send-email-embed3d@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1504283401-4263-1-git-send-email-embed3d@gmail.com> References: <1504283401-4263-1-git-send-email-embed3d@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Philipp Rossak The WiFi side of the AP6212 WiFi/BT combo module is connected to mmc1. There are also GPIOs for enable and interrupts. Enable WiFi on this board by enabling mmc1 and adding the power sequencing clocks and GPIO, as well as the chip's interrupt line. Signed-off-by: Philipp Rossak --- arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts index 6256f55..7d18c35 100644 --- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts @@ -48,6 +48,13 @@ aliases { serial1 = &uart3; + ethernet1 = &sdio_wifi; + }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + pinctrl-names = "default"; + reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ }; }; @@ -65,6 +72,24 @@ status = "okay"; }; +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins_a>; + vmmc-supply = <®_vcc3v3>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + sdio_wifi: sdio_wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + interrupt-parent = <&pio>; + interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ + interrupt-names = "host-wake"; + }; +}; + &ohci1 { status = "okay"; }; -- 2.7.4