diff for duplicates of <1504714938.3829.40.camel@synopsys.com> diff --git a/a/content_digest b/N1/content_digest index bcff0cf..3e6b6f7 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,18 +3,17 @@ "ref\0b8f7f407-303a-2f3c-1a16-bfb385204930@synopsys.com\0" "ref\01504705881.3829.19.camel@synopsys.com\0" "ref\0CAL_Jsq+B74keQ3N=8x6jx1URkLq8fa9gwsc5JAuiV86Wwczi9Q@mail.gmail.com\0" - "ref\0CAL_Jsq+B74keQ3N=8x6jx1URkLq8fa9gwsc5JAuiV86Wwczi9Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Alexey Brodkin <Alexey.Brodkin-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>\0" + "From\0Alexey Brodkin <Alexey.Brodkin@synopsys.com>\0" "Subject\0Re: Setting CPU clock frequency on early boot\0" "Date\0Wed, 6 Sep 2017 16:22:18 +0000\0" - "To\0robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0" - "Cc\0linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>" - Vineet.Gupta1-HKixBCOQz3hWk0Htik3J/w@public.gmane.org <Vineet.Gupta1-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> - linux-arch-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-arch-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org <mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> - sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> - linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>\0" + "To\0robh@kernel.org <robh@kernel.org>\0" + "Cc\0linux-snps-arc@lists.infradead.org <linux-snps-arc@lists.infradead.org>" + Vineet.Gupta1@synopsys.com <Vineet.Gupta1@synopsys.com> + linux-arch@vger.kernel.org <linux-arch@vger.kernel.org> + mturquette@baylibre.com <mturquette@baylibre.com> + sboyd@codeaurora.org <sboyd@codeaurora.org> + linux-clk@vger.kernel.org <linux-clk@vger.kernel.org> + " devicetree@vger.kernel.org <devicetree@vger.kernel.org>\0" "\00:1\0" "b\0" "Hi Rob,\n" @@ -125,4 +124,4 @@ "\n" -Alexey -94d510ae9a22f07d72b0011f2704c388e720a6bffecfc44d0b64b171843ab129 +26e348256cc954e23c244a6666d0d3c959a5601742c76dfb1384b8d5015d8055
diff --git a/a/1.txt b/N2/1.txt index 2b51568..b0c03a9 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,107 +1,66 @@ -Hi Rob, - -On Wed, 2017-09-06 at 10:25 -0500, Rob Herring wrote: -> On Wed, Sep 6, 2017 at 8:51 AM, Alexey Brodkin -> <Alexey.Brodkin@synopsys.com> wrote: -> > -> > Hi Vineet, Rob, -> > -> > On Tue, 2017-09-05 at 16:40 -0700, Vineet Gupta wrote: -> > > -> > > On 09/05/2017 03:04 PM, Rob Herring wrote: -> > > > -> > > > -> > > > On Tue, Sep 5, 2017 at 10:37 AM, Alexey Brodkin -> > > > <Alexey.Brodkin@synopsys.com> wrote: - -[snip] - -> > Yeah, that's an interesting question. We may indeed move more smarts to the clock driver -> > but: -> > 1. We'll have duplicate code in different clock drivers. Even today that kind of clock -> > setup is applicable to AXS10x and HSDK platforms (and they use different clock drivers). -> -> No, you could provide a common, shared function to call. Then each -> platform can opt-in. If you can make something that applies to every -> single platform now or in the future, then I'd put it in arch. If you -> have plans to decouple the timer and cpu clocks, then sounds like you -> can't. - -Right so we'll implement a function which is called by a platform if required. -That way we escape copy-pasting while keeping enough flexibility for current -and future platforms. - -> IMO, if it's not part of the defined CPU architecture, then don't put -> it in arch/. That's how we end up with multiple copies of the same -> thing done arbitrarily different ways because few people look across -> architectures. - -So do you propose to have the function [that reads "clock-frequency" from say -CPU node and passes its value to CPU's parent clock driver] in generic -[i.e. architecture agnostic] code somewhere in "init/main.c"? - -> > -> > 2. Print out of CPU frequency which is used during boot process for us is important as well -> > especially during bring-up of new HW. -> > -> > 3. If there's no dedicated "clock-frequency" parameter in CPU node we won't -> > change anything so that non-affected platforms will live as they used to. -> > -> > That said IMHO proposed implementation is what we want to kep for now. -> > -> > > -> > > Also note that this code is using a new / adhoc DT binding cpu-freq in cou node to -> > > do the override - is that acceptable ? -> -> No, I meant to point that out. - -Sorry, but for me it's not clear what did you mean here. -Care to elaborate a bit more? - -> > I think we'll switch to more common "clock-frequency" in the next respin. -> > Indeed "cpu-freq" might be a bit misleading. -> -> Ideally, you'd use the clock binding eventually. - -Again I'm probably missing something :) - -I meant we will have both clock phandle and "clock-frequency" at the same time. -Something like this: --------------------------------->8--------------------------- - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - device_type = "cpu"; - compatible = "snps,archs38"; - reg = <0>; - clocks = <&core_clk>; - clock-frequency = <100000000>; <-- That's where we want to set desired value - }; - ... - } - - core_clk: core-clk@80 { - compatible = "snps,axs10x-arc-pll-clock"; - reg = <0x80 0x10>, <0x100 0x10>; - #clock-cells = <0>; - clocks = <&input_clk>; - }; --------------------------------->8--------------------------- - -Or alternatively we may move "clock-frequency" right to the clock's node and have -it like that: --------------------------------->8--------------------------- - core_clk: core-clk@80 { - compatible = "snps,axs10x-arc-pll-clock"; - reg = <0x80 0x10>, <0x100 0x10>; - -#clock-cells = <0>; - clocks = <&input_clk>; - clock-frequency = <100000000>; <-- That's where we want to set desired value - -}; --------------------------------->8--------------------------- - --Alexey +SGkgUm9iLA0KDQpPbiBXZWQsIDIwMTctMDktMDYgYXQgMTA6MjUgLTA1MDAsIFJvYiBIZXJyaW5n +IHdyb3RlOg0KPiBPbiBXZWQsIFNlcCA2LCAyMDE3IGF0IDg6NTEgQU0sIEFsZXhleSBCcm9ka2lu +DQo+IDxBbGV4ZXkuQnJvZGtpbkBzeW5vcHN5cy5jb20+IHdyb3RlOg0KPiA+IA0KPiA+IEhpIFZp +bmVldCwgUm9iLA0KPiA+IA0KPiA+IE9uIFR1ZSwgMjAxNy0wOS0wNSBhdCAxNjo0MCAtMDcwMCwg +VmluZWV0IEd1cHRhIHdyb3RlOg0KPiA+ID4gDQo+ID4gPiBPbiAwOS8wNS8yMDE3IDAzOjA0IFBN +LCBSb2IgSGVycmluZyB3cm90ZToNCj4gPiA+ID4gDQo+ID4gPiA+IA0KPiA+ID4gPiBPbiBUdWUs +IFNlcCA1LCAyMDE3IGF0IDEwOjM3IEFNLCBBbGV4ZXkgQnJvZGtpbg0KPiA+ID4gPiA8QWxleGV5 +LkJyb2RraW5Ac3lub3BzeXMuY29tPiB3cm90ZToNCg0KW3NuaXBdDQoNCj4gPiBZZWFoLCB0aGF0 +J3MgYW4gaW50ZXJlc3RpbmcgcXVlc3Rpb24uIFdlIG1heSBpbmRlZWQgbW92ZSBtb3JlIHNtYXJ0 +cyB0byB0aGUgY2xvY2sgZHJpdmVyDQo+ID4gYnV0Og0KPiA+IMKgMS4gV2UnbGwgaGF2ZSBkdXBs +aWNhdGUgY29kZSBpbiBkaWZmZXJlbnQgY2xvY2sgZHJpdmVycy4gRXZlbiB0b2RheSB0aGF0IGtp +bmQgb2YgY2xvY2sNCj4gPiDCoMKgwqDCoHNldHVwIGlzIGFwcGxpY2FibGUgdG8gQVhTMTB4IGFu +ZCBIU0RLIHBsYXRmb3JtcyAoYW5kIHRoZXkgdXNlIGRpZmZlcmVudCBjbG9jayBkcml2ZXJzKS4N +Cj4gDQo+IE5vLCB5b3UgY291bGQgcHJvdmlkZSBhIGNvbW1vbiwgc2hhcmVkIGZ1bmN0aW9uIHRv +IGNhbGwuIFRoZW4gZWFjaA0KPiBwbGF0Zm9ybSBjYW4gb3B0LWluLiBJZiB5b3UgY2FuIG1ha2Ug +c29tZXRoaW5nIHRoYXQgYXBwbGllcyB0byBldmVyeQ0KPiBzaW5nbGUgcGxhdGZvcm0gbm93IG9y +IGluIHRoZSBmdXR1cmUsIHRoZW4gSSdkIHB1dCBpdCBpbiBhcmNoLiBJZiB5b3UNCj4gaGF2ZSBw +bGFucyB0byBkZWNvdXBsZSB0aGUgdGltZXIgYW5kIGNwdSBjbG9ja3MsIHRoZW4gc291bmRzIGxp +a2UgeW91DQo+IGNhbid0Lg0KDQpSaWdodCBzbyB3ZSdsbCBpbXBsZW1lbnQgYSBmdW5jdGlvbiB3 +aGljaCBpcyBjYWxsZWQgYnkgYSBwbGF0Zm9ybSBpZiByZXF1aXJlZC4NClRoYXQgd2F5IHdlIGVz +Y2FwZSBjb3B5LXBhc3Rpbmcgd2hpbGUga2VlcGluZyBlbm91Z2ggZmxleGliaWxpdHkgZm9yIGN1 +cnJlbnQNCmFuZCBmdXR1cmUgcGxhdGZvcm1zLg0KDQo+IElNTywgaWYgaXQncyBub3QgcGFydCBv +ZiB0aGUgZGVmaW5lZCBDUFUgYXJjaGl0ZWN0dXJlLCB0aGVuIGRvbid0IHB1dA0KPiBpdCBpbiBh +cmNoLy4gVGhhdCdzIGhvdyB3ZSBlbmQgdXAgd2l0aCBtdWx0aXBsZSBjb3BpZXMgb2YgdGhlIHNh +bWUNCj4gdGhpbmcgZG9uZSBhcmJpdHJhcmlseSBkaWZmZXJlbnQgd2F5cyBiZWNhdXNlIGZldyBw +ZW9wbGUgbG9vayBhY3Jvc3MNCj4gYXJjaGl0ZWN0dXJlcy4NCg0KU28gZG8geW91IHByb3Bvc2Ug +dG8gaGF2ZSB0aGUgZnVuY3Rpb24gW3RoYXQgcmVhZHMgImNsb2NrLWZyZXF1ZW5jeSIgZnJvbSBz +YXkNCkNQVSBub2RlIGFuZCBwYXNzZXMgaXRzIHZhbHVlIHRvIENQVSdzIHBhcmVudCBjbG9jayBk +cml2ZXJdIGluIGdlbmVyaWMNCltpLmUuIGFyY2hpdGVjdHVyZSBhZ25vc3RpY10gY29kZSBzb21l +d2hlcmUgaW4gImluaXQvbWFpbi5jIj8NCg0KPiA+IA0KPiA+IMKgMi4gUHJpbnQgb3V0IG9mIENQ +VSBmcmVxdWVuY3kgd2hpY2ggaXMgdXNlZCBkdXJpbmcgYm9vdCBwcm9jZXNzIGZvciB1cyBpcyBp +bXBvcnRhbnQgYXMgd2VsbA0KPiA+IMKgwqDCoMKgZXNwZWNpYWxseSBkdXJpbmcgYnJpbmctdXAg +b2YgbmV3IEhXLg0KPiA+IA0KPiA+IMKgMy4gSWYgdGhlcmUncyBubyBkZWRpY2F0ZWQgImNsb2Nr +LWZyZXF1ZW5jeSIgcGFyYW1ldGVyIGluIENQVSBub2RlIHdlIHdvbid0DQo+ID4gwqDCoMKgwqBj +aGFuZ2UgYW55dGhpbmcgc28gdGhhdCBub24tYWZmZWN0ZWQgcGxhdGZvcm1zIHdpbGwgbGl2ZSBh +cyB0aGV5IHVzZWQgdG8uDQo+ID4gDQo+ID4gVGhhdCBzYWlkIElNSE8gcHJvcG9zZWQgaW1wbGVt +ZW50YXRpb24gaXMgd2hhdCB3ZSB3YW50IHRvIGtlcCBmb3Igbm93Lg0KPiA+IA0KPiA+ID4gDQo+ +ID4gPiBBbHNvIG5vdGUgdGhhdCB0aGlzIGNvZGUgaXMgdXNpbmcgYSBuZXcgLyBhZGhvYyBEVCBi +aW5kaW5nIGNwdS1mcmVxIGluIGNvdSBub2RlIHRvDQo+ID4gPiBkbyB0aGUgb3ZlcnJpZGUgLSBp +cyB0aGF0IGFjY2VwdGFibGUgPw0KPiANCj4gTm8sIEkgbWVhbnQgdG8gcG9pbnQgdGhhdCBvdXQu +DQoNClNvcnJ5LCBidXQgZm9yIG1lIGl0J3Mgbm90IGNsZWFyIHdoYXQgZGlkIHlvdSBtZWFuIGhl +cmUuDQpDYXJlIHRvIGVsYWJvcmF0ZSBhIGJpdCBtb3JlPw0KDQo+ID4gSSB0aGluayB3ZSdsbCBz +d2l0Y2ggdG8gbW9yZSBjb21tb24gImNsb2NrLWZyZXF1ZW5jeSIgaW4gdGhlIG5leHQgcmVzcGlu +Lg0KPiA+IEluZGVlZCAiY3B1LWZyZXEiIG1pZ2h0IGJlIGEgYml0IG1pc2xlYWRpbmcuDQo+IA0K +PiBJZGVhbGx5LCB5b3UnZCB1c2UgdGhlIGNsb2NrIGJpbmRpbmcgZXZlbnR1YWxseS4NCg0KQWdh +aW4gSSdtIHByb2JhYmx5IG1pc3Npbmcgc29tZXRoaW5nIDopDQoNCkkgbWVhbnQgd2Ugd2lsbCBo +YXZlIGJvdGggY2xvY2sgcGhhbmRsZSBhbmQgImNsb2NrLWZyZXF1ZW5jeSIgYXQgdGhlIHNhbWUg +dGltZS4NClNvbWV0aGluZyBsaWtlIHRoaXM6DQotLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t +LS0tLT44LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tDQoJY3B1cyB7DQoJCSNhZGRyZXNzLWNl +bGxzID0gPDE+Ow0KCQkjc2l6ZS1jZWxscyA9IDwwPjsNCg0KCQljcHVAMCB7DQoJCQlkZXZpY2Vf +dHlwZSA9ICJjcHUiOw0KCQkJY29tcGF0aWJsZSA9ICJzbnBzLGFyY2hzMzgiOw0KCQkJcmVnID0g +PDA+Ow0KCQkJY2xvY2tzID0gPCZjb3JlX2Nsaz47DQoJCQljbG9jay1mcmVxdWVuY3kgPSA8MTAw +MDAwMDAwPjsgwqA8LS0gVGhhdCdzIHdoZXJlIHdlIHdhbnQgdG8gc2V0IGRlc2lyZWQgdmFsdWUN +CgkJfTsNCgkuLi4NCgl9DQoNCgljb3JlX2NsazogY29yZS1jbGtAODAgew0KCQljb21wYXRpYmxl +ID0gInNucHMsYXhzMTB4LWFyYy1wbGwtY2xvY2siOw0KCQlyZWcgPSA8MHg4MCAweDEwPiwgPDB4 +MTAwIDB4MTA+Ow0KCQkjY2xvY2stY2VsbHMgPSA8MD47DQoJCWNsb2NrcyA9IDwmaW5wdXRfY2xr +PjsNCgl9Ow0KLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0+OC0tLS0tLS0tLS0tLS0t +LS0tLS0tLS0tLS0tLQ0KDQpPciBhbHRlcm5hdGl2ZWx5IHdlIG1heSBtb3ZlICJjbG9jay1mcmVx +dWVuY3kiIHJpZ2h0IHRvIHRoZSBjbG9jaydzIG5vZGUgYW5kIGhhdmUNCml0IGxpa2UgdGhhdDoN +Ci0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tPjgtLS0tLS0tLS0tLS0tLS0tLS0tLS0t +LS0tLS0NCgljb3JlX2NsazrCoGNvcmUtY2xrQDgwwqB7DQoJCWNvbXBhdGlibGUgPSAic25wcyxh +eHMxMHgtYXJjLXBsbC1jbG9jayI7DQoJCXJlZyA9IDwweDgwIDB4MTA+LCA8MHgxMDAgMHgxMD47 +DQoJCQ0KI2Nsb2NrLWNlbGxzID0gPDA+Ow0KCQljbG9ja3MgPSA8JmlucHV0X2Nsaz47DQoJCWNs +b2NrLWZyZXF1ZW5jeSA9IDwxMDAwMDAwMDA+OyDCoDwtLSBUaGF0J3Mgd2hlcmUgd2Ugd2FudCB0 +byBzZXQgZGVzaXJlZCB2YWx1ZQ0KCQ0KfTsNCi0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t +LS0tPjgtLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0NCg0KLUFsZXhleQ== diff --git a/a/content_digest b/N2/content_digest index bcff0cf..feaacc4 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -3,126 +3,84 @@ "ref\0b8f7f407-303a-2f3c-1a16-bfb385204930@synopsys.com\0" "ref\01504705881.3829.19.camel@synopsys.com\0" "ref\0CAL_Jsq+B74keQ3N=8x6jx1URkLq8fa9gwsc5JAuiV86Wwczi9Q@mail.gmail.com\0" - "ref\0CAL_Jsq+B74keQ3N=8x6jx1URkLq8fa9gwsc5JAuiV86Wwczi9Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Alexey Brodkin <Alexey.Brodkin-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>\0" + "From\0Alexey Brodkin <Alexey.Brodkin@synopsys.com>\0" "Subject\0Re: Setting CPU clock frequency on early boot\0" "Date\0Wed, 6 Sep 2017 16:22:18 +0000\0" - "To\0robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0" - "Cc\0linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>" - Vineet.Gupta1-HKixBCOQz3hWk0Htik3J/w@public.gmane.org <Vineet.Gupta1-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> - linux-arch-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-arch-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org <mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> - sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> - linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>\0" + "To\0robh@kernel.org <robh@kernel.org>\0" + "Cc\0linux-snps-arc@lists.infradead.org <linux-snps-arc@lists.infradead.org>" + Vineet.Gupta1@synopsys.com <Vineet.Gupta1@synopsys.com> + linux-arch@vger.kernel.org <linux-arch@vger.kernel.org> + mturquette@baylibre.com <mturquette@baylibre.com> + sboyd@codeaurora.org <sboyd@codeaurora.org> + linux-clk@vger.kernel.org <linux-clk@vger.kernel.org> + " devicetree@vger.kernel.org <devicetree@vger.kernel.org>\0" "\00:1\0" "b\0" - "Hi Rob,\n" - "\n" - "On Wed, 2017-09-06 at 10:25 -0500, Rob Herring wrote:\n" - "> On Wed, Sep 6, 2017 at 8:51 AM, Alexey Brodkin\n" - "> <Alexey.Brodkin@synopsys.com> wrote:\n" - "> > \n" - "> > Hi Vineet, Rob,\n" - "> > \n" - "> > On Tue, 2017-09-05 at 16:40 -0700, Vineet Gupta wrote:\n" - "> > > \n" - "> > > On 09/05/2017 03:04 PM, Rob Herring wrote:\n" - "> > > > \n" - "> > > > \n" - "> > > > On Tue, Sep 5, 2017 at 10:37 AM, Alexey Brodkin\n" - "> > > > <Alexey.Brodkin@synopsys.com> wrote:\n" - "\n" - "[snip]\n" - "\n" - "> > Yeah, that's an interesting question. We may indeed move more smarts to the clock driver\n" - "> > but:\n" - "> > \302\2401. We'll have duplicate code in different clock drivers. Even today that kind of clock\n" - "> > \302\240\302\240\302\240\302\240setup is applicable to AXS10x and HSDK platforms (and they use different clock drivers).\n" - "> \n" - "> No, you could provide a common, shared function to call. Then each\n" - "> platform can opt-in. If you can make something that applies to every\n" - "> single platform now or in the future, then I'd put it in arch. If you\n" - "> have plans to decouple the timer and cpu clocks, then sounds like you\n" - "> can't.\n" - "\n" - "Right so we'll implement a function which is called by a platform if required.\n" - "That way we escape copy-pasting while keeping enough flexibility for current\n" - "and future platforms.\n" - "\n" - "> IMO, if it's not part of the defined CPU architecture, then don't put\n" - "> it in arch/. That's how we end up with multiple copies of the same\n" - "> thing done arbitrarily different ways because few people look across\n" - "> architectures.\n" - "\n" - "So do you propose to have the function [that reads \"clock-frequency\" from say\n" - "CPU node and passes its value to CPU's parent clock driver] in generic\n" - "[i.e. architecture agnostic] code somewhere in \"init/main.c\"?\n" - "\n" - "> > \n" - "> > \302\2402. Print out of CPU frequency which is used during boot process for us is important as well\n" - "> > \302\240\302\240\302\240\302\240especially during bring-up of new HW.\n" - "> > \n" - "> > \302\2403. If there's no dedicated \"clock-frequency\" parameter in CPU node we won't\n" - "> > \302\240\302\240\302\240\302\240change anything so that non-affected platforms will live as they used to.\n" - "> > \n" - "> > That said IMHO proposed implementation is what we want to kep for now.\n" - "> > \n" - "> > > \n" - "> > > Also note that this code is using a new / adhoc DT binding cpu-freq in cou node to\n" - "> > > do the override - is that acceptable ?\n" - "> \n" - "> No, I meant to point that out.\n" - "\n" - "Sorry, but for me it's not clear what did you mean here.\n" - "Care to elaborate a bit more?\n" - "\n" - "> > I think we'll switch to more common \"clock-frequency\" in the next respin.\n" - "> > Indeed \"cpu-freq\" might be a bit misleading.\n" - "> \n" - "> Ideally, you'd use the clock binding eventually.\n" - "\n" - "Again I'm probably missing something :)\n" - "\n" - "I meant we will have both clock phandle and \"clock-frequency\" at the same time.\n" - "Something like this:\n" - "-------------------------------->8---------------------------\n" - "\tcpus {\n" - "\t\t#address-cells = <1>;\n" - "\t\t#size-cells = <0>;\n" - "\n" - "\t\tcpu@0 {\n" - "\t\t\tdevice_type = \"cpu\";\n" - "\t\t\tcompatible = \"snps,archs38\";\n" - "\t\t\treg = <0>;\n" - "\t\t\tclocks = <&core_clk>;\n" - "\t\t\tclock-frequency = <100000000>; \302\240<-- That's where we want to set desired value\n" - "\t\t};\n" - "\t...\n" - "\t}\n" - "\n" - "\tcore_clk: core-clk@80 {\n" - "\t\tcompatible = \"snps,axs10x-arc-pll-clock\";\n" - "\t\treg = <0x80 0x10>, <0x100 0x10>;\n" - "\t\t#clock-cells = <0>;\n" - "\t\tclocks = <&input_clk>;\n" - "\t};\n" - "-------------------------------->8---------------------------\n" - "\n" - "Or alternatively we may move \"clock-frequency\" right to the clock's node and have\n" - "it like that:\n" - "-------------------------------->8---------------------------\n" - "\tcore_clk:\302\240core-clk@80\302\240{\n" - "\t\tcompatible = \"snps,axs10x-arc-pll-clock\";\n" - "\t\treg = <0x80 0x10>, <0x100 0x10>;\n" - "\t\t\n" - "#clock-cells = <0>;\n" - "\t\tclocks = <&input_clk>;\n" - "\t\tclock-frequency = <100000000>; \302\240<-- That's where we want to set desired value\n" - "\t\n" - "};\n" - "-------------------------------->8---------------------------\n" - "\n" - -Alexey + "SGkgUm9iLA0KDQpPbiBXZWQsIDIwMTctMDktMDYgYXQgMTA6MjUgLTA1MDAsIFJvYiBIZXJyaW5n\n" + "IHdyb3RlOg0KPiBPbiBXZWQsIFNlcCA2LCAyMDE3IGF0IDg6NTEgQU0sIEFsZXhleSBCcm9ka2lu\n" + "DQo+IDxBbGV4ZXkuQnJvZGtpbkBzeW5vcHN5cy5jb20+IHdyb3RlOg0KPiA+IA0KPiA+IEhpIFZp\n" + "bmVldCwgUm9iLA0KPiA+IA0KPiA+IE9uIFR1ZSwgMjAxNy0wOS0wNSBhdCAxNjo0MCAtMDcwMCwg\n" + "VmluZWV0IEd1cHRhIHdyb3RlOg0KPiA+ID4gDQo+ID4gPiBPbiAwOS8wNS8yMDE3IDAzOjA0IFBN\n" + "LCBSb2IgSGVycmluZyB3cm90ZToNCj4gPiA+ID4gDQo+ID4gPiA+IA0KPiA+ID4gPiBPbiBUdWUs\n" + "IFNlcCA1LCAyMDE3IGF0IDEwOjM3IEFNLCBBbGV4ZXkgQnJvZGtpbg0KPiA+ID4gPiA8QWxleGV5\n" + "LkJyb2RraW5Ac3lub3BzeXMuY29tPiB3cm90ZToNCg0KW3NuaXBdDQoNCj4gPiBZZWFoLCB0aGF0\n" + "J3MgYW4gaW50ZXJlc3RpbmcgcXVlc3Rpb24uIFdlIG1heSBpbmRlZWQgbW92ZSBtb3JlIHNtYXJ0\n" + "cyB0byB0aGUgY2xvY2sgZHJpdmVyDQo+ID4gYnV0Og0KPiA+IMKgMS4gV2UnbGwgaGF2ZSBkdXBs\n" + "aWNhdGUgY29kZSBpbiBkaWZmZXJlbnQgY2xvY2sgZHJpdmVycy4gRXZlbiB0b2RheSB0aGF0IGtp\n" + "bmQgb2YgY2xvY2sNCj4gPiDCoMKgwqDCoHNldHVwIGlzIGFwcGxpY2FibGUgdG8gQVhTMTB4IGFu\n" + "ZCBIU0RLIHBsYXRmb3JtcyAoYW5kIHRoZXkgdXNlIGRpZmZlcmVudCBjbG9jayBkcml2ZXJzKS4N\n" + "Cj4gDQo+IE5vLCB5b3UgY291bGQgcHJvdmlkZSBhIGNvbW1vbiwgc2hhcmVkIGZ1bmN0aW9uIHRv\n" + "IGNhbGwuIFRoZW4gZWFjaA0KPiBwbGF0Zm9ybSBjYW4gb3B0LWluLiBJZiB5b3UgY2FuIG1ha2Ug\n" + "c29tZXRoaW5nIHRoYXQgYXBwbGllcyB0byBldmVyeQ0KPiBzaW5nbGUgcGxhdGZvcm0gbm93IG9y\n" + "IGluIHRoZSBmdXR1cmUsIHRoZW4gSSdkIHB1dCBpdCBpbiBhcmNoLiBJZiB5b3UNCj4gaGF2ZSBw\n" + "bGFucyB0byBkZWNvdXBsZSB0aGUgdGltZXIgYW5kIGNwdSBjbG9ja3MsIHRoZW4gc291bmRzIGxp\n" + "a2UgeW91DQo+IGNhbid0Lg0KDQpSaWdodCBzbyB3ZSdsbCBpbXBsZW1lbnQgYSBmdW5jdGlvbiB3\n" + "aGljaCBpcyBjYWxsZWQgYnkgYSBwbGF0Zm9ybSBpZiByZXF1aXJlZC4NClRoYXQgd2F5IHdlIGVz\n" + "Y2FwZSBjb3B5LXBhc3Rpbmcgd2hpbGUga2VlcGluZyBlbm91Z2ggZmxleGliaWxpdHkgZm9yIGN1\n" + "cnJlbnQNCmFuZCBmdXR1cmUgcGxhdGZvcm1zLg0KDQo+IElNTywgaWYgaXQncyBub3QgcGFydCBv\n" + "ZiB0aGUgZGVmaW5lZCBDUFUgYXJjaGl0ZWN0dXJlLCB0aGVuIGRvbid0IHB1dA0KPiBpdCBpbiBh\n" + "cmNoLy4gVGhhdCdzIGhvdyB3ZSBlbmQgdXAgd2l0aCBtdWx0aXBsZSBjb3BpZXMgb2YgdGhlIHNh\n" + "bWUNCj4gdGhpbmcgZG9uZSBhcmJpdHJhcmlseSBkaWZmZXJlbnQgd2F5cyBiZWNhdXNlIGZldyBw\n" + "ZW9wbGUgbG9vayBhY3Jvc3MNCj4gYXJjaGl0ZWN0dXJlcy4NCg0KU28gZG8geW91IHByb3Bvc2Ug\n" + "dG8gaGF2ZSB0aGUgZnVuY3Rpb24gW3RoYXQgcmVhZHMgImNsb2NrLWZyZXF1ZW5jeSIgZnJvbSBz\n" + "YXkNCkNQVSBub2RlIGFuZCBwYXNzZXMgaXRzIHZhbHVlIHRvIENQVSdzIHBhcmVudCBjbG9jayBk\n" + "cml2ZXJdIGluIGdlbmVyaWMNCltpLmUuIGFyY2hpdGVjdHVyZSBhZ25vc3RpY10gY29kZSBzb21l\n" + "d2hlcmUgaW4gImluaXQvbWFpbi5jIj8NCg0KPiA+IA0KPiA+IMKgMi4gUHJpbnQgb3V0IG9mIENQ\n" + "VSBmcmVxdWVuY3kgd2hpY2ggaXMgdXNlZCBkdXJpbmcgYm9vdCBwcm9jZXNzIGZvciB1cyBpcyBp\n" + "bXBvcnRhbnQgYXMgd2VsbA0KPiA+IMKgwqDCoMKgZXNwZWNpYWxseSBkdXJpbmcgYnJpbmctdXAg\n" + "b2YgbmV3IEhXLg0KPiA+IA0KPiA+IMKgMy4gSWYgdGhlcmUncyBubyBkZWRpY2F0ZWQgImNsb2Nr\n" + "LWZyZXF1ZW5jeSIgcGFyYW1ldGVyIGluIENQVSBub2RlIHdlIHdvbid0DQo+ID4gwqDCoMKgwqBj\n" + "aGFuZ2UgYW55dGhpbmcgc28gdGhhdCBub24tYWZmZWN0ZWQgcGxhdGZvcm1zIHdpbGwgbGl2ZSBh\n" + "cyB0aGV5IHVzZWQgdG8uDQo+ID4gDQo+ID4gVGhhdCBzYWlkIElNSE8gcHJvcG9zZWQgaW1wbGVt\n" + "ZW50YXRpb24gaXMgd2hhdCB3ZSB3YW50IHRvIGtlcCBmb3Igbm93Lg0KPiA+IA0KPiA+ID4gDQo+\n" + "ID4gPiBBbHNvIG5vdGUgdGhhdCB0aGlzIGNvZGUgaXMgdXNpbmcgYSBuZXcgLyBhZGhvYyBEVCBi\n" + "aW5kaW5nIGNwdS1mcmVxIGluIGNvdSBub2RlIHRvDQo+ID4gPiBkbyB0aGUgb3ZlcnJpZGUgLSBp\n" + "cyB0aGF0IGFjY2VwdGFibGUgPw0KPiANCj4gTm8sIEkgbWVhbnQgdG8gcG9pbnQgdGhhdCBvdXQu\n" + "DQoNClNvcnJ5LCBidXQgZm9yIG1lIGl0J3Mgbm90IGNsZWFyIHdoYXQgZGlkIHlvdSBtZWFuIGhl\n" + "cmUuDQpDYXJlIHRvIGVsYWJvcmF0ZSBhIGJpdCBtb3JlPw0KDQo+ID4gSSB0aGluayB3ZSdsbCBz\n" + "d2l0Y2ggdG8gbW9yZSBjb21tb24gImNsb2NrLWZyZXF1ZW5jeSIgaW4gdGhlIG5leHQgcmVzcGlu\n" + "Lg0KPiA+IEluZGVlZCAiY3B1LWZyZXEiIG1pZ2h0IGJlIGEgYml0IG1pc2xlYWRpbmcuDQo+IA0K\n" + "PiBJZGVhbGx5LCB5b3UnZCB1c2UgdGhlIGNsb2NrIGJpbmRpbmcgZXZlbnR1YWxseS4NCg0KQWdh\n" + "aW4gSSdtIHByb2JhYmx5IG1pc3Npbmcgc29tZXRoaW5nIDopDQoNCkkgbWVhbnQgd2Ugd2lsbCBo\n" + "YXZlIGJvdGggY2xvY2sgcGhhbmRsZSBhbmQgImNsb2NrLWZyZXF1ZW5jeSIgYXQgdGhlIHNhbWUg\n" + "dGltZS4NClNvbWV0aGluZyBsaWtlIHRoaXM6DQotLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t\n" + "LS0tLT44LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tDQoJY3B1cyB7DQoJCSNhZGRyZXNzLWNl\n" + "bGxzID0gPDE+Ow0KCQkjc2l6ZS1jZWxscyA9IDwwPjsNCg0KCQljcHVAMCB7DQoJCQlkZXZpY2Vf\n" + "dHlwZSA9ICJjcHUiOw0KCQkJY29tcGF0aWJsZSA9ICJzbnBzLGFyY2hzMzgiOw0KCQkJcmVnID0g\n" + "PDA+Ow0KCQkJY2xvY2tzID0gPCZjb3JlX2Nsaz47DQoJCQljbG9jay1mcmVxdWVuY3kgPSA8MTAw\n" + "MDAwMDAwPjsgwqA8LS0gVGhhdCdzIHdoZXJlIHdlIHdhbnQgdG8gc2V0IGRlc2lyZWQgdmFsdWUN\n" + "CgkJfTsNCgkuLi4NCgl9DQoNCgljb3JlX2NsazogY29yZS1jbGtAODAgew0KCQljb21wYXRpYmxl\n" + "ID0gInNucHMsYXhzMTB4LWFyYy1wbGwtY2xvY2siOw0KCQlyZWcgPSA8MHg4MCAweDEwPiwgPDB4\n" + "MTAwIDB4MTA+Ow0KCQkjY2xvY2stY2VsbHMgPSA8MD47DQoJCWNsb2NrcyA9IDwmaW5wdXRfY2xr\n" + "PjsNCgl9Ow0KLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0+OC0tLS0tLS0tLS0tLS0t\n" + "LS0tLS0tLS0tLS0tLQ0KDQpPciBhbHRlcm5hdGl2ZWx5IHdlIG1heSBtb3ZlICJjbG9jay1mcmVx\n" + "dWVuY3kiIHJpZ2h0IHRvIHRoZSBjbG9jaydzIG5vZGUgYW5kIGhhdmUNCml0IGxpa2UgdGhhdDoN\n" + "Ci0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tPjgtLS0tLS0tLS0tLS0tLS0tLS0tLS0t\n" + "LS0tLS0NCgljb3JlX2NsazrCoGNvcmUtY2xrQDgwwqB7DQoJCWNvbXBhdGlibGUgPSAic25wcyxh\n" + "eHMxMHgtYXJjLXBsbC1jbG9jayI7DQoJCXJlZyA9IDwweDgwIDB4MTA+LCA8MHgxMDAgMHgxMD47\n" + "DQoJCQ0KI2Nsb2NrLWNlbGxzID0gPDA+Ow0KCQljbG9ja3MgPSA8JmlucHV0X2Nsaz47DQoJCWNs\n" + "b2NrLWZyZXF1ZW5jeSA9IDwxMDAwMDAwMDA+OyDCoDwtLSBUaGF0J3Mgd2hlcmUgd2Ugd2FudCB0\n" + "byBzZXQgZGVzaXJlZCB2YWx1ZQ0KCQ0KfTsNCi0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t\n" + LS0tPjgtLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0NCg0KLUFsZXhleQ== -94d510ae9a22f07d72b0011f2704c388e720a6bffecfc44d0b64b171843ab129 +6e027263de076f92962e6e188fd858c2ea9ce85e16945e2f45328112641caa24
diff --git a/a/1.txt b/N3/1.txt index 2b51568..90e02be 100644 --- a/a/1.txt +++ b/N3/1.txt @@ -1,12 +1,12 @@ Hi Rob, -On Wed, 2017-09-06 at 10:25 -0500, Rob Herring wrote: +On Wed, 2017-09-06@10:25 -0500, Rob Herring wrote: > On Wed, Sep 6, 2017 at 8:51 AM, Alexey Brodkin > <Alexey.Brodkin@synopsys.com> wrote: > > > > Hi Vineet, Rob, > > -> > On Tue, 2017-09-05 at 16:40 -0700, Vineet Gupta wrote: +> > On Tue, 2017-09-05@16:40 -0700, Vineet Gupta wrote: > > > > > > On 09/05/2017 03:04 PM, Rob Herring wrote: > > > > @@ -18,8 +18,8 @@ On Wed, 2017-09-06 at 10:25 -0500, Rob Herring wrote: > > Yeah, that's an interesting question. We may indeed move more smarts to the clock driver > > but: -> > 1. We'll have duplicate code in different clock drivers. Even today that kind of clock -> > setup is applicable to AXS10x and HSDK platforms (and they use different clock drivers). +> > ?1. We'll have duplicate code in different clock drivers. Even today that kind of clock +> > ????setup is applicable to AXS10x and HSDK platforms (and they use different clock drivers). > > No, you could provide a common, shared function to call. Then each > platform can opt-in. If you can make something that applies to every @@ -41,11 +41,11 @@ CPU node and passes its value to CPU's parent clock driver] in generic [i.e. architecture agnostic] code somewhere in "init/main.c"? > > -> > 2. Print out of CPU frequency which is used during boot process for us is important as well -> > especially during bring-up of new HW. +> > ?2. Print out of CPU frequency which is used during boot process for us is important as well +> > ????especially during bring-up of new HW. > > -> > 3. If there's no dedicated "clock-frequency" parameter in CPU node we won't -> > change anything so that non-affected platforms will live as they used to. +> > ?3. If there's no dedicated "clock-frequency" parameter in CPU node we won't +> > ????change anything so that non-affected platforms will live as they used to. > > > > That said IMHO proposed implementation is what we want to kep for now. > > @@ -72,17 +72,17 @@ Something like this: #address-cells = <1>; #size-cells = <0>; - cpu@0 { + cpu at 0 { device_type = "cpu"; compatible = "snps,archs38"; reg = <0>; clocks = <&core_clk>; - clock-frequency = <100000000>; <-- That's where we want to set desired value + clock-frequency = <100000000>; ?<-- That's where we want to set desired value }; ... } - core_clk: core-clk@80 { + core_clk: core-clk at 80 { compatible = "snps,axs10x-arc-pll-clock"; reg = <0x80 0x10>, <0x100 0x10>; #clock-cells = <0>; @@ -93,13 +93,13 @@ Something like this: Or alternatively we may move "clock-frequency" right to the clock's node and have it like that: -------------------------------->8--------------------------- - core_clk: core-clk@80 { + core_clk:?core-clk at 80?{ compatible = "snps,axs10x-arc-pll-clock"; reg = <0x80 0x10>, <0x100 0x10>; #clock-cells = <0>; clocks = <&input_clk>; - clock-frequency = <100000000>; <-- That's where we want to set desired value + clock-frequency = <100000000>; ?<-- That's where we want to set desired value }; -------------------------------->8--------------------------- diff --git a/a/content_digest b/N3/content_digest index bcff0cf..8874581 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -3,29 +3,21 @@ "ref\0b8f7f407-303a-2f3c-1a16-bfb385204930@synopsys.com\0" "ref\01504705881.3829.19.camel@synopsys.com\0" "ref\0CAL_Jsq+B74keQ3N=8x6jx1URkLq8fa9gwsc5JAuiV86Wwczi9Q@mail.gmail.com\0" - "ref\0CAL_Jsq+B74keQ3N=8x6jx1URkLq8fa9gwsc5JAuiV86Wwczi9Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org\0" - "From\0Alexey Brodkin <Alexey.Brodkin-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>\0" - "Subject\0Re: Setting CPU clock frequency on early boot\0" + "From\0Alexey.Brodkin@synopsys.com (Alexey Brodkin)\0" + "Subject\0Setting CPU clock frequency on early boot\0" "Date\0Wed, 6 Sep 2017 16:22:18 +0000\0" - "To\0robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0" - "Cc\0linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>" - Vineet.Gupta1-HKixBCOQz3hWk0Htik3J/w@public.gmane.org <Vineet.Gupta1-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> - linux-arch-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-arch-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org <mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org> - sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> - linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>\0" + "To\0linux-snps-arc@lists.infradead.org\0" "\00:1\0" "b\0" "Hi Rob,\n" "\n" - "On Wed, 2017-09-06 at 10:25 -0500, Rob Herring wrote:\n" + "On Wed, 2017-09-06@10:25 -0500, Rob Herring wrote:\n" "> On Wed, Sep 6, 2017 at 8:51 AM, Alexey Brodkin\n" "> <Alexey.Brodkin@synopsys.com> wrote:\n" "> > \n" "> > Hi Vineet, Rob,\n" "> > \n" - "> > On Tue, 2017-09-05 at 16:40 -0700, Vineet Gupta wrote:\n" + "> > On Tue, 2017-09-05@16:40 -0700, Vineet Gupta wrote:\n" "> > > \n" "> > > On 09/05/2017 03:04 PM, Rob Herring wrote:\n" "> > > > \n" @@ -37,8 +29,8 @@ "\n" "> > Yeah, that's an interesting question. We may indeed move more smarts to the clock driver\n" "> > but:\n" - "> > \302\2401. We'll have duplicate code in different clock drivers. Even today that kind of clock\n" - "> > \302\240\302\240\302\240\302\240setup is applicable to AXS10x and HSDK platforms (and they use different clock drivers).\n" + "> > ?1. We'll have duplicate code in different clock drivers. Even today that kind of clock\n" + "> > ????setup is applicable to AXS10x and HSDK platforms (and they use different clock drivers).\n" "> \n" "> No, you could provide a common, shared function to call. Then each\n" "> platform can opt-in. If you can make something that applies to every\n" @@ -60,11 +52,11 @@ "[i.e. architecture agnostic] code somewhere in \"init/main.c\"?\n" "\n" "> > \n" - "> > \302\2402. Print out of CPU frequency which is used during boot process for us is important as well\n" - "> > \302\240\302\240\302\240\302\240especially during bring-up of new HW.\n" + "> > ?2. Print out of CPU frequency which is used during boot process for us is important as well\n" + "> > ????especially during bring-up of new HW.\n" "> > \n" - "> > \302\2403. If there's no dedicated \"clock-frequency\" parameter in CPU node we won't\n" - "> > \302\240\302\240\302\240\302\240change anything so that non-affected platforms will live as they used to.\n" + "> > ?3. If there's no dedicated \"clock-frequency\" parameter in CPU node we won't\n" + "> > ????change anything so that non-affected platforms will live as they used to.\n" "> > \n" "> > That said IMHO proposed implementation is what we want to kep for now.\n" "> > \n" @@ -91,17 +83,17 @@ "\t\t#address-cells = <1>;\n" "\t\t#size-cells = <0>;\n" "\n" - "\t\tcpu@0 {\n" + "\t\tcpu at 0 {\n" "\t\t\tdevice_type = \"cpu\";\n" "\t\t\tcompatible = \"snps,archs38\";\n" "\t\t\treg = <0>;\n" "\t\t\tclocks = <&core_clk>;\n" - "\t\t\tclock-frequency = <100000000>; \302\240<-- That's where we want to set desired value\n" + "\t\t\tclock-frequency = <100000000>; ?<-- That's where we want to set desired value\n" "\t\t};\n" "\t...\n" "\t}\n" "\n" - "\tcore_clk: core-clk@80 {\n" + "\tcore_clk: core-clk at 80 {\n" "\t\tcompatible = \"snps,axs10x-arc-pll-clock\";\n" "\t\treg = <0x80 0x10>, <0x100 0x10>;\n" "\t\t#clock-cells = <0>;\n" @@ -112,17 +104,17 @@ "Or alternatively we may move \"clock-frequency\" right to the clock's node and have\n" "it like that:\n" "-------------------------------->8---------------------------\n" - "\tcore_clk:\302\240core-clk@80\302\240{\n" + "\tcore_clk:?core-clk at 80?{\n" "\t\tcompatible = \"snps,axs10x-arc-pll-clock\";\n" "\t\treg = <0x80 0x10>, <0x100 0x10>;\n" "\t\t\n" "#clock-cells = <0>;\n" "\t\tclocks = <&input_clk>;\n" - "\t\tclock-frequency = <100000000>; \302\240<-- That's where we want to set desired value\n" + "\t\tclock-frequency = <100000000>; ?<-- That's where we want to set desired value\n" "\t\n" "};\n" "-------------------------------->8---------------------------\n" "\n" -Alexey -94d510ae9a22f07d72b0011f2704c388e720a6bffecfc44d0b64b171843ab129 +bacc326f6ad93c76e03a90a5ad33b5e4dbe73d756b3c6b859b9e7cb3c4caf058
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