diff for duplicates of <1504767630.1173.60.camel@neuling.org> diff --git a/a/1.txt b/N1/1.txt index f916449..929a2dc 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,60 +1,44 @@ -So this is upstream now but it will cause a crash on boot with older skiboo= -ts -with:=20 +So this is upstream now but it will cause a crash on boot with older skiboots +with: powernv-cpufreq: cpufreq pstate min 101 nominal 50 max 0 powernv-cpufreq: Workload Optimized Frequency is enabled in the platform Disabling lock debugging due to kernel taint Severe Machine check interrupt [Not recovered] -=C2=A0 NIP [c000000000098530]: reset_window_regs+0x20/0x220 -=C2=A0 Initiator: CPU -=C2=A0 Error type: Unknown -opal: Machine check interrupt unrecoverable: MSR(RI=3D0) + NIP [c000000000098530]: reset_window_regs+0x20/0x220 + Initiator: CPU + Error type: Unknown +opal: Machine check interrupt unrecoverable: MSR(RI=0) opal: Hardware platform error: Unrecoverable Machine Check exception -CPU: 1 PID: 1 Comm: swapper/0 Tainted: G=C2=A0=C2=A0=C2=A0M=C2=A0=C2=A0=C2= -=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A04.13.0-rc7-00708-g= -8b680911e774-dirty #10 +CPU: 1 PID: 1 Comm: swapper/0 Tainted: G M 4.13.0-rc7-00708-g8b680911e774-dirty #10 task: c000000f22680000 task.stack: c000000f22700000 -NIP:=C2=A0=C2=A0c000000000098530 LR: c000000000098758 CTR: 0000000000000000 -REGS: c00000003ffebd80 TRAP: 0200=C2=A0=C2=A0=C2=A0Tainted: G=C2=A0=C2=A0= -=C2=A0M=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= -=C2=A0=C2=A0(4.13.0-rc7-00708-g8b680911e774-dirty) -MSR:=C2=A0=C2=A09000000008349031 <SF,HV,EE,ME,IR,DR,LE>=C2=A0=C2=A0CR: 2400= -0224=C2=A0=C2=A0XER: 00000000 -CFAR: c000000000098754 DAR: 00000000100bef30 DSISR: 40000000 SOFTE: 0=C2=A0 -GPR00: c000000000098f44 c000000f22703a00 c000000000eff200 c000000f1cf861e0= -=C2=A0 -GPR04: c000000f22703a50 0000000000000001 0000000000000fff 0000000000000003= -=C2=A0 -GPR08: c00c0000842f0000 0000000000000001 0000000000000000 0000000000000000= -=C2=A0 -GPR12: 0000000000000000 c00000000fd40580 c000000000c03590 c000000000c1f428= -=C2=A0 -GPR16: c000000000c4a640 c000000000c31360 c000000000c92738 c000000000c92690= -=C2=A0 -GPR20: c000000000c926a0 c000000000c926f0 c000000f1d672940 0000000000000000= -=C2=A0 -GPR24: c000000000c92638 0000000000000000 c000000000e888b0 c000000000dce428= -=C2=A0 -GPR28: 0000000000000002 c000000f0e800000 c000000f22703a50 c000000f1cf861e0= -=C2=A0 +NIP: c000000000098530 LR: c000000000098758 CTR: 0000000000000000 +REGS: c00000003ffebd80 TRAP: 0200 Tainted: G M (4.13.0-rc7-00708-g8b680911e774-dirty) +MSR: 9000000008349031 <SF,HV,EE,ME,IR,DR,LE> CR: 24000224 XER: 00000000 +CFAR: c000000000098754 DAR: 00000000100bef30 DSISR: 40000000 SOFTE: 0 +GPR00: c000000000098f44 c000000f22703a00 c000000000eff200 c000000f1cf861e0 +GPR04: c000000f22703a50 0000000000000001 0000000000000fff 0000000000000003 +GPR08: c00c0000842f0000 0000000000000001 0000000000000000 0000000000000000 +GPR12: 0000000000000000 c00000000fd40580 c000000000c03590 c000000000c1f428 +GPR16: c000000000c4a640 c000000000c31360 c000000000c92738 c000000000c92690 +GPR20: c000000000c926a0 c000000000c926f0 c000000f1d672940 0000000000000000 +GPR24: c000000000c92638 0000000000000000 c000000000e888b0 c000000000dce428 +GPR28: 0000000000000002 c000000f0e800000 c000000f22703a50 c000000f1cf861e0 NIP [c000000000098530] reset_window_regs+0x20/0x220 LR [c000000000098758] init_winctx_regs+0x28/0x6c0 Call Trace: [c000000f22703a00] [0000000000000002] 0x2 (unreliable) [c000000f22703a30] [c000000000098f44] vas_rx_win_open.part.11+0x154/0x210 [c000000f22703ae0] [c000000000d668e8] nx842_powernv_init+0x6b4/0x824 -[c000000f22703c[=C2=A0=C2=A0=C2=A038.412765557,0] OPAL: Reboot requested du= -e to Platform error. -[=C2=A0=C2=A0=C2=A038.412828287,3] OPAL: Reboot requested due to Platform e= -rror.40] [c00000000000ca60] do_one_initcall+0x60/0x1c0 +[c000000f22703c[ 38.412765557,0] OPAL: Reboot requested due to Platform error. +[ 38.412828287,3] OPAL: Reboot requested due to Platform error.40] [c00000000000ca60] do_one_initcall+0x60/0x1c0 If you see this you need a new skiboot with at least these two patches: b503dcf16d vas: Set mmio enable bits in DD2 a5c124072f vas: Set FIRs according to workbook -This is a community announcement brought to you by OzLabs.=C2=A0 +This is a community announcement brought to you by OzLabs. OzLabs: Making Linux better since 1999 Mikey @@ -65,186 +49,147 @@ On Mon, 2017-08-28 at 23:23 -0700, Sukadev Bhattiprolu wrote: > Accelerator Switchboard (VAS). VAS allows kernel subsystems and user > space processes to directly access the Nest Accelerator (NX) engines > which implement compression and encryption algorithms in the hardware. ->=20 +> > NX has been in Power processors since Power7+, but access to the NX > engines was through the 'icswx' instruction which is only available > to the kernel/hypervisor. Starting with Power9, access to the NX > engines is provided to both kernel and user space processes through > VAS. ->=20 +> > The switchboard (i.e VAS) multiplexes accesses between "receivers" and > "senders", where the "receivers" are typically the NX engines and > "senders" are the kernel subsystems and user processors that wish to -> access the receivers (NX engines).=C2=A0=C2=A0Once a sender is "connected= -" to +> access the receivers (NX engines). Once a sender is "connected" to > a receiver through the switchboard, the senders can submit compression/ > encryption requests to the hardware using the new (PowerISA 3.0) > "copy" and "paste" instructions. ->=20 +> > In the initial OPAL and PowerNV kernel patchsets, the "senders" can > only be kernel subsystems (eg NX-842 driver) and receivers can only > be the NX-842 engine. Follow-on patch sets will allow senders/receivers > to be user-space processes and receivers to be NX-GZIP engines. ->=20 +> > Provides: ->=20 +> > This kernel patch set configures the VAS subsystems and provides > kernel interfaces to drivers like NX-842 to open receive and send > windows in VAS and to submit compression requests to the NX engine. ->=20 +> > Requires: ->=20 +> > This patch set needs corresponding VAS/NX skiboot patches which > were merged into skiboot tree. i.e skiboot must include: > commit b503dcf ("vas: Set mmio enable bits in DD2") ->=20 +> > Tests: -> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0In-kernel compression req= -uests were tested on DD1 and DD2 POWER9 +> In-kernel compression requests were tested on DD1 and DD2 POWER9 > hardware using compression self-test module and the following > NX-842 patch set from Haren Myneni: ->=20 -> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0https://lists.ozlabs.org/= -pipermail/linuxppc-dev/2017-July/160620.html ->=20 +> +> https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-July/160620.html +> > and by dropping the last parameters to both vas_copy_crb() and > vas_paste_crb() calls in drivers/crypto/nx/nx-842-powernv.c. > See also PATCH 10/10. ->=20 +> > Git Tree: ->=20 -> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0https://github.com/sukade= -v/linux/=C2=A0 +> +> https://github.com/sukadev/linux/ > Branch: vas-kern-v8 ->=20 +> > Thanks to input from Ben Herrenschmidt, Michael Neuling, Michael Ellerman > and Haren Myneni. ->=20 +> > Changelog[v8]: > - [Michael Ellerman] Use kernel int types (u64, u32 etc); make VAS -> =C2=A0=C2=A0a built-in rather than a module; drop unnecessary fields fro= -m -> =C2=A0=C2=A0struct vas_instance; Update ISA references; use 0 or 1 with -> =C2=A0=C2=A0SET_FIELD macros instead of bool; skip writing to SPARE regi= -sters; -> =C2=A0=C2=A0minor cleanup of debug/error messages; retry if ida_get_new(= -) -> =C2=A0=C2=A0fails with EAGAIN; fix couple of leaks in ids in error handl= -ing; -> =C2=A0=C2=A0drop vas_initialized() check; drop vas_win_id() and vas_past= -e_addr() -> =C2=A0=C2=A0interfaces as they are not yet used; Set task_state() and fi= -x -> =C2=A0=C2=A0parameter to schedule_timeout(); Reuse existing copy/paste m= -acros -> =C2=A0=C2=A0drop unnecessary parameters and add cr0 to clobbers list ->=20 +> a built-in rather than a module; drop unnecessary fields from +> struct vas_instance; Update ISA references; use 0 or 1 with +> SET_FIELD macros instead of bool; skip writing to SPARE registers; +> minor cleanup of debug/error messages; retry if ida_get_new() +> fails with EAGAIN; fix couple of leaks in ids in error handling; +> drop vas_initialized() check; drop vas_win_id() and vas_paste_addr() +> interfaces as they are not yet used; Set task_state() and fix +> parameter to schedule_timeout(); Reuse existing copy/paste macros +> drop unnecessary parameters and add cr0 to clobbers list +> > Changelog[v7]: > - Drop support for user space send/receive FTW windows (will be -> =C2=A0=C2=A0posted separately) Simplifies the rx-win-open interface a bi= -t. -> - [Michael Ellerman] Move GET_FIELD/SET_FIELD macros from=C2=A0 -> =C2=A0=C2=A0uapi/asm/vas.h to asm/vas.h. ->=20 +> posted separately) Simplifies the rx-win-open interface a bit. +> - [Michael Ellerman] Move GET_FIELD/SET_FIELD macros from +> uapi/asm/vas.h to asm/vas.h. +> > Changelog[v6] > - Add support for user space send/receive FTW windows > - Add a new, NX-FTW driver which provides the FTW user interface ->=20 +> > Changelog[v5] > - [Ben Herrenschmidt] Make VAS a platform device in the device tree -> =C2=A0=C2=A0and use the core platform functions to parse the VAS propert= -ies. -> =C2=A0=C2=A0Map the VAS MMIO regions as non-cachable and paste regions a= -s -> =C2=A0=C2=A0cachable. Use CONFIG_PPC_VAS rather than CONFIG_VAS; Don't a= -ssume -> =C2=A0=C2=A0VAS ids are sequential. +> and use the core platform functions to parse the VAS properties. +> Map the VAS MMIO regions as non-cachable and paste regions as +> cachable. Use CONFIG_PPC_VAS rather than CONFIG_VAS; Don't assume +> VAS ids are sequential. > - Copy the FIFO address as is into LFIFO_BAR (don't shift it). ->=20 +> > Changelog[v4] > Comments from Michael Neuling: > - Move VAS code from drivers/misc/vas to arch/powerpc/platforms/powernv -> =C2=A0=C2=A0since VAS only provides interfaces to other drivers like NX-= -842. +> since VAS only provides interfaces to other drivers like NX-842. > - Drop vas-internal.h and use vas.h in separate dirs for VAS -> =C2=A0=C2=A0internal, kernel API and user API +> internal, kernel API and user API > - Rather than create 6 separate device tree properties windows -> =C2=A0=C2=A0and window context, combine them into 6 "reg" properties. +> and window context, combine them into 6 "reg" properties. > - Drop vas_window_reset() since windows are reset/cleared before -> =C2=A0=C2=A0being assigned to kernel/users. +> being assigned to kernel/users. > - Use ilog2() and radix_enabled() helpers ->=20 +> > Changelog[v3] > - Rebase to v4.11-rc1 > - Add interfaces to initialize send/receive window attributes to -> =C2=A0=C2=A0defaults that drivers can use (see arch/powerpc/include/asm/= -vas.h) +> defaults that drivers can use (see arch/powerpc/include/asm/vas.h) > - Modify interface vas_paste() to return 0 or error code > - Fix a bug in setting Translation Control Mode (0b11 not 0x11) -> - Enable send-window-credit checking=C2=A0 -> - Reorg code=C2=A0=C2=A0in vas_win_close() +> - Enable send-window-credit checking +> - Reorg code in vas_win_close() > - Minor reorgs and tweaks to register field settings to make it -> =C2=A0=C2=A0easier to add support for user space windows. +> easier to add support for user space windows. > - Skip writing to read-only registers > - Start window indexing from 0 rather than 1 ->=20 +> > Changelog[v2] > - Use vas-id, HVWC, UWC and paste address, entries from device tree -> =C2=A0=C2=A0rather than defining/computing them in kernel and reorg code= -. ->=20 ->=20 +> rather than defining/computing them in kernel and reorg code. +> +> > Sukadev Bhattiprolu (10): -> =C2=A0 powerpc/vas: Define macros, register fields and structures -> =C2=A0 Move GET_FIELD/SET_FIELD to vas.h -> =C2=A0 powerpc/vas: Define vas_init() and vas_exit() -> =C2=A0 powerpc/vas: Define helpers to access MMIO regions -> =C2=A0 powerpc/vas: Define helpers to init window context -> =C2=A0 powerpc/vas: Define helpers to alloc/free windows -> =C2=A0 powerpc/vas: Define vas_rx_win_open() interface -> =C2=A0 powerpc/vas: Define vas_win_close() interface -> =C2=A0 powerpc/vas: Define vas_tx_win_open() -> =C2=A0 powerpc/vas: Define copy/paste interfaces ->=20 -> =C2=A0.../devicetree/bindings/powerpc/ibm,vas.txt=C2=A0=C2=A0=C2=A0=C2=A0= -=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A0=C2=A023 + -> =C2=A0MAINTAINERS=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= -=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A0=C2=A0=C2=A09 + -> =C2=A0arch/powerpc/include/asm/ppc-opcode.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A0=C2=A0= -=C2=A02 + -> =C2=A0arch/powerpc/include/asm/vas.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= -=A0=C2=A0=C2=A0|=C2=A0=C2=A0160 +++ -> =C2=A0arch/powerpc/platforms/powernv/Kconfig=C2=A0=C2=A0=C2=A0=C2=A0=C2= -=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A0=C2=A014 + -> =C2=A0arch/powerpc/platforms/powernv/Makefile=C2=A0=C2=A0=C2=A0=C2=A0=C2= -=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A0=C2=A0=C2=A01 + -> =C2=A0arch/powerpc/platforms/powernv/copy-paste.h=C2=A0=C2=A0=C2=A0=C2=A0= -=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A0=C2=A046 + -> =C2=A0arch/powerpc/platforms/powernv/vas-window.c=C2=A0=C2=A0=C2=A0=C2=A0= -=C2=A0=C2=A0=C2=A0=C2=A0| 1134 +> powerpc/vas: Define macros, register fields and structures +> Move GET_FIELD/SET_FIELD to vas.h +> powerpc/vas: Define vas_init() and vas_exit() +> powerpc/vas: Define helpers to access MMIO regions +> powerpc/vas: Define helpers to init window context +> powerpc/vas: Define helpers to alloc/free windows +> powerpc/vas: Define vas_rx_win_open() interface +> powerpc/vas: Define vas_win_close() interface +> powerpc/vas: Define vas_tx_win_open() +> powerpc/vas: Define copy/paste interfaces +> +> .../devicetree/bindings/powerpc/ibm,vas.txt | 23 + +> MAINTAINERS | 9 + +> arch/powerpc/include/asm/ppc-opcode.h | 2 + +> arch/powerpc/include/asm/vas.h | 160 +++ +> arch/powerpc/platforms/powernv/Kconfig | 14 + +> arch/powerpc/platforms/powernv/Makefile | 1 + +> arch/powerpc/platforms/powernv/copy-paste.h | 46 + +> arch/powerpc/platforms/powernv/vas-window.c | 1134 > ++++++++++++++++++++ -> =C2=A0arch/powerpc/platforms/powernv/vas.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A015= -1 +++ -> =C2=A0arch/powerpc/platforms/powernv/vas.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A046= -7 ++++++++ -> =C2=A0drivers/crypto/nx/nx-842-powernv.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= -=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2= -=A0=C2=A0=C2=A0=C2=A07 +- -> =C2=A0drivers/crypto/nx/nx-842.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= -=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A0=C2=A0=C2=A05 - -> =C2=A012 files changed, 2011 insertions(+), 8 deletions(-) -> =C2=A0create mode 100644 Documentation/devicetree/bindings/powerpc/ibm,va= -s.txt -> =C2=A0create mode 100644 arch/powerpc/include/asm/vas.h -> =C2=A0create mode 100644 arch/powerpc/platforms/powernv/copy-paste.h -> =C2=A0create mode 100644 arch/powerpc/platforms/powernv/vas-window.c -> =C2=A0create mode 100644 arch/powerpc/platforms/powernv/vas.c -> =C2=A0create mode 100644 arch/powerpc/platforms/powernv/vas.h ->=20 +> arch/powerpc/platforms/powernv/vas.c | 151 +++ +> arch/powerpc/platforms/powernv/vas.h | 467 ++++++++ +> drivers/crypto/nx/nx-842-powernv.c | 7 +- +> drivers/crypto/nx/nx-842.h | 5 - +> 12 files changed, 2011 insertions(+), 8 deletions(-) +> create mode 100644 Documentation/devicetree/bindings/powerpc/ibm,vas.txt +> create mode 100644 arch/powerpc/include/asm/vas.h +> create mode 100644 arch/powerpc/platforms/powernv/copy-paste.h +> create mode 100644 arch/powerpc/platforms/powernv/vas-window.c +> create mode 100644 arch/powerpc/platforms/powernv/vas.c +> create mode 100644 arch/powerpc/platforms/powernv/vas.h +> diff --git a/a/content_digest b/N1/content_digest index b697cca..f234e38 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -11,63 +11,47 @@ " oohall@gmail.com\0" "\00:1\0" "b\0" - "So this is upstream now but it will cause a crash on boot with older skiboo=\n" - "ts\n" - "with:=20\n" + "So this is upstream now but it will cause a crash on boot with older skiboots\n" + "with: \n" "\n" "powernv-cpufreq: cpufreq pstate min 101 nominal 50 max 0\n" "powernv-cpufreq: Workload Optimized Frequency is enabled in the platform\n" "Disabling lock debugging due to kernel taint\n" "Severe Machine check interrupt [Not recovered]\n" - "=C2=A0 NIP [c000000000098530]: reset_window_regs+0x20/0x220\n" - "=C2=A0 Initiator: CPU\n" - "=C2=A0 Error type: Unknown\n" - "opal: Machine check interrupt unrecoverable: MSR(RI=3D0)\n" + "\302\240 NIP [c000000000098530]: reset_window_regs+0x20/0x220\n" + "\302\240 Initiator: CPU\n" + "\302\240 Error type: Unknown\n" + "opal: Machine check interrupt unrecoverable: MSR(RI=0)\n" "opal: Hardware platform error: Unrecoverable Machine Check exception\n" - "CPU: 1 PID: 1 Comm: swapper/0 Tainted: G=C2=A0=C2=A0=C2=A0M=C2=A0=C2=A0=C2=\n" - "=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A04.13.0-rc7-00708-g=\n" - "8b680911e774-dirty #10\n" + "CPU: 1 PID: 1 Comm: swapper/0 Tainted: G\302\240\302\240\302\240M\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\2404.13.0-rc7-00708-g8b680911e774-dirty #10\n" "task: c000000f22680000 task.stack: c000000f22700000\n" - "NIP:=C2=A0=C2=A0c000000000098530 LR: c000000000098758 CTR: 0000000000000000\n" - "REGS: c00000003ffebd80 TRAP: 0200=C2=A0=C2=A0=C2=A0Tainted: G=C2=A0=C2=A0=\n" - "=C2=A0M=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" - "=C2=A0=C2=A0(4.13.0-rc7-00708-g8b680911e774-dirty)\n" - "MSR:=C2=A0=C2=A09000000008349031 <SF,HV,EE,ME,IR,DR,LE>=C2=A0=C2=A0CR: 2400=\n" - "0224=C2=A0=C2=A0XER: 00000000\n" - "CFAR: c000000000098754 DAR: 00000000100bef30 DSISR: 40000000 SOFTE: 0=C2=A0\n" - "GPR00: c000000000098f44 c000000f22703a00 c000000000eff200 c000000f1cf861e0=\n" - "=C2=A0\n" - "GPR04: c000000f22703a50 0000000000000001 0000000000000fff 0000000000000003=\n" - "=C2=A0\n" - "GPR08: c00c0000842f0000 0000000000000001 0000000000000000 0000000000000000=\n" - "=C2=A0\n" - "GPR12: 0000000000000000 c00000000fd40580 c000000000c03590 c000000000c1f428=\n" - "=C2=A0\n" - "GPR16: c000000000c4a640 c000000000c31360 c000000000c92738 c000000000c92690=\n" - "=C2=A0\n" - "GPR20: c000000000c926a0 c000000000c926f0 c000000f1d672940 0000000000000000=\n" - "=C2=A0\n" - "GPR24: c000000000c92638 0000000000000000 c000000000e888b0 c000000000dce428=\n" - "=C2=A0\n" - "GPR28: 0000000000000002 c000000f0e800000 c000000f22703a50 c000000f1cf861e0=\n" - "=C2=A0\n" + "NIP:\302\240\302\240c000000000098530 LR: c000000000098758 CTR: 0000000000000000\n" + "REGS: c00000003ffebd80 TRAP: 0200\302\240\302\240\302\240Tainted: G\302\240\302\240\302\240M\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240(4.13.0-rc7-00708-g8b680911e774-dirty)\n" + "MSR:\302\240\302\2409000000008349031 <SF,HV,EE,ME,IR,DR,LE>\302\240\302\240CR: 24000224\302\240\302\240XER: 00000000\n" + "CFAR: c000000000098754 DAR: 00000000100bef30 DSISR: 40000000 SOFTE: 0\302\240\n" + "GPR00: c000000000098f44 c000000f22703a00 c000000000eff200 c000000f1cf861e0\302\240\n" + "GPR04: c000000f22703a50 0000000000000001 0000000000000fff 0000000000000003\302\240\n" + "GPR08: c00c0000842f0000 0000000000000001 0000000000000000 0000000000000000\302\240\n" + "GPR12: 0000000000000000 c00000000fd40580 c000000000c03590 c000000000c1f428\302\240\n" + "GPR16: c000000000c4a640 c000000000c31360 c000000000c92738 c000000000c92690\302\240\n" + "GPR20: c000000000c926a0 c000000000c926f0 c000000f1d672940 0000000000000000\302\240\n" + "GPR24: c000000000c92638 0000000000000000 c000000000e888b0 c000000000dce428\302\240\n" + "GPR28: 0000000000000002 c000000f0e800000 c000000f22703a50 c000000f1cf861e0\302\240\n" "NIP [c000000000098530] reset_window_regs+0x20/0x220\n" "LR [c000000000098758] init_winctx_regs+0x28/0x6c0\n" "Call Trace:\n" "[c000000f22703a00] [0000000000000002] 0x2 (unreliable)\n" "[c000000f22703a30] [c000000000098f44] vas_rx_win_open.part.11+0x154/0x210\n" "[c000000f22703ae0] [c000000000d668e8] nx842_powernv_init+0x6b4/0x824\n" - "[c000000f22703c[=C2=A0=C2=A0=C2=A038.412765557,0] OPAL: Reboot requested du=\n" - "e to Platform error.\n" - "[=C2=A0=C2=A0=C2=A038.412828287,3] OPAL: Reboot requested due to Platform e=\n" - "rror.40] [c00000000000ca60] do_one_initcall+0x60/0x1c0\n" + "[c000000f22703c[\302\240\302\240\302\24038.412765557,0] OPAL: Reboot requested due to Platform error.\n" + "[\302\240\302\240\302\24038.412828287,3] OPAL: Reboot requested due to Platform error.40] [c00000000000ca60] do_one_initcall+0x60/0x1c0\n" "\n" "If you see this you need a new skiboot with at least these two patches:\n" "\n" " b503dcf16d vas: Set mmio enable bits in DD2\n" " a5c124072f vas: Set FIRs according to workbook\n" "\n" - "This is a community announcement brought to you by OzLabs.=C2=A0\n" + "This is a community announcement brought to you by OzLabs.\302\240\n" " OzLabs: Making Linux better since 1999\n" "\n" "Mikey\n" @@ -78,188 +62,149 @@ "> Accelerator Switchboard (VAS). VAS allows kernel subsystems and user\n" "> space processes to directly access the Nest Accelerator (NX) engines\n" "> which implement compression and encryption algorithms in the hardware.\n" - ">=20\n" + "> \n" "> NX has been in Power processors since Power7+, but access to the NX\n" "> engines was through the 'icswx' instruction which is only available\n" "> to the kernel/hypervisor. Starting with Power9, access to the NX\n" "> engines is provided to both kernel and user space processes through\n" "> VAS.\n" - ">=20\n" + "> \n" "> The switchboard (i.e VAS) multiplexes accesses between \"receivers\" and\n" "> \"senders\", where the \"receivers\" are typically the NX engines and\n" "> \"senders\" are the kernel subsystems and user processors that wish to\n" - "> access the receivers (NX engines).=C2=A0=C2=A0Once a sender is \"connected=\n" - "\" to\n" + "> access the receivers (NX engines).\302\240\302\240Once a sender is \"connected\" to\n" "> a receiver through the switchboard, the senders can submit compression/\n" "> encryption requests to the hardware using the new (PowerISA 3.0)\n" "> \"copy\" and \"paste\" instructions.\n" - ">=20\n" + "> \n" "> In the initial OPAL and PowerNV kernel patchsets, the \"senders\" can\n" "> only be kernel subsystems (eg NX-842 driver) and receivers can only\n" "> be the NX-842 engine. Follow-on patch sets will allow senders/receivers\n" "> to be user-space processes and receivers to be NX-GZIP engines.\n" - ">=20\n" + "> \n" "> Provides:\n" - ">=20\n" + "> \n" "> \tThis kernel patch set configures the VAS subsystems and provides\n" "> \tkernel interfaces to drivers like NX-842 to open receive and send\n" "> \twindows in VAS and to submit compression requests to the NX engine.\n" - ">=20\n" + "> \n" "> Requires:\n" - ">=20\n" + "> \n" "> \tThis patch set needs corresponding VAS/NX skiboot patches which\n" "> \twere merged into skiboot tree. i.e skiboot must include:\n" "> \tcommit b503dcf (\"vas: Set mmio enable bits in DD2\")\n" - ">=20\n" + "> \n" "> Tests:\n" - "> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0In-kernel compression req=\n" - "uests were tested on DD1 and DD2 POWER9\n" + "> \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240In-kernel compression requests were tested on DD1 and DD2 POWER9\n" "> \thardware using compression self-test module and the following\n" "> \tNX-842 patch set from Haren Myneni:\n" - ">=20\n" - "> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0https://lists.ozlabs.org/=\n" - "pipermail/linuxppc-dev/2017-July/160620.html\n" - ">=20\n" + "> \n" + "> \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-July/160620.html\n" + "> \n" "> \tand by dropping the last parameters to both vas_copy_crb() and\n" "> \tvas_paste_crb() calls in drivers/crypto/nx/nx-842-powernv.c.\n" "> \tSee also PATCH 10/10.\n" - ">=20\n" + "> \n" "> Git Tree:\n" - ">=20\n" - "> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0https://github.com/sukade=\n" - "v/linux/=C2=A0\n" + "> \n" + "> \302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240https://github.com/sukadev/linux/\302\240\n" "> \tBranch: vas-kern-v8\n" - ">=20\n" + "> \n" "> Thanks to input from Ben Herrenschmidt, Michael Neuling, Michael Ellerman\n" "> and Haren Myneni.\n" - ">=20\n" + "> \n" "> Changelog[v8]:\n" "> \t- [Michael Ellerman] Use kernel int types (u64, u32 etc); make VAS\n" - "> \t=C2=A0=C2=A0a built-in rather than a module; drop unnecessary fields fro=\n" - "m\n" - "> \t=C2=A0=C2=A0struct vas_instance; Update ISA references; use 0 or 1 with\n" - "> \t=C2=A0=C2=A0SET_FIELD macros instead of bool; skip writing to SPARE regi=\n" - "sters;\n" - "> \t=C2=A0=C2=A0minor cleanup of debug/error messages; retry if ida_get_new(=\n" - ")\n" - "> \t=C2=A0=C2=A0fails with EAGAIN; fix couple of leaks in ids in error handl=\n" - "ing;\n" - "> \t=C2=A0=C2=A0drop vas_initialized() check; drop vas_win_id() and vas_past=\n" - "e_addr()\n" - "> \t=C2=A0=C2=A0interfaces as they are not yet used; Set task_state() and fi=\n" - "x\n" - "> \t=C2=A0=C2=A0parameter to schedule_timeout(); Reuse existing copy/paste m=\n" - "acros\n" - "> \t=C2=A0=C2=A0drop unnecessary parameters and add cr0 to clobbers list\n" - ">=20\n" + "> \t\302\240\302\240a built-in rather than a module; drop unnecessary fields from\n" + "> \t\302\240\302\240struct vas_instance; Update ISA references; use 0 or 1 with\n" + "> \t\302\240\302\240SET_FIELD macros instead of bool; skip writing to SPARE registers;\n" + "> \t\302\240\302\240minor cleanup of debug/error messages; retry if ida_get_new()\n" + "> \t\302\240\302\240fails with EAGAIN; fix couple of leaks in ids in error handling;\n" + "> \t\302\240\302\240drop vas_initialized() check; drop vas_win_id() and vas_paste_addr()\n" + "> \t\302\240\302\240interfaces as they are not yet used; Set task_state() and fix\n" + "> \t\302\240\302\240parameter to schedule_timeout(); Reuse existing copy/paste macros\n" + "> \t\302\240\302\240drop unnecessary parameters and add cr0 to clobbers list\n" + "> \n" "> Changelog[v7]:\n" "> \t- Drop support for user space send/receive FTW windows (will be\n" - "> \t=C2=A0=C2=A0posted separately) Simplifies the rx-win-open interface a bi=\n" - "t.\n" - "> \t- [Michael Ellerman] Move GET_FIELD/SET_FIELD macros from=C2=A0\n" - "> \t=C2=A0=C2=A0uapi/asm/vas.h to asm/vas.h.\n" - ">=20\n" + "> \t\302\240\302\240posted separately) Simplifies the rx-win-open interface a bit.\n" + "> \t- [Michael Ellerman] Move GET_FIELD/SET_FIELD macros from\302\240\n" + "> \t\302\240\302\240uapi/asm/vas.h to asm/vas.h.\n" + "> \n" "> Changelog[v6]\n" "> \t- Add support for user space send/receive FTW windows\n" "> \t- Add a new, NX-FTW driver which provides the FTW user interface\n" - ">=20\n" + "> \n" "> Changelog[v5]\n" "> \t- [Ben Herrenschmidt] Make VAS a platform device in the device tree\n" - "> \t=C2=A0=C2=A0and use the core platform functions to parse the VAS propert=\n" - "ies.\n" - "> \t=C2=A0=C2=A0Map the VAS MMIO regions as non-cachable and paste regions a=\n" - "s\n" - "> \t=C2=A0=C2=A0cachable. Use CONFIG_PPC_VAS rather than CONFIG_VAS; Don't a=\n" - "ssume\n" - "> \t=C2=A0=C2=A0VAS ids are sequential.\n" + "> \t\302\240\302\240and use the core platform functions to parse the VAS properties.\n" + "> \t\302\240\302\240Map the VAS MMIO regions as non-cachable and paste regions as\n" + "> \t\302\240\302\240cachable. Use CONFIG_PPC_VAS rather than CONFIG_VAS; Don't assume\n" + "> \t\302\240\302\240VAS ids are sequential.\n" "> \t- Copy the FIFO address as is into LFIFO_BAR (don't shift it).\n" - ">=20\n" + "> \n" "> Changelog[v4]\n" "> \tComments from Michael Neuling:\n" "> \t- Move VAS code from drivers/misc/vas to arch/powerpc/platforms/powernv\n" - "> \t=C2=A0=C2=A0since VAS only provides interfaces to other drivers like NX-=\n" - "842.\n" + "> \t\302\240\302\240since VAS only provides interfaces to other drivers like NX-842.\n" "> \t- Drop vas-internal.h and use vas.h in separate dirs for VAS\n" - "> \t=C2=A0=C2=A0internal, kernel API and user API\n" + "> \t\302\240\302\240internal, kernel API and user API\n" "> \t- Rather than create 6 separate device tree properties windows\n" - "> \t=C2=A0=C2=A0and window context, combine them into 6 \"reg\" properties.\n" + "> \t\302\240\302\240and window context, combine them into 6 \"reg\" properties.\n" "> \t- Drop vas_window_reset() since windows are reset/cleared before\n" - "> \t=C2=A0=C2=A0being assigned to kernel/users.\n" + "> \t\302\240\302\240being assigned to kernel/users.\n" "> \t- Use ilog2() and radix_enabled() helpers\n" - ">=20\n" + "> \n" "> Changelog[v3]\n" "> \t- Rebase to v4.11-rc1\n" "> \t- Add interfaces to initialize send/receive window attributes to\n" - "> \t=C2=A0=C2=A0defaults that drivers can use (see arch/powerpc/include/asm/=\n" - "vas.h)\n" + "> \t\302\240\302\240defaults that drivers can use (see arch/powerpc/include/asm/vas.h)\n" "> \t- Modify interface vas_paste() to return 0 or error code\n" "> \t- Fix a bug in setting Translation Control Mode (0b11 not 0x11)\n" - "> \t- Enable send-window-credit checking=C2=A0\n" - "> \t- Reorg code=C2=A0=C2=A0in vas_win_close()\n" + "> \t- Enable send-window-credit checking\302\240\n" + "> \t- Reorg code\302\240\302\240in vas_win_close()\n" "> \t- Minor reorgs and tweaks to register field settings to make it\n" - "> \t=C2=A0=C2=A0easier to add support for user space windows.\n" + "> \t\302\240\302\240easier to add support for user space windows.\n" "> \t- Skip writing to read-only registers\n" "> \t- Start window indexing from 0 rather than 1\n" - ">=20\n" + "> \n" "> Changelog[v2]\n" "> \t- Use vas-id, HVWC, UWC and paste address, entries from device tree\n" - "> \t=C2=A0=C2=A0rather than defining/computing them in kernel and reorg code=\n" - ".\n" - ">=20\n" - ">=20\n" + "> \t\302\240\302\240rather than defining/computing them in kernel and reorg code.\n" + "> \n" + "> \n" "> Sukadev Bhattiprolu (10):\n" - "> =C2=A0 powerpc/vas: Define macros, register fields and structures\n" - "> =C2=A0 Move GET_FIELD/SET_FIELD to vas.h\n" - "> =C2=A0 powerpc/vas: Define vas_init() and vas_exit()\n" - "> =C2=A0 powerpc/vas: Define helpers to access MMIO regions\n" - "> =C2=A0 powerpc/vas: Define helpers to init window context\n" - "> =C2=A0 powerpc/vas: Define helpers to alloc/free windows\n" - "> =C2=A0 powerpc/vas: Define vas_rx_win_open() interface\n" - "> =C2=A0 powerpc/vas: Define vas_win_close() interface\n" - "> =C2=A0 powerpc/vas: Define vas_tx_win_open()\n" - "> =C2=A0 powerpc/vas: Define copy/paste interfaces\n" - ">=20\n" - "> =C2=A0.../devicetree/bindings/powerpc/ibm,vas.txt=C2=A0=C2=A0=C2=A0=C2=A0=\n" - "=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A0=C2=A023 +\n" - "> =C2=A0MAINTAINERS=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" - "=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n" - "=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" - "=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A0=C2=A0=C2=A09 +\n" - "> =C2=A0arch/powerpc/include/asm/ppc-opcode.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" - "=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A0=C2=A0=\n" - "=C2=A02 +\n" - "> =C2=A0arch/powerpc/include/asm/vas.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" - "=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n" - "=A0=C2=A0=C2=A0|=C2=A0=C2=A0160 +++\n" - "> =C2=A0arch/powerpc/platforms/powernv/Kconfig=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n" - "=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A0=C2=A014 +\n" - "> =C2=A0arch/powerpc/platforms/powernv/Makefile=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n" - "=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A0=C2=A0=C2=A01 +\n" - "> =C2=A0arch/powerpc/platforms/powernv/copy-paste.h=C2=A0=C2=A0=C2=A0=C2=A0=\n" - "=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A0=C2=A046 +\n" - "> =C2=A0arch/powerpc/platforms/powernv/vas-window.c=C2=A0=C2=A0=C2=A0=C2=A0=\n" - "=C2=A0=C2=A0=C2=A0=C2=A0| 1134\n" + "> \302\240 powerpc/vas: Define macros, register fields and structures\n" + "> \302\240 Move GET_FIELD/SET_FIELD to vas.h\n" + "> \302\240 powerpc/vas: Define vas_init() and vas_exit()\n" + "> \302\240 powerpc/vas: Define helpers to access MMIO regions\n" + "> \302\240 powerpc/vas: Define helpers to init window context\n" + "> \302\240 powerpc/vas: Define helpers to alloc/free windows\n" + "> \302\240 powerpc/vas: Define vas_rx_win_open() interface\n" + "> \302\240 powerpc/vas: Define vas_win_close() interface\n" + "> \302\240 powerpc/vas: Define vas_tx_win_open()\n" + "> \302\240 powerpc/vas: Define copy/paste interfaces\n" + "> \n" + "> \302\240.../devicetree/bindings/powerpc/ibm,vas.txt\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240\302\24023 +\n" + "> \302\240MAINTAINERS\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240\302\240\302\2409 +\n" + "> \302\240arch/powerpc/include/asm/ppc-opcode.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240\302\240\302\2402 +\n" + "> \302\240arch/powerpc/include/asm/vas.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240160 +++\n" + "> \302\240arch/powerpc/platforms/powernv/Kconfig\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240\302\24014 +\n" + "> \302\240arch/powerpc/platforms/powernv/Makefile\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240\302\240\302\2401 +\n" + "> \302\240arch/powerpc/platforms/powernv/copy-paste.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240\302\24046 +\n" + "> \302\240arch/powerpc/platforms/powernv/vas-window.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240| 1134\n" "> ++++++++++++++++++++\n" - "> =C2=A0arch/powerpc/platforms/powernv/vas.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" - "=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A015=\n" - "1 +++\n" - "> =C2=A0arch/powerpc/platforms/powernv/vas.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" - "=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A046=\n" - "7 ++++++++\n" - "> =C2=A0drivers/crypto/nx/nx-842-powernv.c=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n" - "=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=\n" - "=A0=C2=A0=C2=A0=C2=A07 +-\n" - "> =C2=A0drivers/crypto/nx/nx-842.h=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=\n" - "=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=\n" - "=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0|=C2=A0=C2=A0=C2=A0=C2=A05 -\n" - "> =C2=A012 files changed, 2011 insertions(+), 8 deletions(-)\n" - "> =C2=A0create mode 100644 Documentation/devicetree/bindings/powerpc/ibm,va=\n" - "s.txt\n" - "> =C2=A0create mode 100644 arch/powerpc/include/asm/vas.h\n" - "> =C2=A0create mode 100644 arch/powerpc/platforms/powernv/copy-paste.h\n" - "> =C2=A0create mode 100644 arch/powerpc/platforms/powernv/vas-window.c\n" - "> =C2=A0create mode 100644 arch/powerpc/platforms/powernv/vas.c\n" - "> =C2=A0create mode 100644 arch/powerpc/platforms/powernv/vas.h\n" - >=20 + "> \302\240arch/powerpc/platforms/powernv/vas.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240151 +++\n" + "> \302\240arch/powerpc/platforms/powernv/vas.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240467 ++++++++\n" + "> \302\240drivers/crypto/nx/nx-842-powernv.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240\302\240\302\2407 +-\n" + "> \302\240drivers/crypto/nx/nx-842.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\240\302\240\302\2405 -\n" + "> \302\24012 files changed, 2011 insertions(+), 8 deletions(-)\n" + "> \302\240create mode 100644 Documentation/devicetree/bindings/powerpc/ibm,vas.txt\n" + "> \302\240create mode 100644 arch/powerpc/include/asm/vas.h\n" + "> \302\240create mode 100644 arch/powerpc/platforms/powernv/copy-paste.h\n" + "> \302\240create mode 100644 arch/powerpc/platforms/powernv/vas-window.c\n" + "> \302\240create mode 100644 arch/powerpc/platforms/powernv/vas.c\n" + "> \302\240create mode 100644 arch/powerpc/platforms/powernv/vas.h\n" + > -01a3b09b7046126f369fc3e312fc04b962618f21a13ff38d137f1eae6fcda3e2 +7cbcdd9c80e407ee960fe1146e84f310bc7ce36274b7a2142fe5da09f28144ee
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