All of lore.kernel.org
 help / color / mirror / Atom feed
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>,
	Intel graphics driver community testing & development
	<intel-gfx@lists.freedesktop.org>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 2/2] drm/i915: Simplify i915_reg_read_ioctl
Date: Mon, 11 Sep 2017 13:49:18 +0300	[thread overview]
Message-ID: <1505126958.4107.35.camel@linux.intel.com> (raw)
In-Reply-To: <20170908122413.GG4914@intel.com>

On Fri, 2017-09-08 at 15:24 +0300, Ville Syrjälä wrote:
> On Fri, Sep 08, 2017 at 12:29:35PM +0300, Joonas Lahtinen wrote:
> > @@ -1292,72 +1292,71 @@ void intel_uncore_fini(struct drm_i915_private *dev_priv)
> >  	intel_uncore_forcewake_reset(dev_priv, false);
> >  }
> >  
> > -#define GEN_RANGE(l, h) GENMASK((h) - 1, (l) - 1)
> > -
> > -static const struct register_whitelist {
> > -	i915_reg_t offset_ldw, offset_udw;
> > -	uint32_t size;
> > -	/* supported gens, 0x10 for 4, 0x30 for 4 and 5, etc. */
> > -	uint32_t gen_bitmask;
> > -} whitelist[] = {
> > -	{ .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),
> > -	  .offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE),
> > -	  .size = 8, .gen_bitmask = GEN_RANGE(4, 10) },
> > -};
> > +static const struct reg_whitelist {
> > +	i915_reg_t offset_ldw;
> > +	i915_reg_t offset_udw;
> > +	unsigned long gen_mask;
> 
> 'long' seems like a bad type for something like this. Changes size on 32
> vs 64 bit. Also we could make do with 16 bits for now, though with
> the single whitelist entry this only has a small impact.

It's actually the type GCC wants because GENMASK is used internally to
produce the mask, otherwise it complained. We should likely use
unsigned long in dev_priv too, with a BUILD_BUG_ON(max_gen >
BITS_PER_LONG) check.

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2017-09-11 10:49 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-08  9:29 [PATCH 1/2] drm/i915: Introduce INTEL_GEN_MASK Joonas Lahtinen
2017-09-08  9:29 ` [PATCH 2/2] drm/i915: Simplify i915_reg_read_ioctl Joonas Lahtinen
2017-09-08 10:13   ` Chris Wilson
2017-09-08 11:22     ` Joonas Lahtinen
2017-09-08 12:24   ` Ville Syrjälä
2017-09-11 10:49     ` Joonas Lahtinen [this message]
2017-09-11 12:19       ` Ville Syrjälä
2017-09-08  9:39 ` [PATCH 1/2] drm/i915: Introduce INTEL_GEN_MASK Jani Nikula
2017-09-08 11:28   ` Joonas Lahtinen
2017-09-08 11:41   ` Tvrtko Ursulin
2017-09-08 12:20     ` Jani Nikula
2017-09-08 10:15 ` ✗ Fi.CI.BAT: failure for series starting with [1/2] " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1505126958.4107.35.camel@linux.intel.com \
    --to=joonas.lahtinen@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@intel.com \
    --cc=rodrigo.vivi@intel.com \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.