diff for duplicates of <1506711271.3461.7.camel@synopsys.com> diff --git a/a/1.txt b/N1/1.txt index 3eea43a..3c8c4eb 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,24 +1,24 @@ -On Fri, 2017-09-29@11:34 -0700, Vineet Gupta wrote: +On Fri, 2017-09-29 at 11:34 -0700, Vineet Gupta wrote: > On 09/28/2017 07:33 AM, Eugeniy Paltsev wrote: > > Add temporary fix to HSDK platform code to setup CPU frequency > > to 1GHz on early boot. > > We can remove this fix when smart hsdk pll driver will be > > introduced, see discussion: -> > https://www.mail-archive.com/linux-snps-arc at lists.infradead.org/msg02689.html +> > https://www.mail-archive.com/linux-snps-arc@lists.infradead.org/msg02689.html > > -> > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com> +> > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> > > --- -> > ? arch/arc/plat-hsdk/platform.c | 42 ++++++++++++++++++++++++++++++++++++++++++ -> > ? 1 file changed, 42 insertions(+) +> > arch/arc/plat-hsdk/platform.c | 42 ++++++++++++++++++++++++++++++++++++++++++ +> > 1 file changed, 42 insertions(+) > > > > diff --git a/arch/arc/plat-hsdk/platform.c b/arch/arc/plat-hsdk/platform.c > > index a2e7fd1..744e62e 100644 > > --- a/arch/arc/plat-hsdk/platform.c > > +++ b/arch/arc/plat-hsdk/platform.c > > @@ -38,6 +38,42 @@ static void __init hsdk_init_per_cpu(unsigned int cpu) -> > ? #define CREG_PAE (CREG_BASE + 0x180) -> > ? #define CREG_PAE_UPDATE (CREG_BASE + 0x194) -> > ?? +> > #define CREG_PAE (CREG_BASE + 0x180) +> > #define CREG_PAE_UPDATE (CREG_BASE + 0x194) +> > > > +#define CREG_CORE_IF_CLK_DIV (CREG_BASE + 0x4B8) > > +#define CREG_CORE_IF_CLK_DIV_2 0x1 > > +#define CGU_BASE ARC_PERIPHERAL_BASE @@ -40,9 +40,9 @@ On Fri, 2017-09-29@11:34 -0700, Vineet Gupta wrote: > > + u32 timeout = HSDK_PLL_LOCK_TIMEOUT; > > + > > + /* -> > + ?* As we set cpu clock which exceeds 500MHz, the divider for the interface -> > + ?* clock must be programmed to div-by-2. -> > + ?*/ +> > + * As we set cpu clock which exceeds 500MHz, the divider for the interface +> > + * clock must be programmed to div-by-2. +> > + */ > > + iowrite32(CREG_CORE_IF_CLK_DIV_2, (void __iomem *) CREG_CORE_IF_CLK_DIV); > > + > > + /* Set cpu clock to 1GHz */ @@ -55,22 +55,22 @@ On Fri, 2017-09-29@11:34 -0700, Vineet Gupta wrote: > > + pr_err("Failed to setup CPU frequency to 1GHz!"); > > +} > > + -> > ? static void __init hsdk_init_early(void) -> > ? { -> > ?? /* +> > static void __init hsdk_init_early(void) +> > { +> > /* > > @@ -52,6 +88,12 @@ static void __init hsdk_init_early(void) -> > ?? -> > ?? /* Really apply settings made above */ -> > ?? writel(1, (void __iomem *) CREG_PAE_UPDATE); +> > +> > /* Really apply settings made above */ +> > writel(1, (void __iomem *) CREG_PAE_UPDATE); > > + > > + /* -> > + ?* Setup CPU frequency to 1GHz. -> > + ?* TODO: remove it after smart hsdk pll driver will be introduced. -> > + ?*/ +> > + * Setup CPU frequency to 1GHz. +> > + * TODO: remove it after smart hsdk pll driver will be introduced. +> > + */ > > + hsdk_set_cpu_freq_1ghz(); -> > ? } +> > } > -> While this suffices our needs in the interim, is there a way to invoke the? +> While this suffices our needs in the interim, is there a way to invoke the > existing clk driver to achieve the same results ? There is only one place where we can add call of existing clk driver to set @@ -80,8 +80,8 @@ probing: ------------------arch/arc/kernel/setup.c-------------------------- /* -?* Called from start_kernel() - boot CPU only -?*/ + * Called from start_kernel() - boot CPU only + */ void __init time_init(void) { of_clk_init(NULL); @@ -91,13 +91,13 @@ void __init time_init(void) --------------------------->8-------------------------------------- It will be look like that: -https://www.mail-archive.com/linux-snps-arc at lists.infradead.org/msg02587.html +https://www.mail-archive.com/linux-snps-arc@lists.infradead.org/msg02587.html -> > ?? -> > ? static const char *hsdk_compat[] __initconst = { +> > +> > static const char *hsdk_compat[] __initconst = { > > > > -- -?Eugeniy Paltsev + Eugeniy Paltsev diff --git a/a/content_digest b/N1/content_digest index 3e82cf2..e5da94f 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,32 +1,37 @@ "ref\020170928143329.10875-1-Eugeniy.Paltsev@synopsys.com\0" "ref\02a6c6616-3620-f028-9cca-ad8e8047db90@synopsys.com\0" - "From\0Eugeniy.Paltsev@synopsys.com (Eugeniy Paltsev)\0" - "Subject\0[PATCH] ARC: [plat-hsdk]: Temporary fix to set CPU frequency to 1GHz\0" + "From\0Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>\0" + "Subject\0Re: [PATCH] ARC: [plat-hsdk]: Temporary fix to set CPU frequency to 1GHz\0" "Date\0Fri, 29 Sep 2017 18:54:31 +0000\0" - "To\0linux-snps-arc@lists.infradead.org\0" + "To\0Eugeniy.Paltsev@synopsys.com <Eugeniy.Paltsev@synopsys.com>" + Vineet Gupta <Vineet.Gupta1@synopsys.com> + " linux-snps-arc@lists.infradead.org <linux-snps-arc@lists.infradead.org>\0" + "Cc\0linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org>" + Vineet.Gupta1@synopsys.com <Vineet.Gupta1@synopsys.com> + " Alexey.Brodkin@synopsys.com <Alexey.Brodkin@synopsys.com>\0" "\00:1\0" "b\0" - "On Fri, 2017-09-29@11:34 -0700, Vineet Gupta wrote:\n" + "On Fri, 2017-09-29 at 11:34 -0700, Vineet Gupta wrote:\n" "> On 09/28/2017 07:33 AM, Eugeniy Paltsev wrote:\n" "> > Add temporary fix to HSDK platform code to setup CPU frequency\n" "> > to 1GHz on early boot.\n" "> > We can remove this fix when smart hsdk pll driver will be\n" "> > introduced, see discussion:\n" - "> > https://www.mail-archive.com/linux-snps-arc at lists.infradead.org/msg02689.html\n" + "> > https://www.mail-archive.com/linux-snps-arc@lists.infradead.org/msg02689.html\n" "> > \n" - "> > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev at synopsys.com>\n" + "> > Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>\n" "> > ---\n" - "> > ? arch/arc/plat-hsdk/platform.c | 42 ++++++++++++++++++++++++++++++++++++++++++\n" - "> > ? 1 file changed, 42 insertions(+)\n" + "> > \302\240 arch/arc/plat-hsdk/platform.c | 42 ++++++++++++++++++++++++++++++++++++++++++\n" + "> > \302\240 1 file changed, 42 insertions(+)\n" "> > \n" "> > diff --git a/arch/arc/plat-hsdk/platform.c b/arch/arc/plat-hsdk/platform.c\n" "> > index a2e7fd1..744e62e 100644\n" "> > --- a/arch/arc/plat-hsdk/platform.c\n" "> > +++ b/arch/arc/plat-hsdk/platform.c\n" "> > @@ -38,6 +38,42 @@ static void __init hsdk_init_per_cpu(unsigned int cpu)\n" - "> > ? #define CREG_PAE\t\t(CREG_BASE + 0x180)\n" - "> > ? #define CREG_PAE_UPDATE\t\t(CREG_BASE + 0x194)\n" - "> > ??\n" + "> > \302\240 #define CREG_PAE\t\t(CREG_BASE + 0x180)\n" + "> > \302\240 #define CREG_PAE_UPDATE\t\t(CREG_BASE + 0x194)\n" + "> > \302\240\302\240\n" "> > +#define CREG_CORE_IF_CLK_DIV\t(CREG_BASE + 0x4B8)\n" "> > +#define CREG_CORE_IF_CLK_DIV_2\t0x1\n" "> > +#define CGU_BASE\t\tARC_PERIPHERAL_BASE\n" @@ -48,9 +53,9 @@ "> > +\tu32 timeout = HSDK_PLL_LOCK_TIMEOUT;\n" "> > +\n" "> > +\t/*\n" - "> > +\t?* As we set cpu clock which exceeds 500MHz, the divider for the interface\n" - "> > +\t?* clock must be programmed to div-by-2.\n" - "> > +\t?*/\n" + "> > +\t\302\240* As we set cpu clock which exceeds 500MHz, the divider for the interface\n" + "> > +\t\302\240* clock must be programmed to div-by-2.\n" + "> > +\t\302\240*/\n" "> > +\tiowrite32(CREG_CORE_IF_CLK_DIV_2, (void __iomem *) CREG_CORE_IF_CLK_DIV);\n" "> > +\n" "> > +\t/* Set cpu clock to 1GHz */\n" @@ -63,22 +68,22 @@ "> > +\t\tpr_err(\"Failed to setup CPU frequency to 1GHz!\");\n" "> > +}\n" "> > +\n" - "> > ? static void __init hsdk_init_early(void)\n" - "> > ? {\n" - "> > ??\t/*\n" + "> > \302\240 static void __init hsdk_init_early(void)\n" + "> > \302\240 {\n" + "> > \302\240\302\240\t/*\n" "> > @@ -52,6 +88,12 @@ static void __init hsdk_init_early(void)\n" - "> > ??\n" - "> > ??\t/* Really apply settings made above */\n" - "> > ??\twritel(1, (void __iomem *) CREG_PAE_UPDATE);\n" + "> > \302\240\302\240\n" + "> > \302\240\302\240\t/* Really apply settings made above */\n" + "> > \302\240\302\240\twritel(1, (void __iomem *) CREG_PAE_UPDATE);\n" "> > +\n" "> > +\t/*\n" - "> > +\t?* Setup CPU frequency to 1GHz.\n" - "> > +\t?* TODO: remove it after smart hsdk pll driver will be introduced.\n" - "> > +\t?*/\n" + "> > +\t\302\240* Setup CPU frequency to 1GHz.\n" + "> > +\t\302\240* TODO: remove it after smart hsdk pll driver will be introduced.\n" + "> > +\t\302\240*/\n" "> > +\thsdk_set_cpu_freq_1ghz();\n" - "> > ? }\n" + "> > \302\240 }\n" "> \n" - "> While this suffices our needs in the interim, is there a way to invoke the?\n" + "> While this suffices our needs in the interim, is there a way to invoke the\302\240\n" "> existing clk driver to achieve the same results ?\n" "\n" "There is only one place where we can add call of existing clk driver to set\n" @@ -88,8 +93,8 @@ "\n" "------------------arch/arc/kernel/setup.c--------------------------\n" "/*\n" - "?* Called from start_kernel() - boot CPU only\n" - "?*/\n" + "\302\240* Called from start_kernel() - boot CPU only\n" + "\302\240*/\n" "void __init time_init(void)\n" "{\n" "\tof_clk_init(NULL);\n" @@ -99,15 +104,15 @@ "--------------------------->8--------------------------------------\n" "\n" "It will be look like that:\n" - "https://www.mail-archive.com/linux-snps-arc at lists.infradead.org/msg02587.html\n" + "https://www.mail-archive.com/linux-snps-arc@lists.infradead.org/msg02587.html\n" "\n" "\n" - "> > ??\n" - "> > ? static const char *hsdk_compat[] __initconst = {\n" + "> > \302\240\302\240\n" + "> > \302\240 static const char *hsdk_compat[] __initconst = {\n" "> > \n" "> \n" "> \n" "-- \n" - ?Eugeniy Paltsev + "\302\240Eugeniy Paltsev" -f33c107d8c8049838eb267f500508cba0283ca7a11c3f5327e06f244b48cd242 +afb88155eb4a0b9d543874a7c7415cf3b8d53cdc19e875c633c12d1933806208
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