diff for duplicates of <1507551.YPleCY5ZQt@phil> diff --git a/a/1.txt b/N1/1.txt index c17e602..fd2f576 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,12 +1,12 @@ Hi Xing, -Am Samstag, 26. März 2016, 14:37:54 schrieb Xing Zheng: +Am Samstag, 26. M?rz 2016, 14:37:54 schrieb Xing Zheng: > Add devicetree bindings for Rockchip cru which found on > Rockchip SoCs. > -> Signed-off-by: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org> -> Signed-off-by: Jianqun Xu <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> -> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> +> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> +> Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> +> Acked-by: Rob Herring <robh@kernel.org> > --- > > Changes in v5: None @@ -89,19 +89,19 @@ maybe? > + > +Example: General Register Files > + -> + pmugrf: syscon@ff320000 { +> + pmugrf: syscon at ff320000 { > + compatible = "rockchip,rk3399-pmugrf", "syscon"; > + reg = <0x0 0xff320000 0x0 0x1000>; > + }; > + -> + grf: syscon@ff770000 { +> + grf: syscon at ff770000 { > + compatible = "rockchip,rk3399-grf", "syscon"; > + reg = <0x0 0xff770000 0x0 0x10000>; > + }; > + > +Example: Clock controller node: > + -> + pmucru: pmu-clock-controller@ff750000 { +> + pmucru: pmu-clock-controller at ff750000 { > + compatible = "rockchip,rk3399-pmucru"; > + reg = <0x0 0xff750000 0x0 0x1000>; > + rockchip,grf = <&pmugrf>; @@ -109,7 +109,7 @@ maybe? > + #reset-cells = <1>; > + }; > + -> + cru: clock-controller@ff760000 { +> + cru: clock-controller at ff760000 { > + compatible = "rockchip,rk3399-cru"; > + reg = <0x0 0xff760000 0x0 0x1000>; > + rockchip,grf = <&grf>; @@ -124,7 +124,7 @@ also here drop grf nodes and rockchip,grf properties? > +Example: UART controller node that consumes the clock generated by the > clock + controller: > + -> + uart0: serial@ff1a0000 { +> + uart0: serial at ff1a0000 { > + compatible = "rockchip,rk3399-uart", "snps,dw-apb-uart"; > + reg = <0x0 0xff180000 0x0 0x100>; > + clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>; @@ -133,7 +133,3 @@ also here drop grf nodes and rockchip,grf properties? > + reg-shift = <2>; > + reg-io-width = <4>; > + }; --- -To unsubscribe from this list: send the line "unsubscribe devicetree" in -the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index ebb98ea..931077e 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,35 +1,20 @@ "ref\01458974276-10325-1-git-send-email-zhengxing@rock-chips.com\0" "ref\01458974276-10325-3-git-send-email-zhengxing@rock-chips.com\0" - "ref\01458974276-10325-3-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org\0" - "From\0Heiko St\303\274bner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\0" - "Subject\0Re: [PATCH v5 2/4] dt-bindings: add bindings for rk3399 clock controller\0" + "From\0heiko@sntech.de (Heiko St\303\274bner)\0" + "Subject\0[PATCH v5 2/4] dt-bindings: add bindings for rk3399 clock controller\0" "Date\0Mon, 28 Mar 2016 01:52:12 +0200\0" - "To\0Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\0" - "Cc\0linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" - huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org - jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org - elaine.zhang-TNX95d0MmH7DzftRWevZcw@public.gmane.org - dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org - Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> - Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> - Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> - Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> - Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> - devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - " linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Hi Xing,\n" "\n" - "Am Samstag, 26. M\303\244rz 2016, 14:37:54 schrieb Xing Zheng:\n" + "Am Samstag, 26. M?rz 2016, 14:37:54 schrieb Xing Zheng:\n" "> Add devicetree bindings for Rockchip cru which found on\n" "> Rockchip SoCs.\n" "> \n" - "> Signed-off-by: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n" - "> Signed-off-by: Jianqun Xu <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n" - "> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\n" + "> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>\n" + "> Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>\n" + "> Acked-by: Rob Herring <robh@kernel.org>\n" "> ---\n" "> \n" "> Changes in v5: None\n" @@ -112,19 +97,19 @@ "> +\n" "> +Example: General Register Files\n" "> +\n" - "> +\tpmugrf: syscon@ff320000 {\n" + "> +\tpmugrf: syscon at ff320000 {\n" "> +\t\tcompatible = \"rockchip,rk3399-pmugrf\", \"syscon\";\n" "> +\t\treg = <0x0 0xff320000 0x0 0x1000>;\n" "> +\t};\n" "> +\n" - "> +\tgrf: syscon@ff770000 {\n" + "> +\tgrf: syscon at ff770000 {\n" "> +\t\tcompatible = \"rockchip,rk3399-grf\", \"syscon\";\n" "> +\t\treg = <0x0 0xff770000 0x0 0x10000>;\n" "> +\t};\n" "> +\n" "> +Example: Clock controller node:\n" "> +\n" - "> +\tpmucru: pmu-clock-controller@ff750000 {\n" + "> +\tpmucru: pmu-clock-controller at ff750000 {\n" "> +\t\tcompatible = \"rockchip,rk3399-pmucru\";\n" "> +\t\treg = <0x0 0xff750000 0x0 0x1000>;\n" "> +\t\trockchip,grf = <&pmugrf>;\n" @@ -132,7 +117,7 @@ "> +\t\t#reset-cells = <1>;\n" "> +\t};\n" "> +\n" - "> +\tcru: clock-controller@ff760000 {\n" + "> +\tcru: clock-controller at ff760000 {\n" "> +\t\tcompatible = \"rockchip,rk3399-cru\";\n" "> +\t\treg = <0x0 0xff760000 0x0 0x1000>;\n" "> +\t\trockchip,grf = <&grf>;\n" @@ -147,7 +132,7 @@ "> +Example: UART controller node that consumes the clock generated by the\n" "> clock + controller:\n" "> +\n" - "> +\tuart0: serial@ff1a0000 {\n" + "> +\tuart0: serial at ff1a0000 {\n" "> +\t\tcompatible = \"rockchip,rk3399-uart\", \"snps,dw-apb-uart\";\n" "> +\t\treg = <0x0 0xff180000 0x0 0x100>;\n" "> +\t\tclocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;\n" @@ -155,10 +140,6 @@ "> +\t\tinterrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;\n" "> +\t\treg-shift = <2>;\n" "> +\t\treg-io-width = <4>;\n" - "> +\t};\n" - "--\n" - "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" - "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - More majordomo info at http://vger.kernel.org/majordomo-info.html + "> +\t};" -8f3bbab470eaef6d7075dd1c095241a7997ec9cccbc0589ca18aea7a5ca623a5 +17a17721575b794aac3d4556858f975d756e5f662f6006a783f847ab14930d25
diff --git a/a/1.txt b/N2/1.txt index c17e602..90548c5 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -4,9 +4,9 @@ Am Samstag, 26. März 2016, 14:37:54 schrieb Xing Zheng: > Add devicetree bindings for Rockchip cru which found on > Rockchip SoCs. > -> Signed-off-by: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org> -> Signed-off-by: Jianqun Xu <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org> -> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> +> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> +> Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> +> Acked-by: Rob Herring <robh@kernel.org> > --- > > Changes in v5: None @@ -133,7 +133,3 @@ also here drop grf nodes and rockchip,grf properties? > + reg-shift = <2>; > + reg-io-width = <4>; > + }; --- -To unsubscribe from this list: send the line "unsubscribe devicetree" in -the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org -More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N2/content_digest index ebb98ea..56f94f4 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,24 +1,23 @@ "ref\01458974276-10325-1-git-send-email-zhengxing@rock-chips.com\0" "ref\01458974276-10325-3-git-send-email-zhengxing@rock-chips.com\0" - "ref\01458974276-10325-3-git-send-email-zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org\0" - "From\0Heiko St\303\274bner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>\0" + "From\0Heiko St\303\274bner <heiko@sntech.de>\0" "Subject\0Re: [PATCH v5 2/4] dt-bindings: add bindings for rk3399 clock controller\0" "Date\0Mon, 28 Mar 2016 01:52:12 +0200\0" - "To\0Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\0" - "Cc\0linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" - huangtao-TNX95d0MmH7DzftRWevZcw@public.gmane.org - jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org - elaine.zhang-TNX95d0MmH7DzftRWevZcw@public.gmane.org - dianders-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org - Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> - Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> - Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> - Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> - Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> - devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org - " linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" + "To\0Xing Zheng <zhengxing@rock-chips.com>\0" + "Cc\0linux-rockchip@lists.infradead.org" + huangtao@rock-chips.com + jay.xu@rock-chips.com + elaine.zhang@rock-chips.com + dianders@chromium.org + Rob Herring <robh+dt@kernel.org> + Pawel Moll <pawel.moll@arm.com> + Mark Rutland <mark.rutland@arm.com> + Ian Campbell <ijc+devicetree@hellion.org.uk> + Kumar Gala <galak@codeaurora.org> + Stephen Boyd <sboyd@codeaurora.org> + devicetree@vger.kernel.org + linux-arm-kernel@lists.infradead.org + " linux-kernel@vger.kernel.org\0" "\00:1\0" "b\0" "Hi Xing,\n" @@ -27,9 +26,9 @@ "> Add devicetree bindings for Rockchip cru which found on\n" "> Rockchip SoCs.\n" "> \n" - "> Signed-off-by: Xing Zheng <zhengxing-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n" - "> Signed-off-by: Jianqun Xu <jay.xu-TNX95d0MmH7DzftRWevZcw@public.gmane.org>\n" - "> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\n" + "> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>\n" + "> Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>\n" + "> Acked-by: Rob Herring <robh@kernel.org>\n" "> ---\n" "> \n" "> Changes in v5: None\n" @@ -155,10 +154,6 @@ "> +\t\tinterrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;\n" "> +\t\treg-shift = <2>;\n" "> +\t\treg-io-width = <4>;\n" - "> +\t};\n" - "--\n" - "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" - "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" - More majordomo info at http://vger.kernel.org/majordomo-info.html + "> +\t};" -8f3bbab470eaef6d7075dd1c095241a7997ec9cccbc0589ca18aea7a5ca623a5 +315fb632c8c64b31ffee8e2bfd2a0a3ef876f6bc8fb8a56fefd830899cfbbddd
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