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From: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v2] DW SPI: Get clock value from Device Tree
Date: Thu, 19 Oct 2017 15:36:08 +0000	[thread overview]
Message-ID: <1508427367.2676.20.camel@synopsys.com> (raw)
In-Reply-To: <CAD6G_RRim05+4Z-n9dCKuTGzO5-r6-y50P_nwDBiPWF-Av43OQ@mail.gmail.com>

On Tue, 2017-10-17 at 20:32 +0530, Jagan Teki wrote:
> On Tue, Oct 17, 2017 at 8:27 PM, Alexey Brodkin
> <Alexey.Brodkin@synopsys.com> wrote:
> > Hi Jagan,
> > 
> > > -----Original Message-----
> > > From: Eugeniy Paltsev [mailto:paltsev at synopsys.com]
> > > Sent: Tuesday, October 17, 2017 4:33 PM
> > > To: jagannadh.teki at gmail.com
> > > Cc: u-boot at lists.denx.de; uboot-snps-arc at synopsys.com
> > > Subject: [uboot-snps-arc] Re: [PATCH v2] DW SPI: Get clock value from Device Tree
> > > > 
> > > > How hard it is to make others to use clock manager? do you have any list?
> > > 
> > > clock_manager.h is an old (and non-generic) way to deal with different clocks.
> > > For example in SOCFPGA_GEN5 and SOCFPGA_ARRIA10 clock_manager.h provides
> > > cm_get_spi_controller_clk_hz function to deal with spi controller clock.
> > > 
> > > But today we have another, linux-like alternative: to bind clocks via device tree
> > > and manipulate with clocks via generic functions provided by clk.h
> > > 
> > > In this patch I added option to get clock via device tree using standard bindings
> > > and restrict clock_manager.h functions usage only to targets which still use it,
> > > so new targets can simply bind clock via device tree and they do not need to
> > > implement/define something in clock_manager.h
> > > 
> > > So we don't need to make others to use clock manager :)
> > 
> > Maybe it worth trying the other way around and think about switching SOCFPGA platforms to
> > generic clk framework?
> 
> Yes, ie what exactly I thought of, thanks!

I checked cm_get_spi_controller_clk_hz implementation in SOCFPGA_GEN5 and
SOCFPGA_ARRIA10: we can't simply replace it with "fixed-clock" driver as it 
manipulate with real hardware.
The only way to do it is to replace SOCFPGA* clock manager functions by real
clock driver.

And given I don't have mentioned hardware so I barely can help with
those improvements on SOCFPGA. That said if there're no short-term plans to
switch SOCFPGA to clk framework maybe we'll be OK with my workaround with #ifdefs?

-- 
 Eugeniy Paltsev

  reply	other threads:[~2017-10-19 15:36 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-10-13 15:18 [U-Boot] [PATCH v2] DW SPI: Get clock value from Device Tree Eugeniy Paltsev
2017-10-16 17:07 ` Jagan Teki
2017-10-17 13:32   ` Eugeniy Paltsev
2017-10-17 14:57     ` Alexey Brodkin
2017-10-17 15:02       ` Jagan Teki
2017-10-19 15:36         ` Eugeniy Paltsev [this message]
2017-10-19 15:51           ` Marek Vasut
2017-10-19 18:20             ` Dinh Nguyen
2017-10-23 11:43               ` Eugeniy Paltsev
2017-10-24  6:08                 ` Marek Vasut
2017-10-24  9:52                   ` Jagan Teki
2017-10-25  6:50                     ` Marek Vasut
2017-10-27 13:54                     ` Eugeniy Paltsev
2017-10-28 11:39                       ` Marek Vasut
2017-10-30  6:04                         ` Jagan Teki
2017-10-30 10:54                           ` Marek Vasut
2017-10-30 11:36                             ` Jagan Teki
2017-10-30 11:42                               ` Marek Vasut
2017-10-31  8:27                                 ` Jagan Teki
2017-10-31  9:33                                   ` Marek Vasut
2017-10-17 15:03       ` Marek Vasut

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