From mboxrd@z Thu Jan 1 00:00:00 1970 From: Trent Piepho Subject: Re: [PATCH v2 1/4] spi: imx: GPIO based chip selects should not be required Date: Tue, 31 Oct 2017 16:57:42 +0000 Message-ID: <1509469061.5473.16.camel@impinj.com> References: <20171027010841.28624-1-tpiepho@impinj.com> <20171027010841.28624-2-tpiepho@impinj.com> <20171031111919.gocl7wwrhkwnxrya@sirena.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Cc: "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" , "linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" , "shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org" , "kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org" , "fabio.estevam-3arQi8VN3Tc@public.gmane.org" To: "broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org" Return-path: In-Reply-To: <20171031111919.gocl7wwrhkwnxrya-7j8lgAiuQgnQXOPxS62xeg@public.gmane.org> Content-Language: en-US Content-ID: <7558B36203F1994EA80DD0B27D9D61D6-+1mpgTUVCH2cE4WynfumptQqCkab/8FMAL8bYrjMMd8@public.gmane.org> Sender: linux-spi-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-ID: T24gVHVlLCAyMDE3LTEwLTMxIGF0IDExOjE5ICswMDAwLCBNYXJrIEJyb3duIHdyb3RlOg0KPiBP biBUaHUsIE9jdCAyNiwgMjAxNyBhdCAwNjowODozOFBNIC0wNzAwLCBUcmVudCBQaWVwaG8gd3Jv dGU6DQo+ID4gVGhlIGRyaXZlciB3aWxsIGZhaWwgdG8gbG9hZCBpZiBubyBncGlvIGNoaXAgc2Vs ZWN0cyBhcmUgc3BlY2lmaWVkLA0KPiA+IHRoaXMgcGF0Y2ggY2hhbmdlcyB0aGlzIHNvIHRoYXQg aXQgbm8gbG9uZ2VyIGZhaWxzLg0KPiA+IA0KPiA+IEl0J3MgcG9zc2libGUgdG8gdXNlIGFsbCBu YXRpdmUgY2hpcCBzZWxlY3RzLCBpbiB3aGljaCBjYXNlIHRoZXJlIGlzDQo+ID4gbm8gcmVhc29u IHRvIGhhdmUgYSBncGlvIGNoaXAgc2VsZWN0IGFycmF5LiAgVGhpcyBpcyB3aGF0IGhhcHBlbnMg aWYNCj4gPiB0aGUgKm9wdGlvbmFsKiBkZXZpY2UgdHJlZSBwcm9wZXJ0eSAiY3MtZ3Bpb3MiIGlz IG9taXR0ZWQuDQo+IA0KPiBEbyB0aGUgbmF0aXZlIGNoaXAgc2VsZWN0cyBhY3R1YWxseSB3b3Jr IHVzZWZ1bGx5IG9uIHRoaXMgaGFyZHdhcmU/DQo+IFRoZXJlIHVzZWQgdG8gYmUgcHJvYmxlbXMg d2l0aCBpdCB3YW50aW5nIHRvIGRvIHRoaW5ncyBsaWtlIGJvdW5jZSB0aGUNCj4gY2hpcCBzZWxl Y3Qgb24gZXZlcnkgd29yZCB3aGljaCBtYWRlIGl0IGV4dHJlbWVseSBkaWZmaWN1bHQgdG8gdXNl IHdpdGgNCj4gTGludXguDQoNClN0aWxsIGFyZSBhbm5veWluZywgYnV0IG9uIHRoZSBkZXZpY2Ug d2UgaGF2ZSBjb25uZWN0ZWQgdG8gaXQsIGl0IGVuZHMNCnVwIHdvcmtpbmcgYXMgZGVzaXJlZC4N Cg0KSSd2ZSBub3QgdGhvcm91Z2hseSBpbnZlc3RpZ2F0ZWQgdGhpcyBoYXJkd2FyZSB0byBmaW5k IHRoZSBkZXRhaWxzLiANCklJUkMsIHRoZSBkZXNpZ253YXJlIFNQSSBvbiBBbHRlcmEgU29DRlBH QSBoYWQgdGhlIHNhbWUgaXNzdWUsIGJ1dCBpdA0Kd2FzIGEgZmxhdyBpbiB0aGUgZHJpdmVyIGFu ZCBJIHdhcyBhYmxlIHRvIGZpeCBpdC4gIEkndmUgY29tZSB0byBleHBlY3QNCml0LCBhcyBldmVy eSBuZXcgU1BJIG1hc3RlciBJIHVzZSBkb2Vzbid0IHdvcmsgcHJvcGVybHkgaW4gc29tZQ0KZGlm ZmVyZW50IHdheS4= -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: tpiepho@impinj.com (Trent Piepho) Date: Tue, 31 Oct 2017 16:57:42 +0000 Subject: [PATCH v2 1/4] spi: imx: GPIO based chip selects should not be required In-Reply-To: <20171031111919.gocl7wwrhkwnxrya@sirena.co.uk> References: <20171027010841.28624-1-tpiepho@impinj.com> <20171027010841.28624-2-tpiepho@impinj.com> <20171031111919.gocl7wwrhkwnxrya@sirena.co.uk> Message-ID: <1509469061.5473.16.camel@impinj.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, 2017-10-31 at 11:19 +0000, Mark Brown wrote: > On Thu, Oct 26, 2017 at 06:08:38PM -0700, Trent Piepho wrote: > > The driver will fail to load if no gpio chip selects are specified, > > this patch changes this so that it no longer fails. > > > > It's possible to use all native chip selects, in which case there is > > no reason to have a gpio chip select array. This is what happens if > > the *optional* device tree property "cs-gpios" is omitted. > > Do the native chip selects actually work usefully on this hardware? > There used to be problems with it wanting to do things like bounce the > chip select on every word which made it extremely difficult to use with > Linux. Still are annoying, but on the device we have connected to it, it ends up working as desired. I've not thoroughly investigated this hardware to find the details. IIRC, the designware SPI on Altera SoCFPGA had the same issue, but it was a flaw in the driver and I was able to fix it. I've come to expect it, as every new SPI master I use doesn't work properly in some different way.