From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Alexey Brodkin To: "vladimir_zapolskiy@mentor.com" CC: "linux-kernel@vger.kernel.org" , "robh+dt@kernel.org" , "mturquette@baylibre.com" , "Eugeniy.Paltsev@synopsys.com" , "linux-snps-arc@lists.infradead.org" , "mark.rutland@arm.com" , "linux-clk@vger.kernel.org" , "sboyd@codeaurora.org" Subject: Re: [PATCH RESEND] CLK: ARC: Set initial pll output frequency specified in device tree Date: Tue, 14 Nov 2017 21:19:34 +0000 Message-ID: <1510694373.15407.1.camel@synopsys.com> References: <20171114122020.9800-1-Eugeniy.Paltsev@synopsys.com> <1b07abf9-c94d-1759-4182-519b77c8bb37@mentor.com> In-Reply-To: <1b07abf9-c94d-1759-4182-519b77c8bb37@mentor.com> Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 List-ID: SGkgVmxhZGltaXIsDQoNCk9uIFR1ZSwgMjAxNy0xMS0xNCBhdCAxOTowMSArMDIwMCwgVmxhZGlt aXIgWmFwb2xza2l5IHdyb3RlOg0KPiBPbiAxMS8xNC8yMDE3IDAyOjIwIFBNLCBFdWdlbml5IFBh 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From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexey.Brodkin@synopsys.com (Alexey Brodkin) Date: Tue, 14 Nov 2017 21:19:34 +0000 Subject: [PATCH RESEND] CLK: ARC: Set initial pll output frequency specified in device tree In-Reply-To: <1b07abf9-c94d-1759-4182-519b77c8bb37@mentor.com> References: <20171114122020.9800-1-Eugeniy.Paltsev@synopsys.com> <1b07abf9-c94d-1759-4182-519b77c8bb37@mentor.com> List-ID: Message-ID: <1510694373.15407.1.camel@synopsys.com> To: linux-snps-arc@lists.infradead.org Hi Vladimir, On Tue, 2017-11-14@19:01 +0200, Vladimir Zapolskiy wrote: > On 11/14/2017 02:20 PM, Eugeniy Paltsev wrote: > > > > Add option to set initial output frequency of plls via > > "clock-frequency" property in pll's device tree node. > > This frequency will be set while pll driver probed. > > > > The usage example is setting CPU clock frequency on boot > > See discussion: > > https://urldefense.proofpoint.com/v2/url?u=https-3A__www.mail-2Darchive.com_linux-2Dsnps-2Darc-40lists.infradead.org_msg02689.html&d=DwICAg&c=DPL6 > > _X_6JkXFx7AXWqB0tg&r=lqdeeSSEes0GFDDl656eViXO7breS55ytWkhpk5R81I&m=vTFoSv1E8NyQC8nqe6pwvuTDxGvEefhAdGwAoABOrY4&s=sbmMnczdKP317bN973cZn2WcYF29kVMLW > > chYfhSGT2M&e= > > > > Signed-off-by: Eugeniy Paltsev > > --- > > ?.../bindings/clock/snps,hsdk-pll-clock.txt?????????|??5 ++++ > > ?.../devicetree/bindings/clock/snps,pll-clock.txt???|??5 ++++ > > ?drivers/clk/axs10x/pll_clock.c?????????????????????| 34 ++++++++++++++++++++-- > > ?drivers/clk/clk-hsdk-pll.c?????????????????????????| 34 ++++++++++++++++++++-- > > ?4 files changed, 74 insertions(+), 4 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt b/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt > > index c56c755..5703059 100644 > > --- a/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt > > +++ b/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt > > @@ -13,6 +13,10 @@ Required properties: > > ?- clocks: shall be the input parent clock phandle for the PLL. > > ?- #clock-cells: from common clock binding; Should always be set to 0. > > ? > > +Optional properties: > > +- clock-frequency: output frequency generated by pll in Hz which will be set > > +while probing. Should be a single cell. > > + > > ?Example: > > ? input_clk: input-clk { > > ? clock-frequency = <33333333>; > > @@ -25,4 +29,5 @@ Example: > > ? reg = <0x00 0x10>; > > ? #clock-cells = <0>; > > ? clocks = <&input_clk>; > > + clock-frequency = <1000000000>; > > ? }; > > diff --git a/Documentation/devicetree/bindings/clock/snps,pll-clock.txt b/Documentation/devicetree/bindings/clock/snps,pll-clock.txt > > index 11fe487..5908f99 100644 > > --- a/Documentation/devicetree/bindings/clock/snps,pll-clock.txt > > +++ b/Documentation/devicetree/bindings/clock/snps,pll-clock.txt > > @@ -13,6 +13,10 @@ registers and second for corresponding LOCK CGU register. > > ?- clocks: shall be the input parent clock phandle for the PLL. > > ?- #clock-cells: from common clock binding; Should always be set to 0. > > ? > > +Optional properties: > > +- clock-frequency: output frequency generated by pll in Hz which will be set > > +while probing. Should be a single cell. > > + > > ?Example: > > ? input-clk: input-clk { > > ? clock-frequency = <33333333>; > > @@ -25,4 +29,5 @@ Example: > > ? reg = <0x80 0x10>, <0x100 0x10>; > > ? #clock-cells = <0>; > > ? clocks = <&input-clk>; > > + clock-frequency = <100000000>; > > ? }; > > You may check Documentation/devicetree/bindings/clock/clock-bindings.txt > about how to assign initial clock rates, in general 'clock-frequency' > property is a property of clock consumers with two exceptions of simple > clock sources, namely it is used in fixed clock and PWM clock bindings. I think that's what we agreed on with Rob Herring back in the day. Have you checked this post of him on the topic? http://lists.infradead.org/pipermail/linux-snps-arc/2017-September/002909.html Just FYI it all started from my question here: http://lists.infradead.org/pipermail/linux-snps-arc/2017-September/002900.html -Alexey From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756839AbdKNVTq (ORCPT ); Tue, 14 Nov 2017 16:19:46 -0500 Received: from us01smtprelay-2.synopsys.com ([198.182.47.9]:60291 "EHLO smtprelay.synopsys.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756651AbdKNVTk (ORCPT ); Tue, 14 Nov 2017 16:19:40 -0500 From: Alexey Brodkin To: "vladimir_zapolskiy@mentor.com" CC: "linux-kernel@vger.kernel.org" , "robh+dt@kernel.org" , "mturquette@baylibre.com" , "Eugeniy.Paltsev@synopsys.com" , "linux-snps-arc@lists.infradead.org" , "mark.rutland@arm.com" , "linux-clk@vger.kernel.org" , "sboyd@codeaurora.org" Subject: Re: [PATCH RESEND] CLK: ARC: Set initial pll output frequency specified in device tree Thread-Topic: [PATCH RESEND] CLK: ARC: Set initial pll output frequency specified in device tree Thread-Index: AQHTXUMGuS1ALfAgdkqQRmbtcwuw/6MUCSIAgABIHIA= Date: Tue, 14 Nov 2017 21:19:34 +0000 Message-ID: <1510694373.15407.1.camel@synopsys.com> References: <20171114122020.9800-1-Eugeniy.Paltsev@synopsys.com> <1b07abf9-c94d-1759-4182-519b77c8bb37@mentor.com> In-Reply-To: <1b07abf9-c94d-1759-4182-519b77c8bb37@mentor.com> Accept-Language: en-US, ru-RU Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.225.15.245] Content-Type: text/plain; charset="utf-8" Content-ID: <1CBA1D92CE2D0E4FA11A9F12798E17DF@internal.synopsys.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by nfs id vAELJoYZ020559 Hi Vladimir, On Tue, 2017-11-14 at 19:01 +0200, Vladimir Zapolskiy wrote: > On 11/14/2017 02:20 PM, Eugeniy Paltsev wrote: > > > > Add option to set initial output frequency of plls via > > "clock-frequency" property in pll's device tree node. > > This frequency will be set while pll driver probed. > > > > The usage example is setting CPU clock frequency on boot > > See discussion: > > https://urldefense.proofpoint.com/v2/url?u=https-3A__www.mail-2Darchive.com_linux-2Dsnps-2Darc-40lists.infradead.org_msg02689.html&d=DwICAg&c=DPL6 > > _X_6JkXFx7AXWqB0tg&r=lqdeeSSEes0GFDDl656eViXO7breS55ytWkhpk5R81I&m=vTFoSv1E8NyQC8nqe6pwvuTDxGvEefhAdGwAoABOrY4&s=sbmMnczdKP317bN973cZn2WcYF29kVMLW > > chYfhSGT2M&e= > > > > Signed-off-by: Eugeniy Paltsev > > --- > >  .../bindings/clock/snps,hsdk-pll-clock.txt         |  5 ++++ > >  .../devicetree/bindings/clock/snps,pll-clock.txt   |  5 ++++ > >  drivers/clk/axs10x/pll_clock.c                     | 34 ++++++++++++++++++++-- > >  drivers/clk/clk-hsdk-pll.c                         | 34 ++++++++++++++++++++-- > >  4 files changed, 74 insertions(+), 4 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt b/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt > > index c56c755..5703059 100644 > > --- a/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt > > +++ b/Documentation/devicetree/bindings/clock/snps,hsdk-pll-clock.txt > > @@ -13,6 +13,10 @@ Required properties: > >  - clocks: shall be the input parent clock phandle for the PLL. > >  - #clock-cells: from common clock binding; Should always be set to 0. > >   > > +Optional properties: > > +- clock-frequency: output frequency generated by pll in Hz which will be set > > +while probing. Should be a single cell. > > + > >  Example: > >   input_clk: input-clk { > >   clock-frequency = <33333333>; > > @@ -25,4 +29,5 @@ Example: > >   reg = <0x00 0x10>; > >   #clock-cells = <0>; > >   clocks = <&input_clk>; > > + clock-frequency = <1000000000>; > >   }; > > diff --git a/Documentation/devicetree/bindings/clock/snps,pll-clock.txt b/Documentation/devicetree/bindings/clock/snps,pll-clock.txt > > index 11fe487..5908f99 100644 > > --- a/Documentation/devicetree/bindings/clock/snps,pll-clock.txt > > +++ b/Documentation/devicetree/bindings/clock/snps,pll-clock.txt > > @@ -13,6 +13,10 @@ registers and second for corresponding LOCK CGU register. > >  - clocks: shall be the input parent clock phandle for the PLL. > >  - #clock-cells: from common clock binding; Should always be set to 0. > >   > > +Optional properties: > > +- clock-frequency: output frequency generated by pll in Hz which will be set > > +while probing. Should be a single cell. > > + > >  Example: > >   input-clk: input-clk { > >   clock-frequency = <33333333>; > > @@ -25,4 +29,5 @@ Example: > >   reg = <0x80 0x10>, <0x100 0x10>; > >   #clock-cells = <0>; > >   clocks = <&input-clk>; > > + clock-frequency = <100000000>; > >   }; > > You may check Documentation/devicetree/bindings/clock/clock-bindings.txt > about how to assign initial clock rates, in general 'clock-frequency' > property is a property of clock consumers with two exceptions of simple > clock sources, namely it is used in fixed clock and PWM clock bindings. I think that's what we agreed on with Rob Herring back in the day. Have you checked this post of him on the topic? http://lists.infradead.org/pipermail/linux-snps-arc/2017-September/002909.html Just FYI it all started from my question here: http://lists.infradead.org/pipermail/linux-snps-arc/2017-September/002900.html -Alexey