From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexey.Brodkin@synopsys.com (Alexey Brodkin) Date: Wed, 15 Nov 2017 16:24:13 +0000 Subject: etnaviv: PHYS_OFFSET usage List-ID: Message-ID: <1510763053.29843.64.camel@synopsys.com> To: linux-snps-arc@lists.infradead.org Hi Lucas, As we discussed on ELCE last month in Prague we have Vivante GPU built-in our new ARC HSDK development board. And even though [thanks to your suggestions] I got Etnaviv driver working perfectly fine on our board I faced one quite a tricky situation [which I dirty worked-around for now]. Etnaviv driver uses some PHYS_OFFSET define which is not very usual across all architectures and platforms supported by Linux kernel. In fact for ARC we don't have?PHYS_OFFSET defined [yet]. And I'm wondering how to get this resolved. Essentially we have 2 options: ?1. Define?PHYS_OFFSET for ARC (and later for other arches once needed) ?2. Replace?PHYS_OFFSET with something else in etnaviv sources. Even though (1) seems to be the simplest solution is doesn't look very nice because it seems to be quite ARM-specific but not something really generic and portable. As for (2) frankly I din't quite understand why do we really care about DDR start offset in the GPU driver. If some more light could be shed on this topic probably we'll figure out what would be more elegant solution. Regards, Alexey From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alexey Brodkin Subject: etnaviv: PHYS_OFFSET usage Date: Wed, 15 Nov 2017 16:24:13 +0000 Message-ID: <1510763053.29843.64.camel@synopsys.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Language: en-US Content-ID: <9451CFABE6BDE941B345297A1EDD9662@internal.synopsys.com> Sender: linux-kernel-owner@vger.kernel.org To: "l.stach@pengutronix.de" Cc: "dri-devel@lists.freedesktop.org" , "christian.gmeiner@gmail.com" , "linux-kernel@vger.kernel.org" , Vineet Gupta , "linux-snps-arc@lists.infradead.org" List-Id: dri-devel@lists.freedesktop.org SGkgTHVjYXMsDQoNCkFzIHdlIGRpc2N1c3NlZCBvbiBFTENFIGxhc3QgbW9udGggaW4gUHJhZ3Vl IHdlIGhhdmUgVml2YW50ZSBHUFUNCmJ1aWx0LWluIG91ciBuZXcgQVJDIEhTREsgZGV2ZWxvcG1l bnQgYm9hcmQuDQoNCkFuZCBldmVuIHRob3VnaCBbdGhhbmtzIHRvIHlvdXIgc3VnZ2VzdGlvbnNd IEkgZ290IEV0bmF2aXYgZHJpdmVyDQp3b3JraW5nIHBlcmZlY3RseSBmaW5lIG9uIG91ciBib2Fy ZCBJIGZhY2VkIG9uZSBxdWl0ZSBhIHRyaWNreQ0Kc2l0dWF0aW9uIFt3aGljaCBJIGRpcnR5IHdv cmtlZC1hcm91bmQgZm9yIG5vd10uDQoNCkV0bmF2aXYgZHJpdmVyIHVzZXMgc29tZSBQSFlTX09G RlNFVCBkZWZpbmUgd2hpY2ggaXMgbm90IHZlcnkNCnVzdWFsIGFjcm9zcyBhbGwgYXJjaGl0ZWN0 dXJlcyBhbmQgcGxhdGZvcm1zIHN1cHBvcnRlZCBieSBMaW51eCBrZXJuZWwuDQoNCkluIGZhY3Qg Zm9yIEFSQyB3ZSBkb24ndCBoYXZlwqBQSFlTX09GRlNFVCBkZWZpbmVkIFt5ZXRdLg0KQW5kIEkn bSB3b25kZXJpbmcgaG93IHRvIGdldCB0aGlzIHJlc29sdmVkLg0KDQpFc3NlbnRpYWxseSB3ZSBo YXZlIDIgb3B0aW9uczoNCsKgMS4gRGVmaW5lwqBQSFlTX09GRlNFVCBmb3IgQVJDIChhbmQgbGF0 ZXIgZm9yIG90aGVyIGFyY2hlcyBvbmNlIG5lZWRlZCkNCsKgMi4gUmVwbGFjZcKgUEhZU19PRkZT RVQgd2l0aCBzb21ldGhpbmcgZWxzZSBpbiBldG5hdml2IHNvdXJjZXMuDQoNCkV2ZW4gdGhvdWdo ICgxKSBzZWVtcyB0byBiZSB0aGUgc2ltcGxlc3Qgc29sdXRpb24gaXMgZG9lc24ndCBsb29rIHZl cnkgbmljZQ0KYmVjYXVzZSBpdCBzZWVtcyB0byBiZSBxdWl0ZSBBUk0tc3BlY2lmaWMgYnV0IG5v dCBzb21ldGhpbmcgcmVhbGx5IGdlbmVyaWMNCmFuZCBwb3J0YWJsZS4NCg0KQXMgZm9yICgyKSBm cmFua2x5IEkgZGluJ3QgcXVpdGUgdW5kZXJzdGFuZCB3aHkgZG8gd2UgcmVhbGx5IGNhcmUgYWJv dXQNCkREUiBzdGFydCBvZmZzZXQgaW4gdGhlIEdQVSBkcml2ZXIuIElmIHNvbWUgbW9yZSBsaWdo dCBjb3VsZCBiZSBzaGVkIG9uIHRoaXMNCnRvcGljIHByb2JhYmx5IHdlJ2xsIGZpZ3VyZSBvdXQg d2hhdCB3b3VsZCBiZSBtb3JlIGVsZWdhbnQgc29sdXRpb24uDQoNClJlZ2FyZHMsDQpBbGV4ZXk=