From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: Patch "EDAC, sb_edac: Don't create a second memory controller if HA1 is not present" has been added to the 4.13-stable tree From: Greg Kroah-Hartman Message-Id: <1510769021139195@kroah.com> Date: Wed, 15 Nov 2017 19:03:41 +0100 To: qiuxu.zhuo@intel.com, bp@suse.de, gregkh@linuxfoundation.org, linux-edac@vger.kernel.org, tony.luck@intel.com, yizhan@redhat.com Cc: stable@vger.kernel.org, stable-commits@vger.kernel.org List-ID: VGhpcyBpcyBhIG5vdGUgdG8gbGV0IHlvdSBrbm93IHRoYXQgSSd2ZSBqdXN0IGFkZGVkIHRoZSBw YXRjaCB0aXRsZWQKCiAgICBFREFDLCBzYl9lZGFjOiBEb24ndCBjcmVhdGUgYSBzZWNvbmQgbWVt b3J5IGNvbnRyb2xsZXIgaWYgSEExIGlzIG5vdCBwcmVzZW50Cgp0byB0aGUgNC4xMy1zdGFibGUg dHJlZSB3aGljaCBjYW4gYmUgZm91bmQgYXQ6CiAgICBodHRwOi8vd3d3Lmtlcm5lbC5vcmcvZ2l0 Lz9wPWxpbnV4L2tlcm5lbC9naXQvc3RhYmxlL3N0YWJsZS1xdWV1ZS5naXQ7YT1zdW1tYXJ5CgpU aGUgZmlsZW5hbWUgb2YgdGhlIHBhdGNoIGlzOgogICAgIGVkYWMtc2JfZWRhYy1kb24tdC1jcmVh dGUtYS1zZWNvbmQtbWVtb3J5LWNvbnRyb2xsZXItaWYtaGExLWlzLW5vdC1wcmVzZW50LnBhdGNo CmFuZCBpdCBjYW4gYmUgZm91bmQgaW4gdGhlIHF1ZXVlLTQuMTMgc3ViZGlyZWN0b3J5LgoKSWYg eW91LCBvciBhbnlvbmUgZWxzZSwgZmVlbHMgaXQgc2hvdWxkIG5vdCBiZSBhZGRlZCB0byB0aGUg c3RhYmxlIHRyZWUsCnBsZWFzZSBsZXQgPHN0YWJsZUB2Z2VyLmtlcm5lbC5vcmc+IGtub3cgYWJv dXQgaXQuCgoKRnJvbSAxNWNjM2FlMDAxODczODQ1YjVkODQyZTIxMjQ3OGE2NTcwYzdkOTM4IE1v biBTZXAgMTcgMDA6MDA6MDAgMjAwMQpGcm9tOiBRaXV4dSBaaHVvIDxxaXV4dS56aHVvQGludGVs LmNvbT4KRGF0ZTogV2VkLCAxMyBTZXAgMjAxNyAxODo0MjoxNCArMDgwMApTdWJqZWN0OiBFREFD LCBzYl9lZGFjOiBEb24ndCBjcmVhdGUgYSBzZWNvbmQgbWVtb3J5IGNvbnRyb2xsZXIgaWYgSEEx IGlzIG5vdCBwcmVzZW50CgpGcm9tOiBRaXV4dSBaaHVvIDxxaXV4dS56aHVvQGludGVsLmNvbT4K CmNvbW1pdCAxNWNjM2FlMDAxODczODQ1YjVkODQyZTIxMjQ3OGE2NTcwYzdkOTM4IHVwc3RyZWFt LgoKWWkgWmhhbmcgcmVwb3J0ZWQgdGhlIGZvbGxvd2luZyBmYWlsdXJlIG9uIGEgMi1zb2NrZXQg SGFzd2VsbCAoRTUtMjYwM3YzKQpzZXJ2ZXIgKERFTEwgUG93ZXJFZGdlIDczMHhkKToKCiAgRURB QyBzYnJpZGdlOiBTb21lIG5lZWRlZCBkZXZpY2VzIGFyZSBtaXNzaW5nCiAgRURBQyBNQzogUmVt b3ZlZCBkZXZpY2UgMCBmb3Igc2JfZWRhYy5jIEhhc3dlbGwgU3JjSUQjMF9IYSMwOiBERVYgMDAw MDo3ZjoxMi4wCiAgRURBQyBNQzogUmVtb3ZlZCBkZXZpY2UgMSBmb3Igc2JfZWRhYy5jIEhhc3dl bGwgU3JjSUQjMV9IYSMwOiBERVYgMDAwMDpmZjoxMi4wCiAgRURBQyBzYnJpZGdlOiBDb3VsZG4n dCBmaW5kIG1jaSBoYW5kbGVyCiAgRURBQyBzYnJpZGdlOiBDb3VsZG4ndCBmaW5kIG1jaSBoYW5k bGVyCiAgRURBQyBzYnJpZGdlOiBGYWlsZWQgdG8gcmVnaXN0ZXIgZGV2aWNlIHdpdGggZXJyb3Ig LTE5LgoKVGhlIHJlZmFjdG9yZWQgc2JfZWRhYyBkcml2ZXIgY3JlYXRlcyB0aGUgSU1DMSAodGhl IDJuZCBtZW1vcnkKY29udHJvbGxlcikgaWYgYW55IElNQzEgZGV2aWNlIGlzIHByZXNlbnQuIElu IHRoaXMgY2FzZSBvbmx5CkhBMV9UQSBvZiBJTUMxIHdhcyBwcmVzZW50LCBidXQgdGhlIGRyaXZl ciBleHBlY3RlZCB0byBmaW5kCkhBMS9IQTFfVE0vSEExX1RBRFswLTNdIGRldmljZXMgdG9vLCBs ZWFkaW5nIHRvIHRoZSBhYm92ZSBmYWlsdXJlLgoKVGhlIGRvY3VtZW50IFsxXSBzYXlzIHRoZSAn RTUtMjYwMyB2MycgQ1BVIGhhcyA0IG1lbW9yeSBjaGFubmVscyBtYXguIFlpClpoYW5nIGluc2Vy dGVkIG9uZSBESU1NIHBlciBjaGFubmVsIGZvciBlYWNoIENQVSwgYW5kIGRpZCByYW5kb20gZXJy b3IKYWRkcmVzcyBpbmplY3Rpb24gdGVzdCB3aXRoIHRoaXMgcGF0Y2g6CgogICAgICA0MDI0ICBh ZGRyZXNzZXMgZmVsbCBpbiBUT0xNIGhvbGUgYXJlYQogICAgIDEyNzE1ICBhZGRyZXNzZXMgZmVs bCBpbiBDUFVfU3JjSUQjMF9IYSMwX0NoYW4jMF9ESU1NIzAKICAgICAxMjc3NCAgYWRkcmVzc2Vz IGZlbGwgaW4gQ1BVX1NyY0lEIzBfSGEjMF9DaGFuIzFfRElNTSMwCiAgICAgMTI3OTggIGFkZHJl c3NlcyBmZWxsIGluIENQVV9TcmNJRCMwX0hhIzBfQ2hhbiMyX0RJTU0jMAogICAgIDEyOTEzICBh ZGRyZXNzZXMgZmVsbCBpbiBDUFVfU3JjSUQjMF9IYSMwX0NoYW4jM19ESU1NIzAKICAgICAxMjY3 NCAgYWRkcmVzc2VzIGZlbGwgaW4gQ1BVX1NyY0lEIzFfSGEjMF9DaGFuIzBfRElNTSMwCiAgICAg MTI2ODYgIGFkZHJlc3NlcyBmZWxsIGluIENQVV9TcmNJRCMxX0hhIzBfQ2hhbiMxX0RJTU0jMAog ICAgIDEyODgyICBhZGRyZXNzZXMgZmVsbCBpbiBDUFVfU3JjSUQjMV9IYSMwX0NoYW4jMl9ESU1N IzAKICAgICAxMjkzNCAgYWRkcmVzc2VzIGZlbGwgaW4gQ1BVX1NyY0lEIzFfSGEjMF9DaGFuIzNf RElNTSMwCiAgICAxMDY0MDAgIGFkZHJlc3NlcyB3ZXJlIGluamVjdGVkIHRvdGFsbHkuCgpUaGUg dGVzdCByZXN1bHQgc2hvd3MgdGhhdCBhbGwgdGhlIDQgY2hhbm5lbHMgYmVsb25nIHRvIElNQzAg cGVyIENQVSwgc28KdGhlIHNlcnZlciByZWFsbHkgb25seSBoYXMgb25lIElNQyBwZXIgQ1BVLgoK SW4gdGhlIDFzdCBwYWdlIG9mIGNoYXB0ZXIgMiBpbiBkYXRhc2hlZXQgWzJdLCBpdCBhbHNvIHNh eXMgJ0U1LTI2MDAgdjMnCmltcGxlbWVudHMgZWl0aGVyIG9uZSBvciB0d28gSU1Dcy4gRm9yIENQ VXMgd2l0aCBvbmUgSU1DLCBJTUMxIGlzIG5vdAp1c2VkIGFuZCBzaG91bGQgYmUgaWdub3JlZC4K ClRodXMsIGRvIG5vdCBjcmVhdGUgYSBzZWNvbmQgbWVtb3J5IGNvbnRyb2xsZXIgaWYgdGhlIGtl eSBIQTEgaXMgYWJzZW50LgoKWzFdIGh0dHA6Ly9hcmsuaW50ZWwuY29tL3Byb2R1Y3RzLzgzMzQ5 L0ludGVsLVhlb24tUHJvY2Vzc29yLUU1LTI2MDMtdjMtMTVNLUNhY2hlLTFfNjAtR0h6ClsyXSBo dHRwczovL3d3dy5pbnRlbC5jb20vY29udGVudC9kYW0vd3d3L3B1YmxpYy91cy9lbi9kb2N1bWVu dHMvZGF0YXNoZWV0cy94ZW9uLWU1LXYzLWRhdGFzaGVldC12b2wtMi5wZGYKClJlcG9ydGVkLWFu ZC10ZXN0ZWQtYnk6IFlpIFpoYW5nIDx5aXpoYW5AcmVkaGF0LmNvbT4KU2lnbmVkLW9mZi1ieTog UWl1eHUgWmh1byA8cWl1eHUuemh1b0BpbnRlbC5jb20+CkNjOiBUb255IEx1Y2sgPHRvbnkubHVj a0BpbnRlbC5jb20+CkNjOiBsaW51eC1lZGFjIDxsaW51eC1lZGFjQHZnZXIua2VybmVsLm9yZz4K TGluazogaHR0cDovL2xrbWwua2VybmVsLm9yZy9yLzIwMTcwOTEzMTA0MjE0LjczMjUtMS1xaXV4 dS56aHVvQGludGVsLmNvbQpbIE1hc3NhZ2UgY29tbWl0IG1lc3NhZ2UuIF0KU2lnbmVkLW9mZi1i eTogQm9yaXNsYXYgUGV0a292IDxicEBzdXNlLmRlPgpTaWduZWQtb2ZmLWJ5OiBHcmVnIEtyb2Fo LUhhcnRtYW4gPGdyZWdraEBsaW51eGZvdW5kYXRpb24ub3JnPgotLS0KIGRyaXZlcnMvZWRhYy9z Yl9lZGFjLmMgfCAgICA5ICsrKysrKysrLQogMSBmaWxlIGNoYW5nZWQsIDggaW5zZXJ0aW9ucygr KSwgMSBkZWxldGlvbigtKQoKCgpQYXRjaGVzIGN1cnJlbnRseSBpbiBzdGFibGUtcXVldWUgd2hp Y2ggbWlnaHQgYmUgZnJvbSBxaXV4dS56aHVvQGludGVsLmNvbSBhcmUKCnF1ZXVlLTQuMTMvZWRh Yy1zYl9lZGFjLWRvbi10LWNyZWF0ZS1hLXNlY29uZC1tZW1vcnktY29udHJvbGxlci1pZi1oYTEt aXMtbm90LXByZXNlbnQucGF0Y2gKLS0KVG8gdW5zdWJzY3JpYmUgZnJvbSB0aGlzIGxpc3Q6IHNl bmQgdGhlIGxpbmUgInVuc3Vic2NyaWJlIGxpbnV4LWVkYWMiIGluCnRoZSBib2R5IG9mIGEgbWVz c2FnZSB0byBtYWpvcmRvbW9Admdlci5rZXJuZWwub3JnCk1vcmUgbWFqb3Jkb21vIGluZm8gYXQg IGh0dHA6Ly92Z2VyLmtlcm5lbC5vcmcvbWFqb3Jkb21vLWluZm8uaHRtbAoKLS0tIGEvZHJpdmVy cy9lZGFjL3NiX2VkYWMuYworKysgYi9kcml2ZXJzL2VkYWMvc2JfZWRhYy5jCkBAIC00NTUsNiAr NDU1LDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBwY2lfaWRfdGFibGUgcGNpX2Rldgogc3RhdGlj IGNvbnN0IHN0cnVjdCBwY2lfaWRfZGVzY3IgcGNpX2Rldl9kZXNjcl9pYnJpZGdlW10gPSB7CiAJ CS8qIFByb2Nlc3NvciBIb21lIEFnZW50ICovCiAJeyBQQ0lfREVTQ1IoUENJX0RFVklDRV9JRF9J TlRFTF9JQlJJREdFX0lNQ19IQTAsICAgICAgICAwLCBJTUMwKSB9LAorCXsgUENJX0RFU0NSKFBD SV9ERVZJQ0VfSURfSU5URUxfSUJSSURHRV9JTUNfSEExLCAgICAgICAgMSwgSU1DMSkgfSwKIAog CQkvKiBNZW1vcnkgY29udHJvbGxlciAqLwogCXsgUENJX0RFU0NSKFBDSV9ERVZJQ0VfSURfSU5U RUxfSUJSSURHRV9JTUNfSEEwX1RBLCAgICAgMCwgSU1DMCkgfSwKQEAgLTQ2NSw3ICs0NjYsNiBA QCBzdGF0aWMgY29uc3Qgc3RydWN0IHBjaV9pZF9kZXNjciBwY2lfZGV2CiAJeyBQQ0lfREVTQ1Io UENJX0RFVklDRV9JRF9JTlRFTF9JQlJJREdFX0lNQ19IQTBfVEFEMywgICAwLCBJTUMwKSB9LAog CiAJCS8qIE9wdGlvbmFsLCBtb2RlIDJIQSAqLwotCXsgUENJX0RFU0NSKFBDSV9ERVZJQ0VfSURf SU5URUxfSUJSSURHRV9JTUNfSEExLCAgICAgICAgMSwgSU1DMSkgfSwKIAl7IFBDSV9ERVNDUihQ Q0lfREVWSUNFX0lEX0lOVEVMX0lCUklER0VfSU1DX0hBMV9UQSwgICAgIDEsIElNQzEpIH0sCiAJ eyBQQ0lfREVTQ1IoUENJX0RFVklDRV9JRF9JTlRFTF9JQlJJREdFX0lNQ19IQTFfUkFTLCAgICAx LCBJTUMxKSB9LAogCXsgUENJX0RFU0NSKFBDSV9ERVZJQ0VfSURfSU5URUxfSUJSSURHRV9JTUNf SEExX1RBRDAsICAgMSwgSU1DMSkgfSwKQEAgLTIyNjAsNiArMjI2MCwxMyBAQCBzdGF0aWMgaW50 IHNicmlkZ2VfZ2V0X29uZWRldmljZShzdHJ1Y3QKIG5leHRfaW1jOgogCXNicmlkZ2VfZGV2ID0g Z2V0X3NicmlkZ2VfZGV2KGJ1cywgZGV2X2Rlc2NyLT5kb20sIG11bHRpX2J1cywgc2JyaWRnZV9k ZXYpOwogCWlmICghc2JyaWRnZV9kZXYpIHsKKwkJLyogSWYgdGhlIEhBMSB3YXNuJ3QgZm91bmQs IGRvbid0IGNyZWF0ZSBFREFDIHNlY29uZCBtZW1vcnkgY29udHJvbGxlciAqLworCQlpZiAoZGV2 X2Rlc2NyLT5kb20gPT0gSU1DMSAmJiBkZXZubyAhPSAxKSB7CisJCQllZGFjX2RiZygwLCAiU2tp cCBJTUMxOiAlMDR4OiUwNHggKHNpbmNlIEhBMSB3YXMgYWJzZW50KVxuIiwKKwkJCQkgUENJX1ZF TkRPUl9JRF9JTlRFTCwgZGV2X2Rlc2NyLT5kZXZfaWQpOworCQkJcGNpX2Rldl9wdXQocGRldik7 CisJCQlyZXR1cm4gMDsKKwkJfQogCiAJCWlmIChkZXZfZGVzY3ItPmRvbSA9PSBTT0NLKQogCQkJ Z290byBvdXRfaW1jOwo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linuxfoundation.org ([140.211.169.12]:49746 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757422AbdKOSDh (ORCPT ); Wed, 15 Nov 2017 13:03:37 -0500 Subject: Patch "EDAC, sb_edac: Don't create a second memory controller if HA1 is not present" has been added to the 4.13-stable tree To: qiuxu.zhuo@intel.com, bp@suse.de, gregkh@linuxfoundation.org, linux-edac@vger.kernel.org, tony.luck@intel.com, yizhan@redhat.com Cc: , From: Date: Wed, 15 Nov 2017 19:03:41 +0100 Message-ID: <1510769021139195@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ANSI_X3.4-1968 Content-Transfer-Encoding: 8bit Sender: stable-owner@vger.kernel.org List-ID: This is a note to let you know that I've just added the patch titled EDAC, sb_edac: Don't create a second memory controller if HA1 is not present to the 4.13-stable tree which can be found at: http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary The filename of the patch is: edac-sb_edac-don-t-create-a-second-memory-controller-if-ha1-is-not-present.patch and it can be found in the queue-4.13 subdirectory. If you, or anyone else, feels it should not be added to the stable tree, please let know about it. >>From 15cc3ae001873845b5d842e212478a6570c7d938 Mon Sep 17 00:00:00 2001 From: Qiuxu Zhuo Date: Wed, 13 Sep 2017 18:42:14 +0800 Subject: EDAC, sb_edac: Don't create a second memory controller if HA1 is not present From: Qiuxu Zhuo commit 15cc3ae001873845b5d842e212478a6570c7d938 upstream. Yi Zhang reported the following failure on a 2-socket Haswell (E5-2603v3) server (DELL PowerEdge 730xd): EDAC sbridge: Some needed devices are missing EDAC MC: Removed device 0 for sb_edac.c Haswell SrcID#0_Ha#0: DEV 0000:7f:12.0 EDAC MC: Removed device 1 for sb_edac.c Haswell SrcID#1_Ha#0: DEV 0000:ff:12.0 EDAC sbridge: Couldn't find mci handler EDAC sbridge: Couldn't find mci handler EDAC sbridge: Failed to register device with error -19. The refactored sb_edac driver creates the IMC1 (the 2nd memory controller) if any IMC1 device is present. In this case only HA1_TA of IMC1 was present, but the driver expected to find HA1/HA1_TM/HA1_TAD[0-3] devices too, leading to the above failure. The document [1] says the 'E5-2603 v3' CPU has 4 memory channels max. Yi Zhang inserted one DIMM per channel for each CPU, and did random error address injection test with this patch: 4024 addresses fell in TOLM hole area 12715 addresses fell in CPU_SrcID#0_Ha#0_Chan#0_DIMM#0 12774 addresses fell in CPU_SrcID#0_Ha#0_Chan#1_DIMM#0 12798 addresses fell in CPU_SrcID#0_Ha#0_Chan#2_DIMM#0 12913 addresses fell in CPU_SrcID#0_Ha#0_Chan#3_DIMM#0 12674 addresses fell in CPU_SrcID#1_Ha#0_Chan#0_DIMM#0 12686 addresses fell in CPU_SrcID#1_Ha#0_Chan#1_DIMM#0 12882 addresses fell in CPU_SrcID#1_Ha#0_Chan#2_DIMM#0 12934 addresses fell in CPU_SrcID#1_Ha#0_Chan#3_DIMM#0 106400 addresses were injected totally. The test result shows that all the 4 channels belong to IMC0 per CPU, so the server really only has one IMC per CPU. In the 1st page of chapter 2 in datasheet [2], it also says 'E5-2600 v3' implements either one or two IMCs. For CPUs with one IMC, IMC1 is not used and should be ignored. Thus, do not create a second memory controller if the key HA1 is absent. [1] http://ark.intel.com/products/83349/Intel-Xeon-Processor-E5-2603-v3-15M-Cache-1_60-GHz [2] https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xeon-e5-v3-datasheet-vol-2.pdf Reported-and-tested-by: Yi Zhang Signed-off-by: Qiuxu Zhuo Cc: Tony Luck Cc: linux-edac Link: http://lkml.kernel.org/r/20170913104214.7325-1-qiuxu.zhuo@intel.com [ Massage commit message. ] Signed-off-by: Borislav Petkov Signed-off-by: Greg Kroah-Hartman --- drivers/edac/sb_edac.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c @@ -455,6 +455,7 @@ static const struct pci_id_table pci_dev static const struct pci_id_descr pci_dev_descr_ibridge[] = { /* Processor Home Agent */ { PCI_DESCR(PCI_DEVICE_ID_INTEL_IBRIDGE_IMC_HA0, 0, IMC0) }, + { PCI_DESCR(PCI_DEVICE_ID_INTEL_IBRIDGE_IMC_HA1, 1, IMC1) }, /* Memory controller */ { PCI_DESCR(PCI_DEVICE_ID_INTEL_IBRIDGE_IMC_HA0_TA, 0, IMC0) }, @@ -465,7 +466,6 @@ static const struct pci_id_descr pci_dev { PCI_DESCR(PCI_DEVICE_ID_INTEL_IBRIDGE_IMC_HA0_TAD3, 0, IMC0) }, /* Optional, mode 2HA */ - { PCI_DESCR(PCI_DEVICE_ID_INTEL_IBRIDGE_IMC_HA1, 1, IMC1) }, { PCI_DESCR(PCI_DEVICE_ID_INTEL_IBRIDGE_IMC_HA1_TA, 1, IMC1) }, { PCI_DESCR(PCI_DEVICE_ID_INTEL_IBRIDGE_IMC_HA1_RAS, 1, IMC1) }, { PCI_DESCR(PCI_DEVICE_ID_INTEL_IBRIDGE_IMC_HA1_TAD0, 1, IMC1) }, @@ -2260,6 +2260,13 @@ static int sbridge_get_onedevice(struct next_imc: sbridge_dev = get_sbridge_dev(bus, dev_descr->dom, multi_bus, sbridge_dev); if (!sbridge_dev) { + /* If the HA1 wasn't found, don't create EDAC second memory controller */ + if (dev_descr->dom == IMC1 && devno != 1) { + edac_dbg(0, "Skip IMC1: %04x:%04x (since HA1 was absent)\n", + PCI_VENDOR_ID_INTEL, dev_descr->dev_id); + pci_dev_put(pdev); + return 0; + } if (dev_descr->dom == SOCK) goto out_imc; Patches currently in stable-queue which might be from qiuxu.zhuo@intel.com are queue-4.13/edac-sb_edac-don-t-create-a-second-memory-controller-if-ha1-is-not-present.patch