Re: [PATCH 01/11] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU.

From: Paulo Zanoni <paulo.r.zanoni@intel.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>, intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [PATCH 01/11] drm/i915/cnl: Add Cannonlake PCI IDs for another SKU.
Date: Tue, 09 Jan 2018 16:48:25 -0200	[thread overview]
Message-ID: <1515523705.22902.3.camel@intel.com> (raw)
In-Reply-To: <20171222231819.19908-1-rodrigo.vivi@intel.com>

Em Sex, 2017-12-22 às 15:18 -0800, Rodrigo Vivi escreveu:
> By the Spec all CNL skus are GT2.

This is definitely not my understanding, some of the PCI IDs in our
driver are clearly marked as GT1 on the spec.

But since we don't use this GTX number anywhere for CNL for the Kernel
driver, can't we just KISS and go with intel_cannonlake_info until we
actually need it?

Besides that, I really think this patch should be split in 2: one that
only adds the new PCI IDs, and another that does the macro/info rework.
This should help any possible backports.

> 
> v2: Really include the PCI IDs to the picidlist[];
> v3: Add the PCI Id for another SKU (Anusha).
> v4: Update IDs, really include to pciidlists again.
> v5: Unify all GT2 IDs.
> v6: Unify in a way that we don't break early-quirks.c
> 
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_pci.c |  3 +--
>  include/drm/i915_pciids.h       | 18 +++++++-----------
>  2 files changed, 8 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pci.c
> b/drivers/gpu/drm/i915/i915_pci.c
> index 36d48422b475..cc87d741135d 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -636,8 +636,7 @@ static const struct pci_device_id pciidlist[] = {
>  	INTEL_CFL_U_GT1_IDS(&intel_coffeelake_gt1_info),
>  	INTEL_CFL_U_GT2_IDS(&intel_coffeelake_gt2_info),
>  	INTEL_CFL_U_GT3_IDS(&intel_coffeelake_gt3_info),
> -	INTEL_CNL_U_GT2_IDS(&intel_cannonlake_gt2_info),
> -	INTEL_CNL_Y_GT2_IDS(&intel_cannonlake_gt2_info),
> +	INTEL_CNL_IDS(&intel_cannonlake_gt2_info),
>  	{0, 0, 0}
>  };
>  MODULE_DEVICE_TABLE(pci, pciidlist);
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index 5db0458dd832..9e1fe6634424 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -414,24 +414,20 @@
>  	INTEL_CFL_U_GT2_IDS(info), \
>  	INTEL_CFL_U_GT3_IDS(info)
>  
> -/* CNL U 2+2 */
> -#define INTEL_CNL_U_GT2_IDS(info) \
> +/* CNL */
> +#define INTEL_CNL_IDS(info) \
>  	INTEL_VGA_DEVICE(0x5A52, info), \
>  	INTEL_VGA_DEVICE(0x5A5A, info), \
>  	INTEL_VGA_DEVICE(0x5A42, info), \
> -	INTEL_VGA_DEVICE(0x5A4A, info)
> -
> -/* CNL Y 2+2 */
> -#define INTEL_CNL_Y_GT2_IDS(info) \
> +	INTEL_VGA_DEVICE(0x5A4A, info), \
>  	INTEL_VGA_DEVICE(0x5A51, info), \
>  	INTEL_VGA_DEVICE(0x5A59, info), \
>  	INTEL_VGA_DEVICE(0x5A41, info), \
>  	INTEL_VGA_DEVICE(0x5A49, info), \
>  	INTEL_VGA_DEVICE(0x5A71, info), \
> -	INTEL_VGA_DEVICE(0x5A79, info)
> -
> -#define INTEL_CNL_IDS(info) \
> -	INTEL_CNL_U_GT2_IDS(info), \
> -	INTEL_CNL_Y_GT2_IDS(info)
> +	INTEL_VGA_DEVICE(0x5A79, info), \
> +	INTEL_VGA_DEVICE(0x5A54, info), \
> +	INTEL_VGA_DEVICE(0x5A5C, info), \
> +	INTEL_VGA_DEVICE(0x5A44, info)
>  
>  #endif /* _I915_PCIIDS_H */
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