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From: <gregkh@linuxfoundation.org>
To: jnair@caviumnetworks.com, ard.biesheuvel@linaro.org,
	catalin.marinas@arm.com, gregkh@linuxfoundation.org,
	will.deacon@arm.com
Cc: <stable@vger.kernel.org>, <stable-commits@vger.kernel.org>
Subject: Patch "[Variant 2/Spectre-v2] arm64: Branch predictor hardening for Cavium ThunderX2" has been added to the 4.14-stable tree
Date: Wed, 14 Feb 2018 14:52:55 +0100	[thread overview]
Message-ID: <15186163756660@kroah.com> (raw)


This is a note to let you know that I've just added the patch titled

    [Variant 2/Spectre-v2] arm64: Branch predictor hardening for Cavium ThunderX2

to the 4.14-stable tree which can be found at:
    http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary

The filename of the patch is:
     arm64-branch-predictor-hardening-for-cavium-thunderx2.patch
and it can be found in the queue-4.14 subdirectory.

If you, or anyone else, feels it should not be added to the stable tree,
please let <stable@vger.kernel.org> know about it.


>From foo@baz Wed Feb 14 14:44:54 CET 2018
From: Jayachandran C <jnair@caviumnetworks.com>
Date: Fri, 19 Jan 2018 04:22:47 -0800
Subject: [Variant 2/Spectre-v2] arm64: Branch predictor hardening for Cavium ThunderX2

From: Jayachandran C <jnair@caviumnetworks.com>


Commit f3d795d9b360 upstream.

Use PSCI based mitigation for speculative execution attacks targeting
the branch predictor. We use the same mechanism as the one used for
Cortex-A CPUs, we expect the PSCI version call to have a side effect
of clearing the BTBs.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
 arch/arm64/kernel/cpu_errata.c |   10 ++++++++++
 1 file changed, 10 insertions(+)

--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -359,6 +359,16 @@ const struct arm64_cpu_capabilities arm6
 		.capability = ARM64_HARDEN_BP_POST_GUEST_EXIT,
 		MIDR_ALL_VERSIONS(MIDR_QCOM_FALKOR_V1),
 	},
+	{
+		.capability = ARM64_HARDEN_BRANCH_PREDICTOR,
+		MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN),
+		.enable = enable_psci_bp_hardening,
+	},
+	{
+		.capability = ARM64_HARDEN_BRANCH_PREDICTOR,
+		MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2),
+		.enable = enable_psci_bp_hardening,
+	},
 #endif
 	{
 	}


Patches currently in stable-queue which might be from jnair@caviumnetworks.com are

queue-4.14/arm64-turn-on-kpti-only-on-cpus-that-need-it.patch
queue-4.14/arm64-branch-predictor-hardening-for-cavium-thunderx2.patch
queue-4.14/arm64-cputype-add-midr-values-for-cavium-thunderx2-cpus.patch

                 reply	other threads:[~2018-02-14 13:53 UTC|newest]

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