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diff for duplicates of <1519686262.6374.3.camel@toradex.com>

diff --git a/a/1.txt b/N1/1.txt
index f82f034..1f91a84 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,47 +1,72 @@
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+On Mon, 2018-02-26 at 15:42 +0300, Dmitry Osipenko wrote:
+> On 23.02.2018 02:04, Marcel Ziswiler wrote:
+> > Turns out latest upstream U-Boot does not configure/enable pllu
+> > which
+> > leaves it at some default rate of 500 kHz:
+> > 
+> > root@apalis-t30:~# cat /sys/kernel/debug/clk/clk_summary | grep
+> > pll_u
+> >        pll_u                  3        3        0      500000      
+> >     0
+> > 
+> > Of course this won't quite work leading to the following messages:
+> > 
+> > [    6.559593] usb 2-1: new full-speed USB device number 2 using
+> > tegra-
+> > ehci
+> > [   11.759173] usb 2-1: device descriptor read/64, error -110
+> > [   27.119453] usb 2-1: device descriptor read/64, error -110
+> > [   27.389217] usb 2-1: new full-speed USB device number 3 using
+> > tegra-
+> > ehci
+> > [   32.559454] usb 2-1: device descriptor read/64, error -110
+> > [   47.929777] usb 2-1: device descriptor read/64, error -110
+> > [   48.049658] usb usb2-port1: attempt power cycle
+> > [   48.759475] usb 2-1: new full-speed USB device number 4 using
+> > tegra-
+> > ehci
+> > [   59.349457] usb 2-1: device not accepting address 4, error -110
+> > [   59.509449] usb 2-1: new full-speed USB device number 5 using
+> > tegra-
+> > ehci
+> > [   70.069457] usb 2-1: device not accepting address 5, error -110
+> > [   70.079721] usb usb2-port1: unable to enumerate USB device
+> > 
+> > Fix this by actually allowing the rate also being set from within
+> > the Linux kernel.
+> > 
+> > Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
+> > 
+> > ---
+> > 
+> >  drivers/clk/tegra/clk-pll.c | 2 ++
+> >  1 file changed, 2 insertions(+)
+> > 
+> > diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-
+> > pll.c
+> > index 7c369e21c91c..830d1c87fa7c 100644
+> > --- a/drivers/clk/tegra/clk-pll.c
+> > +++ b/drivers/clk/tegra/clk-pll.c
+> > @@ -1151,6 +1151,8 @@ static const struct clk_ops
+> > tegra_clk_pllu_ops = {
+> >  	.enable = clk_pllu_enable,
+> >  	.disable = clk_pll_disable,
+> >  	.recalc_rate = clk_pll_recalc_rate,
+> > +	.round_rate = clk_pll_round_rate,
+> > +	.set_rate = clk_pll_set_rate,
+> >  };
+> >  
+> >  static int _pll_fixed_mdiv(struct tegra_clk_pll_params
+> > *pll_params,
+> > 
+> 
+> Tegra's USB PHY driver only enables clock and clk driver doesn't
+> specify the
+> clock rate in the init table. Could you please clarify where in the
+> kernels code
+> PLL_U rate is getting set?
+
+I guess that would be according to the following table isn't it:
+
+https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree
+/drivers/clk/tegra/clk-tegra30.c?h=v4.16-rc3#n287
diff --git a/a/content_digest b/N1/content_digest
index d5e9501..05fdd4f 100644
--- a/a/content_digest
+++ b/N1/content_digest
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- YTMwLmM/aD12NC4xNi1yYzMjbjI4Nw==
+ "On Mon, 2018-02-26 at 15:42 +0300, Dmitry Osipenko wrote:\n"
+ "> On 23.02.2018 02:04, Marcel Ziswiler wrote:\n"
+ "> > Turns out latest upstream U-Boot does not configure/enable pllu\n"
+ "> > which\n"
+ "> > leaves it at some default rate of 500 kHz:\n"
+ "> > \n"
+ "> > root@apalis-t30:~# cat /sys/kernel/debug/clk/clk_summary | grep\n"
+ "> > pll_u\n"
+ "> >        pll_u                  3        3        0      500000      \n"
+ "> >     0\n"
+ "> > \n"
+ "> > Of course this won't quite work leading to the following messages:\n"
+ "> > \n"
+ "> > [    6.559593] usb 2-1: new full-speed USB device number 2 using\n"
+ "> > tegra-\n"
+ "> > ehci\n"
+ "> > [   11.759173] usb 2-1: device descriptor read/64, error -110\n"
+ "> > [   27.119453] usb 2-1: device descriptor read/64, error -110\n"
+ "> > [   27.389217] usb 2-1: new full-speed USB device number 3 using\n"
+ "> > tegra-\n"
+ "> > ehci\n"
+ "> > [   32.559454] usb 2-1: device descriptor read/64, error -110\n"
+ "> > [   47.929777] usb 2-1: device descriptor read/64, error -110\n"
+ "> > [   48.049658] usb usb2-port1: attempt power cycle\n"
+ "> > [   48.759475] usb 2-1: new full-speed USB device number 4 using\n"
+ "> > tegra-\n"
+ "> > ehci\n"
+ "> > [   59.349457] usb 2-1: device not accepting address 4, error -110\n"
+ "> > [   59.509449] usb 2-1: new full-speed USB device number 5 using\n"
+ "> > tegra-\n"
+ "> > ehci\n"
+ "> > [   70.069457] usb 2-1: device not accepting address 5, error -110\n"
+ "> > [   70.079721] usb usb2-port1: unable to enumerate USB device\n"
+ "> > \n"
+ "> > Fix this by actually allowing the rate also being set from within\n"
+ "> > the Linux kernel.\n"
+ "> > \n"
+ "> > Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>\n"
+ "> > \n"
+ "> > ---\n"
+ "> > \n"
+ "> >  drivers/clk/tegra/clk-pll.c | 2 ++\n"
+ "> >  1 file changed, 2 insertions(+)\n"
+ "> > \n"
+ "> > diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-\n"
+ "> > pll.c\n"
+ "> > index 7c369e21c91c..830d1c87fa7c 100644\n"
+ "> > --- a/drivers/clk/tegra/clk-pll.c\n"
+ "> > +++ b/drivers/clk/tegra/clk-pll.c\n"
+ "> > @@ -1151,6 +1151,8 @@ static const struct clk_ops\n"
+ "> > tegra_clk_pllu_ops = {\n"
+ "> >  \t.enable = clk_pllu_enable,\n"
+ "> >  \t.disable = clk_pll_disable,\n"
+ "> >  \t.recalc_rate = clk_pll_recalc_rate,\n"
+ "> > +\t.round_rate = clk_pll_round_rate,\n"
+ "> > +\t.set_rate = clk_pll_set_rate,\n"
+ "> >  };\n"
+ "> >  \n"
+ "> >  static int _pll_fixed_mdiv(struct tegra_clk_pll_params\n"
+ "> > *pll_params,\n"
+ "> > \n"
+ "> \n"
+ "> Tegra's USB PHY driver only enables clock and clk driver doesn't\n"
+ "> specify the\n"
+ "> clock rate in the init table. Could you please clarify where in the\n"
+ "> kernels code\n"
+ "> PLL_U rate is getting set?\n"
+ "\n"
+ "I guess that would be according to the following table isn't it:\n"
+ "\n"
+ "https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree\n"
+ /drivers/clk/tegra/clk-tegra30.c?h=v4.16-rc3#n287
 
-2ee2ec4c2b673a5c068fb71e619c95d50e7a2bae7b6e0fb9ed1a99cb73920b07
+54b22f99acca976315de489883b6b36fcd80d45997f3b732dab09e47bc4423e7

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