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diff for duplicates of <1519853627.15908.23.camel@amazon.de>

diff --git a/a/1.txt b/N1/1.txt
index 1c1206f..5c3a2ca 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -1,142 +1,204 @@
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+On Wed, 2018-02-28 at 15:30 -0600, Bjorn Helgaas wrote:
+> On Wed, Jan 17, 2018 at 06:44:23PM +0100, KarimAllah Ahmed wrote:
+> > 
+> > ... to avoid reading them from the config space of all the PCI VFs. This is
+> > specially a useful optimization when bringing up thousands of VFs.
+> > 
+> > Cc: Bjorn Helgaas <bhelgaas@google.com>
+> > Cc: linux-pci@vger.kernel.org
+> > Cc: linux-kernel@vger.kernel.org
+> > Signed-off-by: KarimAllah Ahmed <karahmed@amazon.de>
+> 
+> What does this patch apply to?  It doesn't apply to v4.16-rc1 (my
+> "master" branch).  I don't see anything in the history of
+> drivers/pci/iov.c about pci_iov_wq_fn().
+
+Ah, right! I had a few patches in my branch and I decided to only post
+this one for now. The pci_iov_wq_fn was part of one of them.
+
+Will shuffle the patches, rebase and repost.
+
+Thanks.
+
+> 
+> > 
+> > ---
+> >  drivers/pci/iov.c   | 20 ++++++++++++++++++--
+> >  drivers/pci/pci.h   |  6 +++++-
+> >  drivers/pci/probe.c | 42 ++++++++++++++++++++++++++++++++----------
+> >  3 files changed, 55 insertions(+), 13 deletions(-)
+> > 
+> > diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
+> > index 168328a..78e9595 100644
+> > --- a/drivers/pci/iov.c
+> > +++ b/drivers/pci/iov.c
+> > @@ -129,7 +129,7 @@ resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
+> >  	if (!dev->is_physfn)
+> >  		return 0;
+> >  
+> > -	return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
+> > +	return dev->sriov->vf_barsz[resno - PCI_IOV_RESOURCES];
+> >  }
+> >  
+> >  int batch_pci_iov_add_virtfn(struct pci_dev *dev, struct pci_bus **bus,
+> > @@ -325,6 +325,20 @@ static void pci_iov_wq_fn(struct work_struct *work)
+> >  	kfree(req);
+> >  }
+> >  
+> > +static void pci_read_vf_config_common(struct pci_bus *bus,
+> > +				      struct pci_dev *dev)
+> > +{
+> > +	int devfn = pci_iov_virtfn_devfn(dev, 0);
+> > +
+> > +	pci_bus_read_config_dword(bus, devfn, PCI_CLASS_REVISION,
+> > +				  &dev->sriov->vf_class);
+> > +	pci_bus_read_config_word(bus, devfn, PCI_SUBSYSTEM_ID,
+> > +				 &dev->sriov->vf_subsystem_device);
+> > +	pci_bus_read_config_word(bus, devfn, PCI_SUBSYSTEM_VENDOR_ID,
+> > +				 &dev->sriov->vf_subsystem_vendor);
+> > +	pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &dev->sriov->vf_hdr_type);
+> > +}
+> > +
+> >  static struct workqueue_struct *pci_iov_wq;
+> >  
+> >  static int __init init_pci_iov_wq(void)
+> > @@ -361,6 +375,8 @@ static int enable_vfs(struct pci_dev *dev, int nr_vfs)
+> >  			goto add_bus_fail;
+> >  	}
+> >  
+> > +	pci_read_vf_config_common(bus[0], dev);
+> > +
+> >  	while (remaining_vfs > 0) {
+> >  		bool ret;
+> >  		struct pci_iov_wq_item *req;
+> > @@ -617,7 +633,7 @@ static int sriov_init(struct pci_dev *dev, int pos)
+> >  			rc = -EIO;
+> >  			goto failed;
+> >  		}
+> > -		iov->barsz[i] = resource_size(res);
+> > +		iov->vf_barsz[i] = resource_size(res);
+> >  		res->end = res->start + resource_size(res) * total - 1;
+> >  		dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
+> >  			 i, res, i, total);
+> > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
+> > index f6b58b3..3264c9e 100644
+> > --- a/drivers/pci/pci.h
+> > +++ b/drivers/pci/pci.h
+> > @@ -271,7 +271,11 @@ struct pci_sriov {
+> >  	u16 driver_max_VFs;	/* max num VFs driver supports */
+> >  	struct pci_dev *dev;	/* lowest numbered PF */
+> >  	struct pci_dev *self;	/* this PF */
+> > -	resource_size_t barsz[PCI_SRIOV_NUM_BARS];	/* VF BAR size */
+> > +	u8 vf_hdr_type;		/* VF header type */
+> > +	u32 vf_class;		/* VF device */
+> > +	u16 vf_subsystem_vendor;	/* VF subsystem vendor */
+> > +	u16 vf_subsystem_device;	/* VF subsystem device */
+> > +	resource_size_t vf_barsz[PCI_SRIOV_NUM_BARS];	/* VF BAR size */
+> >  	bool drivers_autoprobe;	/* auto probing of VFs by driver */
+> >  };
+> >  
+> > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
+> > index 14e0ea1..65099d0 100644
+> > --- a/drivers/pci/probe.c
+> > +++ b/drivers/pci/probe.c
+> > @@ -175,6 +175,7 @@ static inline unsigned long decode_bar(struct pci_dev *dev, u32 bar)
+> >  int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
+> >  		    struct resource *res, unsigned int pos)
+> >  {
+> > +	int bar = res - dev->resource;
+> >  	u32 l = 0, sz = 0, mask;
+> >  	u64 l64, sz64, mask64;
+> >  	u16 orig_cmd;
+> > @@ -194,9 +195,13 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
+> >  	res->name = pci_name(dev);
+> >  
+> >  	pci_read_config_dword(dev, pos, &l);
+> > -	pci_write_config_dword(dev, pos, l | mask);
+> > -	pci_read_config_dword(dev, pos, &sz);
+> > -	pci_write_config_dword(dev, pos, l);
+> > +	if (dev->is_virtfn) {
+> > +		sz = dev->physfn->sriov->vf_barsz[bar] & 0xffffffff;
+> > +	} else {
+> > +		pci_write_config_dword(dev, pos, l | mask);
+> > +		pci_read_config_dword(dev, pos, &sz);
+> > +		pci_write_config_dword(dev, pos, l);
+> > +	}
+> >  
+> >  	/*
+> >  	 * All bits set in sz means the device isn't working properly.
+> > @@ -236,9 +241,14 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
+> >  
+> >  	if (res->flags & IORESOURCE_MEM_64) {
+> >  		pci_read_config_dword(dev, pos + 4, &l);
+> > -		pci_write_config_dword(dev, pos + 4, ~0);
+> > -		pci_read_config_dword(dev, pos + 4, &sz);
+> > -		pci_write_config_dword(dev, pos + 4, l);
+> > +
+> > +		if (dev->is_virtfn) {
+> > +			sz = (dev->physfn->sriov->vf_barsz[bar] >> 32) & 0xffffffff;
+> > +		} else {
+> > +			pci_write_config_dword(dev, pos + 4, ~0);
+> > +			pci_read_config_dword(dev, pos + 4, &sz);
+> > +			pci_write_config_dword(dev, pos + 4, l);
+> > +		}
+> >  
+> >  		l64 |= ((u64)l << 32);
+> >  		sz64 |= ((u64)sz << 32);
+> > @@ -327,6 +337,8 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)
+> >  	for (pos = 0; pos < howmany; pos++) {
+> >  		struct resource *res = &dev->resource[pos];
+> >  		reg = PCI_BASE_ADDRESS_0 + (pos << 2);
+> > +		if (dev->is_virtfn && dev->physfn->sriov->vf_barsz[pos] == 0)
+> > +			continue;
+> >  		pos += __pci_read_base(dev, pci_bar_unknown, res, reg);
+> >  	}
+> >  
+> > @@ -1444,7 +1456,9 @@ int pci_setup_device(struct pci_dev *dev)
+> >  	struct pci_bus_region region;
+> >  	struct resource *res;
+> >  
+> > -	if (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type))
+> > +	if (dev->is_virtfn)
+> > +		hdr_type = dev->physfn->sriov->vf_hdr_type;
+> > +	else if (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type))
+> >  		return -EIO;
+> >  
+> >  	dev->sysdata = dev->bus->sysdata;
+> > @@ -1464,7 +1478,10 @@ int pci_setup_device(struct pci_dev *dev)
+> >  		     dev->bus->number, PCI_SLOT(dev->devfn),
+> >  		     PCI_FUNC(dev->devfn));
+> >  
+> > -	pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
+> > +	if (dev->is_virtfn)
+> > +		class = dev->physfn->sriov->vf_class;
+> > +	else
+> > +		pci_read_config_dword(dev, PCI_CLASS_REVISION, &class);
+> >  	dev->revision = class & 0xff;
+> >  	dev->class = class >> 8;		    /* upper 3 bytes */
+> >  
+> > @@ -1503,8 +1520,13 @@ int pci_setup_device(struct pci_dev *dev)
+> >  			goto bad;
+> >  		pci_read_irq(dev);
+> >  		pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
+> > -		pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
+> > -		pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
+> > +		if (dev->is_virtfn) {
+> > +			dev->subsystem_vendor = dev->physfn->sriov->vf_subsystem_vendor;
+> > +			dev->subsystem_device = dev->physfn->sriov->vf_subsystem_device;
+> > +		} else {
+> > +			pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
+> > +			pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
+> > +		}
+> >  
+> >  		/*
+> >  		 * Do the ugly legacy mode stuff here rather than broken chip
+> > -- 
+> > 2.7.4
+> > 
+> 
+Amazon Development Center Germany GmbH
+Berlin - Dresden - Aachen
+main office: Krausenstr. 38, 10117 Berlin
+Geschaeftsfuehrer: Dr. Ralf Herbrich, Christian Schlaeger
+Ust-ID: DE289237879
+Eingetragen am Amtsgericht Charlottenburg HRB 149173 B
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+ "On Wed, 2018-02-28 at 15:30 -0600, Bjorn Helgaas wrote:\n"
+ "> On Wed, Jan 17, 2018 at 06:44:23PM +0100, KarimAllah Ahmed wrote:\n"
+ "> > \n"
+ "> > ... to avoid reading them from the config space of all the PCI VFs. This is\n"
+ "> > specially a useful optimization when bringing up thousands of VFs.\n"
+ "> > \n"
+ "> > Cc: Bjorn Helgaas <bhelgaas@google.com>\n"
+ "> > Cc: linux-pci@vger.kernel.org\n"
+ "> > Cc: linux-kernel@vger.kernel.org\n"
+ "> > Signed-off-by: KarimAllah Ahmed <karahmed@amazon.de>\n"
+ "> \n"
+ "> What does this patch apply to?  It doesn't apply to v4.16-rc1 (my\n"
+ "> \"master\" branch).  I don't see anything in the history of\n"
+ "> drivers/pci/iov.c about pci_iov_wq_fn().\n"
+ "\n"
+ "Ah, right! I had a few patches in my branch and I decided to only post\n"
+ "this one for now. The pci_iov_wq_fn was part of one of them.\n"
+ "\n"
+ "Will shuffle the patches, rebase and repost.\n"
+ "\n"
+ "Thanks.\n"
+ "\n"
+ "> \n"
+ "> > \n"
+ "> > ---\n"
+ "> >  drivers/pci/iov.c   | 20 ++++++++++++++++++--\n"
+ "> >  drivers/pci/pci.h   |  6 +++++-\n"
+ "> >  drivers/pci/probe.c | 42 ++++++++++++++++++++++++++++++++----------\n"
+ "> >  3 files changed, 55 insertions(+), 13 deletions(-)\n"
+ "> > \n"
+ "> > diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c\n"
+ "> > index 168328a..78e9595 100644\n"
+ "> > --- a/drivers/pci/iov.c\n"
+ "> > +++ b/drivers/pci/iov.c\n"
+ "> > @@ -129,7 +129,7 @@ resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)\n"
+ "> >  \tif (!dev->is_physfn)\n"
+ "> >  \t\treturn 0;\n"
+ "> >  \n"
+ "> > -\treturn dev->sriov->barsz[resno - PCI_IOV_RESOURCES];\n"
+ "> > +\treturn dev->sriov->vf_barsz[resno - PCI_IOV_RESOURCES];\n"
+ "> >  }\n"
+ "> >  \n"
+ "> >  int batch_pci_iov_add_virtfn(struct pci_dev *dev, struct pci_bus **bus,\n"
+ "> > @@ -325,6 +325,20 @@ static void pci_iov_wq_fn(struct work_struct *work)\n"
+ "> >  \tkfree(req);\n"
+ "> >  }\n"
+ "> >  \n"
+ "> > +static void pci_read_vf_config_common(struct pci_bus *bus,\n"
+ "> > +\t\t\t\t      struct pci_dev *dev)\n"
+ "> > +{\n"
+ "> > +\tint devfn = pci_iov_virtfn_devfn(dev, 0);\n"
+ "> > +\n"
+ "> > +\tpci_bus_read_config_dword(bus, devfn, PCI_CLASS_REVISION,\n"
+ "> > +\t\t\t\t  &dev->sriov->vf_class);\n"
+ "> > +\tpci_bus_read_config_word(bus, devfn, PCI_SUBSYSTEM_ID,\n"
+ "> > +\t\t\t\t &dev->sriov->vf_subsystem_device);\n"
+ "> > +\tpci_bus_read_config_word(bus, devfn, PCI_SUBSYSTEM_VENDOR_ID,\n"
+ "> > +\t\t\t\t &dev->sriov->vf_subsystem_vendor);\n"
+ "> > +\tpci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &dev->sriov->vf_hdr_type);\n"
+ "> > +}\n"
+ "> > +\n"
+ "> >  static struct workqueue_struct *pci_iov_wq;\n"
+ "> >  \n"
+ "> >  static int __init init_pci_iov_wq(void)\n"
+ "> > @@ -361,6 +375,8 @@ static int enable_vfs(struct pci_dev *dev, int nr_vfs)\n"
+ "> >  \t\t\tgoto add_bus_fail;\n"
+ "> >  \t}\n"
+ "> >  \n"
+ "> > +\tpci_read_vf_config_common(bus[0], dev);\n"
+ "> > +\n"
+ "> >  \twhile (remaining_vfs > 0) {\n"
+ "> >  \t\tbool ret;\n"
+ "> >  \t\tstruct pci_iov_wq_item *req;\n"
+ "> > @@ -617,7 +633,7 @@ static int sriov_init(struct pci_dev *dev, int pos)\n"
+ "> >  \t\t\trc = -EIO;\n"
+ "> >  \t\t\tgoto failed;\n"
+ "> >  \t\t}\n"
+ "> > -\t\tiov->barsz[i] = resource_size(res);\n"
+ "> > +\t\tiov->vf_barsz[i] = resource_size(res);\n"
+ "> >  \t\tres->end = res->start + resource_size(res) * total - 1;\n"
+ "> >  \t\tdev_info(&dev->dev, \"VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\\n\",\n"
+ "> >  \t\t\t i, res, i, total);\n"
+ "> > diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h\n"
+ "> > index f6b58b3..3264c9e 100644\n"
+ "> > --- a/drivers/pci/pci.h\n"
+ "> > +++ b/drivers/pci/pci.h\n"
+ "> > @@ -271,7 +271,11 @@ struct pci_sriov {\n"
+ "> >  \tu16 driver_max_VFs;\t/* max num VFs driver supports */\n"
+ "> >  \tstruct pci_dev *dev;\t/* lowest numbered PF */\n"
+ "> >  \tstruct pci_dev *self;\t/* this PF */\n"
+ "> > -\tresource_size_t barsz[PCI_SRIOV_NUM_BARS];\t/* VF BAR size */\n"
+ "> > +\tu8 vf_hdr_type;\t\t/* VF header type */\n"
+ "> > +\tu32 vf_class;\t\t/* VF device */\n"
+ "> > +\tu16 vf_subsystem_vendor;\t/* VF subsystem vendor */\n"
+ "> > +\tu16 vf_subsystem_device;\t/* VF subsystem device */\n"
+ "> > +\tresource_size_t vf_barsz[PCI_SRIOV_NUM_BARS];\t/* VF BAR size */\n"
+ "> >  \tbool drivers_autoprobe;\t/* auto probing of VFs by driver */\n"
+ "> >  };\n"
+ "> >  \n"
+ "> > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c\n"
+ "> > index 14e0ea1..65099d0 100644\n"
+ "> > --- a/drivers/pci/probe.c\n"
+ "> > +++ b/drivers/pci/probe.c\n"
+ "> > @@ -175,6 +175,7 @@ static inline unsigned long decode_bar(struct pci_dev *dev, u32 bar)\n"
+ "> >  int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,\n"
+ "> >  \t\t    struct resource *res, unsigned int pos)\n"
+ "> >  {\n"
+ "> > +\tint bar = res - dev->resource;\n"
+ "> >  \tu32 l = 0, sz = 0, mask;\n"
+ "> >  \tu64 l64, sz64, mask64;\n"
+ "> >  \tu16 orig_cmd;\n"
+ "> > @@ -194,9 +195,13 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,\n"
+ "> >  \tres->name = pci_name(dev);\n"
+ "> >  \n"
+ "> >  \tpci_read_config_dword(dev, pos, &l);\n"
+ "> > -\tpci_write_config_dword(dev, pos, l | mask);\n"
+ "> > -\tpci_read_config_dword(dev, pos, &sz);\n"
+ "> > -\tpci_write_config_dword(dev, pos, l);\n"
+ "> > +\tif (dev->is_virtfn) {\n"
+ "> > +\t\tsz = dev->physfn->sriov->vf_barsz[bar] & 0xffffffff;\n"
+ "> > +\t} else {\n"
+ "> > +\t\tpci_write_config_dword(dev, pos, l | mask);\n"
+ "> > +\t\tpci_read_config_dword(dev, pos, &sz);\n"
+ "> > +\t\tpci_write_config_dword(dev, pos, l);\n"
+ "> > +\t}\n"
+ "> >  \n"
+ "> >  \t/*\n"
+ "> >  \t * All bits set in sz means the device isn't working properly.\n"
+ "> > @@ -236,9 +241,14 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,\n"
+ "> >  \n"
+ "> >  \tif (res->flags & IORESOURCE_MEM_64) {\n"
+ "> >  \t\tpci_read_config_dword(dev, pos + 4, &l);\n"
+ "> > -\t\tpci_write_config_dword(dev, pos + 4, ~0);\n"
+ "> > -\t\tpci_read_config_dword(dev, pos + 4, &sz);\n"
+ "> > -\t\tpci_write_config_dword(dev, pos + 4, l);\n"
+ "> > +\n"
+ "> > +\t\tif (dev->is_virtfn) {\n"
+ "> > +\t\t\tsz = (dev->physfn->sriov->vf_barsz[bar] >> 32) & 0xffffffff;\n"
+ "> > +\t\t} else {\n"
+ "> > +\t\t\tpci_write_config_dword(dev, pos + 4, ~0);\n"
+ "> > +\t\t\tpci_read_config_dword(dev, pos + 4, &sz);\n"
+ "> > +\t\t\tpci_write_config_dword(dev, pos + 4, l);\n"
+ "> > +\t\t}\n"
+ "> >  \n"
+ "> >  \t\tl64 |= ((u64)l << 32);\n"
+ "> >  \t\tsz64 |= ((u64)sz << 32);\n"
+ "> > @@ -327,6 +337,8 @@ static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)\n"
+ "> >  \tfor (pos = 0; pos < howmany; pos++) {\n"
+ "> >  \t\tstruct resource *res = &dev->resource[pos];\n"
+ "> >  \t\treg = PCI_BASE_ADDRESS_0 + (pos << 2);\n"
+ "> > +\t\tif (dev->is_virtfn && dev->physfn->sriov->vf_barsz[pos] == 0)\n"
+ "> > +\t\t\tcontinue;\n"
+ "> >  \t\tpos += __pci_read_base(dev, pci_bar_unknown, res, reg);\n"
+ "> >  \t}\n"
+ "> >  \n"
+ "> > @@ -1444,7 +1456,9 @@ int pci_setup_device(struct pci_dev *dev)\n"
+ "> >  \tstruct pci_bus_region region;\n"
+ "> >  \tstruct resource *res;\n"
+ "> >  \n"
+ "> > -\tif (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type))\n"
+ "> > +\tif (dev->is_virtfn)\n"
+ "> > +\t\thdr_type = dev->physfn->sriov->vf_hdr_type;\n"
+ "> > +\telse if (pci_read_config_byte(dev, PCI_HEADER_TYPE, &hdr_type))\n"
+ "> >  \t\treturn -EIO;\n"
+ "> >  \n"
+ "> >  \tdev->sysdata = dev->bus->sysdata;\n"
+ "> > @@ -1464,7 +1478,10 @@ int pci_setup_device(struct pci_dev *dev)\n"
+ "> >  \t\t     dev->bus->number, PCI_SLOT(dev->devfn),\n"
+ "> >  \t\t     PCI_FUNC(dev->devfn));\n"
+ "> >  \n"
+ "> > -\tpci_read_config_dword(dev, PCI_CLASS_REVISION, &class);\n"
+ "> > +\tif (dev->is_virtfn)\n"
+ "> > +\t\tclass = dev->physfn->sriov->vf_class;\n"
+ "> > +\telse\n"
+ "> > +\t\tpci_read_config_dword(dev, PCI_CLASS_REVISION, &class);\n"
+ "> >  \tdev->revision = class & 0xff;\n"
+ "> >  \tdev->class = class >> 8;\t\t    /* upper 3 bytes */\n"
+ "> >  \n"
+ "> > @@ -1503,8 +1520,13 @@ int pci_setup_device(struct pci_dev *dev)\n"
+ "> >  \t\t\tgoto bad;\n"
+ "> >  \t\tpci_read_irq(dev);\n"
+ "> >  \t\tpci_read_bases(dev, 6, PCI_ROM_ADDRESS);\n"
+ "> > -\t\tpci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);\n"
+ "> > -\t\tpci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);\n"
+ "> > +\t\tif (dev->is_virtfn) {\n"
+ "> > +\t\t\tdev->subsystem_vendor = dev->physfn->sriov->vf_subsystem_vendor;\n"
+ "> > +\t\t\tdev->subsystem_device = dev->physfn->sriov->vf_subsystem_device;\n"
+ "> > +\t\t} else {\n"
+ "> > +\t\t\tpci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);\n"
+ "> > +\t\t\tpci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);\n"
+ "> > +\t\t}\n"
+ "> >  \n"
+ "> >  \t\t/*\n"
+ "> >  \t\t * Do the ugly legacy mode stuff here rather than broken chip\n"
+ "> > -- \n"
+ "> > 2.7.4\n"
+ "> > \n"
+ "> \n"
+ "Amazon Development Center Germany GmbH\n"
+ "Berlin - Dresden - Aachen\n"
+ "main office: Krausenstr. 38, 10117 Berlin\n"
+ "Geschaeftsfuehrer: Dr. Ralf Herbrich, Christian Schlaeger\n"
+ "Ust-ID: DE289237879\n"
+ Eingetragen am Amtsgericht Charlottenburg HRB 149173 B
 
-3d4a79f2578f80eda788ae26c9f5990399f4597488b41808b064fd3f409c03fe
+8e0718f86c7cc35f5e42c0839c19144961512fd852bbb92681e8e0bc600aba70

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