From: Joerg Roedel <joro@8bytes.org>
To: Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@kernel.org>, "H . Peter Anvin" <hpa@zytor.com>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org,
Linus Torvalds <torvalds@linux-foundation.org>,
Andy Lutomirski <luto@kernel.org>,
Dave Hansen <dave.hansen@intel.com>,
Josh Poimboeuf <jpoimboe@redhat.com>,
Juergen Gross <jgross@suse.com>,
Peter Zijlstra <peterz@infradead.org>,
Borislav Petkov <bp@alien8.de>, Jiri Kosina <jkosina@suse.cz>,
Boris Ostrovsky <boris.ostrovsky@oracle.com>,
Brian Gerst <brgerst@gmail.com>,
David Laight <David.Laight@aculab.com>,
Denys Vlasenko <dvlasenk@redhat.com>,
Eduardo Valentin <eduval@amazon.com>,
Greg KH <gregkh@linuxfoundation.org>,
Will Deacon <will.deacon@arm.com>,
aliguori@amazon.com, daniel.gruss@iaik.tugraz.at,
hughd@google.com, keescook@google.com,
Andrea Arcangeli <aarcange@redhat.com>,
Waiman Long <llong@redhat.com>, Pavel Machek <pavel@ucw.cz>,
jroedel@suse.de, joro@8bytes.org
Subject: [PATCH 17/35] x86/pgtable/32: Allocate 8k page-tables when PTI is enabled
Date: Fri, 16 Mar 2018 20:29:35 +0100 [thread overview]
Message-ID: <1521228593-3820-18-git-send-email-joro@8bytes.org> (raw)
In-Reply-To: <1521228593-3820-1-git-send-email-joro@8bytes.org>
From: Joerg Roedel <jroedel@suse.de>
Allocate a kernel and a user page-table root when PTI is
enabled. Also allocate a full page per root for PAE because
otherwise the bit to flip in cr3 to switch between them
would be non-constant, which creates a lot of hassle.
Keep that for a later optimization.
Signed-off-by: Joerg Roedel <jroedel@suse.de>
---
arch/x86/kernel/head_32.S | 20 +++++++++++++++-----
arch/x86/mm/pgtable.c | 5 +++--
2 files changed, 18 insertions(+), 7 deletions(-)
diff --git a/arch/x86/kernel/head_32.S b/arch/x86/kernel/head_32.S
index c290209..1f35d60 100644
--- a/arch/x86/kernel/head_32.S
+++ b/arch/x86/kernel/head_32.S
@@ -512,11 +512,18 @@ ENTRY(initial_code)
ENTRY(setup_once_ref)
.long setup_once
+#ifdef CONFIG_PAGE_TABLE_ISOLATION
+#define PGD_ALIGN (2 * PAGE_SIZE)
+#define PTI_USER_PGD_FILL 1024
+#else
+#define PGD_ALIGN (PAGE_SIZE)
+#define PTI_USER_PGD_FILL 0
+#endif
/*
* BSS section
*/
__PAGE_ALIGNED_BSS
- .align PAGE_SIZE
+ .align PGD_ALIGN
#ifdef CONFIG_X86_PAE
.globl initial_pg_pmd
initial_pg_pmd:
@@ -526,14 +533,17 @@ initial_pg_pmd:
initial_page_table:
.fill 1024,4,0
#endif
+ .align PGD_ALIGN
initial_pg_fixmap:
.fill 1024,4,0
-.globl empty_zero_page
-empty_zero_page:
- .fill 4096,1,0
.globl swapper_pg_dir
+ .align PGD_ALIGN
swapper_pg_dir:
.fill 1024,4,0
+ .fill PTI_USER_PGD_FILL,4,0
+.globl empty_zero_page
+empty_zero_page:
+ .fill 4096,1,0
EXPORT_SYMBOL(empty_zero_page)
/*
@@ -542,7 +552,7 @@ EXPORT_SYMBOL(empty_zero_page)
#ifdef CONFIG_X86_PAE
__PAGE_ALIGNED_DATA
/* Page-aligned for the benefit of paravirt? */
- .align PAGE_SIZE
+ .align PGD_ALIGN
ENTRY(initial_page_table)
.long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
# if KPMDS == 3
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
index 004abf9..a81d42e 100644
--- a/arch/x86/mm/pgtable.c
+++ b/arch/x86/mm/pgtable.c
@@ -338,7 +338,8 @@ static inline pgd_t *_pgd_alloc(void)
* We allocate one page for pgd.
*/
if (!SHARED_KERNEL_PMD)
- return (pgd_t *)__get_free_page(PGALLOC_GFP);
+ return (pgd_t *)__get_free_pages(PGALLOC_GFP,
+ PGD_ALLOCATION_ORDER);
/*
* Now PAE kernel is not running as a Xen domain. We can allocate
@@ -350,7 +351,7 @@ static inline pgd_t *_pgd_alloc(void)
static inline void _pgd_free(pgd_t *pgd)
{
if (!SHARED_KERNEL_PMD)
- free_page((unsigned long)pgd);
+ free_pages((unsigned long)pgd, PGD_ALLOCATION_ORDER);
else
kmem_cache_free(pgd_cache, pgd);
}
--
2.7.4
next prev parent reply other threads:[~2018-03-16 19:30 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-16 19:29 [PATCH 00/35 v4] PTI support for x32 Joerg Roedel
2018-03-16 19:29 ` [PATCH 01/35] x86/asm-offsets: Move TSS_sp0 and TSS_sp1 to asm-offsets.c Joerg Roedel
2018-03-16 19:29 ` [PATCH 02/35] x86/entry/32: Rename TSS_sysenter_sp0 to TSS_entry_stack Joerg Roedel
2018-03-16 19:29 ` [PATCH 03/35] x86/entry/32: Load task stack from x86_tss.sp1 in SYSENTER handler Joerg Roedel
2018-03-16 19:29 ` [PATCH 04/35] x86/entry/32: Put ESPFIX code into a macro Joerg Roedel
2018-03-16 19:29 ` [PATCH 05/35] x86/entry/32: Unshare NMI return path Joerg Roedel
2018-03-16 19:29 ` [PATCH 06/35] x86/entry/32: Split off return-to-kernel path Joerg Roedel
2018-03-16 19:29 ` [PATCH 07/35] x86/entry/32: Enter the kernel via trampoline stack Joerg Roedel
2018-03-16 19:29 ` [PATCH 08/35] x86/entry/32: Leave " Joerg Roedel
2018-03-16 19:29 ` [PATCH 09/35] x86/entry/32: Introduce SAVE_ALL_NMI and RESTORE_ALL_NMI Joerg Roedel
2018-03-16 19:29 ` [PATCH 10/35] x86/entry/32: Handle Entry from Kernel-Mode on Entry-Stack Joerg Roedel
2018-03-16 19:29 ` [PATCH 11/35] x86/entry/32: Simplify debug entry point Joerg Roedel
2018-03-16 19:29 ` [PATCH 12/35] x86/32: Use tss.sp1 as cpu_current_top_of_stack Joerg Roedel
2018-03-16 19:29 ` [PATCH 13/35] x86/entry/32: Add PTI cr3 switch to non-NMI entry/exit points Joerg Roedel
2018-03-16 19:29 ` [PATCH 14/35] x86/entry/32: Add PTI cr3 switches to NMI handler code Joerg Roedel
2018-03-16 19:29 ` [PATCH 15/35] x86/pgtable: Rename pti_set_user_pgd to pti_set_user_pgtbl Joerg Roedel
2018-03-16 19:29 ` [PATCH 16/35] x86/pgtable/pae: Unshare kernel PMDs when PTI is enabled Joerg Roedel
2018-03-16 19:29 ` Joerg Roedel [this message]
2018-03-16 19:29 ` [PATCH 18/35] x86/pgtable: Move pgdp kernel/user conversion functions to pgtable.h Joerg Roedel
2018-03-16 19:29 ` [PATCH 19/35] x86/pgtable: Move pti_set_user_pgtbl() " Joerg Roedel
2018-03-16 19:29 ` [PATCH 20/35] x86/pgtable: Move two more functions from pgtable_64.h " Joerg Roedel
2018-03-16 19:29 ` [PATCH 21/35] x86/mm/pae: Populate valid user PGD entries Joerg Roedel
2018-03-16 19:29 ` [PATCH 22/35] x86/mm/pae: Populate the user page-table with user pgd's Joerg Roedel
2018-03-16 19:29 ` [PATCH 23/35] x86/mm/legacy: " Joerg Roedel
2018-03-16 19:29 ` [PATCH 24/35] x86/mm/pti: Add an overflow check to pti_clone_pmds() Joerg Roedel
2018-03-16 19:29 ` [PATCH 25/35] x86/mm/pti: Define X86_CR3_PTI_PCID_USER_BIT on x86_32 Joerg Roedel
2018-03-16 19:29 ` [PATCH 26/35] x86/mm/pti: Clone CPU_ENTRY_AREA on PMD level " Joerg Roedel
2018-03-16 19:29 ` [PATCH 27/35] x86/mm/dump_pagetables: Define INIT_PGD Joerg Roedel
2018-03-16 19:29 ` [PATCH 28/35] x86/pgtable/pae: Use separate kernel PMDs for user page-table Joerg Roedel
2018-03-16 19:29 ` [PATCH 29/35] x86/ldt: Reserve address-space range on 32 bit for the LDT Joerg Roedel
2018-03-16 19:29 ` [PATCH 30/35] x86/ldt: Define LDT_END_ADDR Joerg Roedel
2018-03-16 19:29 ` [PATCH 31/35] x86/ldt: Split out sanity check in map_ldt_struct() Joerg Roedel
2018-03-16 19:29 ` [PATCH 32/35] x86/ldt: Enable LDT user-mapping for PAE Joerg Roedel
2018-03-16 19:29 ` [PATCH 33/35] x86/pti: Allow CONFIG_PAGE_TABLE_ISOLATION for x86_32 Joerg Roedel
2018-03-16 19:29 ` [PATCH 34/35] x86/mm/pti: Add Warning when booting on a PCID capable CPU Joerg Roedel
2018-03-16 19:29 ` [PATCH 35/35] x86/entry/32: Add debug code to check entry/exit cr3 Joerg Roedel
2018-04-11 15:24 ` [PATCH] x86/pgtable: Don't set huge pud/pmd on non-leaf entries Joerg Roedel
-- strict thread matches above, loose matches on Subject: below --
2018-04-16 15:24 [PATCH 00/35 v5] PTI support for x32 Joerg Roedel
2018-04-16 15:25 ` [PATCH 17/35] x86/pgtable/32: Allocate 8k page-tables when PTI is enabled Joerg Roedel
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